Searched refs:FirstOp (Results 1 - 5 of 5) sorted by relevance
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionalCompares.cpp | 613 unsigned FirstOp = 1; // First CmpMI operand to copy. local
626 case AArch64::FCMPSrr: Opc = AArch64::FCCMPSrr; FirstOp = 0; break;
627 case AArch64::FCMPDrr: Opc = AArch64::FCCMPDrr; FirstOp = 0; break;
628 case AArch64::FCMPESrr: Opc = AArch64::FCCMPESrr; FirstOp = 0; break;
629 case AArch64::FCMPEDrr: Opc = AArch64::FCCMPEDrr; FirstOp = 0; break;
633 FirstOp = 0;
639 FirstOp = 0;
651 MRI->constrainRegClass(CmpMI->getOperand(FirstOp).getReg(),
653 if (CmpMI->getOperand(FirstOp + 1).isReg())
654 MRI->constrainRegClass(CmpMI->getOperand(FirstOp
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombinePHI.cpp | 208 Value *FirstOp = FirstInst->getOperand(i); local
209 PHINode *NewPN = PHINode::Create(FirstOp->getType(), e,
210 FirstOp->getName()+".pn");
213 NewPN->addIncoming(FirstOp, PN.getIncomingBlock(0));
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| /external/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 1502 bool FirstOp = true; local
1527 FirstOp = false;
1564 if (FirstOp) FirstOp = false; else OS << ",";
1618 if (!FirstOp) OS << ",";
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2055 unsigned FirstOp; local
2073 FirstOp = 0;
2085 FirstOp = 1;
2091 if (!isa<ConstantSDNode>(N->getOperand(FirstOp)) ||
2092 N->getConstantOperandVal(FirstOp) != 0)
2095 SDValue Base = N->getOperand(FirstOp + 1);
2178 if (FirstOp == 1) // Store
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 1970 MachineInstr *FirstOp = nullptr; local
1981 FirstOp = Op;
2020 DoMove = IsSafeAndProfitableToMove(isLd, Base, FirstOp, LastOp,
2027 MachineBasicBlock::iterator InsertPos = isLd ? FirstOp : LastOp;
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