/external/llvm/include/llvm/Target/ |
H A D | TargetCallingConv.h | 38 static const uint64_t Nest = 1ULL<<5; ///< Nested fn static chain member in struct:llvm::ISD::ArgFlagsTy 81 bool isNest() const { return Flags & Nest; }
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/external/llvm/include/llvm/IR/ |
H A D | Attributes.h | 81 Nest, ///< Nested function static chain enumerator in enum:llvm::Attribute::AttrKind
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/external/llvm/lib/IR/ |
H A D | Attributes.cpp | 182 if (hasAttribute(Attribute::Nest)) 369 case Attribute::Nest: return 1 << 8; 1183 .addAttribute(Attribute::Nest)
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H A D | Verifier.cpp | 809 !Attrs.hasAttribute(Idx, Attribute::Nest) && 824 AttrCount += Attrs.hasAttribute(Idx, Attribute::Nest); 894 if (Attrs.hasAttribute(Idx, Attribute::Nest)) { 1573 if (Attrs.hasAttribute(Idx, Attribute::Nest)) 1584 if (Attrs.hasAttribute(Idx, Attribute::Nest)) {
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H A D | Function.cpp | 121 hasAttribute(getArgNo()+1, Attribute::Nest);
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/external/llvm/bindings/ocaml/llvm/ |
H A D | llvm.ml | 87 | Nest Constructor in type:Attribute/t 737 | Attribute.Nest -> Int32.shift_left 1l 8 773 checkattr Attribute.Nest;
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H A D | llvm.mli | 136 | Nest
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 1496 if (Attrs.hasAttrSomewhere(Attribute::Nest)) 1515 if (NestAttrs.hasAttribute(NestIdx, Attribute::Nest)) {
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreFrameLowering.cpp | 240 if (PAL.hasAttrSomewhere(Attribute::Nest))
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H A D | XCoreISelLowering.cpp | 885 SDValue Nest = Op.getOperand(3); // 'nest' parameter value local 923 OutChains[3] = DAG.getStore(Chain, dl, Nest, Addr,
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/external/llvm/lib/Transforms/IPO/ |
H A D | GlobalOpt.cpp | 1875 if (!Attrs.getSlotAttributes(i).hasAttribute(Index, Attribute::Nest)) 1879 return Attrs.removeAttribute(C, Index, Attribute::Nest); 1930 if (F->getAttributes().hasAttrSomewhere(Attribute::Nest) &&
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2571 F->getAttributes().hasAttribute(Idx, Attribute::Nest)) 2773 if (CS.paramHasAttr(AttrInd, Attribute::Nest))
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H A D | X86ISelLowering.cpp | 14691 SDValue Nest = Op.getOperand(3); // 'nest' parameter value 14733 OutChains[3] = DAG.getStore(Root, dl, Nest, Addr, 14783 report_fatal_error("Nest register in use - reduce number of inreg" 14815 OutChains[1] = DAG.getStore(Root, dl, Nest, Addr,
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/external/llvm/lib/Bitcode/Writer/ |
H A D | BitcodeWriter.cpp | 186 case Attribute::Nest:
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1371 CS.paramHasAttr(AttrInd, Attribute::Nest) ||
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/external/llvm/lib/Target/CppBackend/ |
H A D | CPPBackend.cpp | 503 HANDLE_ATTR(Nest);
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFastISel.cpp | 1445 CS.paramHasAttr(AttrIdx, Attribute::Nest) ||
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H A D | PPCISelLowering.cpp | 1912 SDValue Nest = Op.getOperand(3); // 'nest' parameter value local 1933 Entry.Node = Nest; Args.push_back(Entry);
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/external/llvm/lib/Bitcode/Reader/ |
H A D | BitcodeReader.cpp | 574 return Attribute::Nest;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 76 isNest = CS->paramHasAttr(AttrIdx, Attribute::Nest);
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H A D | SelectionDAGBuilder.cpp | 7448 if (F.getAttributes().hasAttribute(Idx, Attribute::Nest))
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 2339 CS.paramHasAttr(AttrInd, Attribute::Nest) ||
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/external/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 1289 case lltok::kw_nest: B.addAttribute(Attribute::Nest); break;
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