Searched refs:OpSize (Results 1 - 9 of 9) sorted by relevance

/external/llvm/utils/TableGen/
H A DX86RecognizableInstr.h51 /// The OpSize field from the record
52 uint8_t OpSize; member in class:llvm::X86Disassembler::RecognizableInstr
118 /// @param OpSize Indicates the operand size of the instruction.
119 /// If register size does not match OpSize, then
123 bool hasREX_WPrefix, uint8_t OpSize);
130 /// @param OpSize - Indicates whether this is an OpSize16 instruction.
134 uint8_t OpSize);
139 uint8_t OpSize);
144 uint8_t OpSize);
146 uint8_t OpSize);
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H A DX86RecognizableInstr.cpp194 OpSize = byteFromRec(Rec, "OpSizeBits");
402 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD))
404 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD)
406 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS)
408 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)
425 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD)
427 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS)
429 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)
450 uint8_t OpSize)) {
468 OpSize);
444 handleOperand(bool optional, unsigned &operandIndex, unsigned &physicalOperandIndex, unsigned &numPhysicalOperands, const unsigned *operandMapping, OperandEncoding (*encodingFromString) (const std::string&, uint8_t OpSize)) argument
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/external/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp291 unsigned OpSize = OpTy->getScalarSizeInBits(); variable
292 if (DL->isLegalInteger(OpSize) &&
293 OpSize <= DL->getPointerTypeSizeInBits(Ty))
H A DConstantFolding.cpp656 unsigned OpSize = DL->getTypeSizeInBits(Op0->getType()); local
661 return ConstantInt::get(Op0->getType(), Offs1.zextOrTrunc(OpSize) -
662 Offs2.zextOrTrunc(OpSize));
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp1132 unsigned char OpSize = (TSFlags & X86II::OpSizeMask) >> X86II::OpSizeShift; local
1133 if (OpSize == (is16BitMode(STI) ? X86II::OpSize32 : X86II::OpSize16))
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2297 unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 local
2299 OpSize = (OpSize + 7) / 8;
2301 if (OpSize < 8)
2302 BEAlign = 8 - OpSize;
2311 int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp3461 // range [0, OpSize), Neg == (Pos == 0 ? 0 : OpSize - Pos). This means that
3467 // in direction shift1 by Neg. The range [0, OpSize) means that we only need
3469 static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned OpSize) { argument
3470 // If OpSize is a power of 2 then:
3472 // (a) (Pos == 0 ? 0 : OpSize - Pos) == (OpSize - Pos) & (OpSize - 1)
3473 // (b) Neg == Neg & (OpSize - 1) whenever Neg is in [0, OpSize)
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/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3219 uint32_t OpSize = (Arg.getValueType().getSizeInBits()+7)/8; local
3220 int FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true);
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2827 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8; local
2828 FI = MF.getFrameInfo()->CreateFixedObject(OpSize, Offset, true);

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