| cd81d94322a39503e4a3e87b6ee03d4fcb3465fb |
|
21-Jul-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for rebase to r212749.
Includes a cherry-pick of:
r212948 - fixes a small issue with atomic calls
Change-Id: Ib97bd980b59f18142a69506400911a6009d9df18
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dce4a407a24b04eebc6a376f8e62b41aaa7b071f |
|
29-May-2014 |
Stephen Hines <srhines@google.com> |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 36b56886974eae4f9c5ebc96befd3e7bfe5de338 |
|
24-Apr-2014 |
Stephen Hines <srhines@google.com> |
Update to LLVM 3.5a.
Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b1eb9dd018475d45d9a8f705441f8f6c86a8f986 |
|
10-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r196858:
------------------------------------------------------------------------
r196858 | nadav | 2013-12-09 17:13:59 -0800 (Mon, 09 Dec 2013) | 1 line
Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| aee5c3e1052b2e144fdc6461bd602cdc502a93cc |
|
05-Dec-2013 |
Bill Wendling <isanbard@gmail.com> |
Revert r191049 and r191059. They were causing failures. See PR17975.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196521 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1349899ba424eb4655c890bdfecb514682627a8d |
|
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195670:
------------------------------------------------------------------------
r195670 | void | 2013-11-25 10:05:22 -0800 (Mon, 25 Nov 2013) | 5 lines
Unrevert r195599 with testcase fix.
I'm not sure how it was checking for the wrong values...
PR18023.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ddc3c964657cc0be4994ddfaf056d5ec6bb11e5b |
|
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195636:
------------------------------------------------------------------------
r195636 | aemerson | 2013-11-25 03:24:18 -0800 (Mon, 25 Nov 2013) | 2 lines
Revert r195599 as it broke the builds.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195671 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 975e958dbc12ba412385b721100fc1c830b0e3ab |
|
25-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Merging r195635:
------------------------------------------------------------------------
r195635 | dsanders | 2013-11-25 11:14:43 +0000 (Mon, 25 Nov 2013) | 19 lines
Fixed tryFoldToZero() for vector types that need expansion.
Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.
Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.
Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.
Reviewers: resistor
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2251
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e1679735d6df98bd71808f3c34a32599de0f40a1 |
|
25-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195599:
------------------------------------------------------------------------
r195599 | void | 2013-11-24 21:01:21 -0800 (Sun, 24 Nov 2013) | 4 lines
Don't look past volatile loads.
A volatile load should block us from trying to coalesce stores.
PR18023
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f62b274a93d4014d56fa3a656f4fac6e7d827358 |
|
22-Nov-2013 |
Bill Wendling <isanbard@gmail.com> |
Merging r195397:
------------------------------------------------------------------------
r195397 | tstellar | 2013-11-21 16:39:23 -0800 (Thu, 21 Nov 2013) | 11 lines
Split SETCC if VSELECT requires splitting too.
This patch is a rewrite of the original patch commited in r194542. Instead of
relying on the type legalizer to do the splitting for us, we now peform the
splitting ourselves in the DAG combiner. This is necessary for the case where
the vector mask is a legal type after promotion and still wouldn't require
splitting.
Patch by: Juergen Ributzka
NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d5ae5b018644345ba0fc48a47030ef1105e1abfd |
|
17-Nov-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Partially revert r192795, getNOT was fixed not to create illegal constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194959 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 509a492442b7e889d615d3b451629c81a810aef1 |
|
15-Nov-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add target hook to prevent folding some bitcasted loads.
This is to avoid this transformation in some cases:
fold (conv (load x)) -> (load (conv*)x)
On architectures that don't natively support some vector
loads efficiently casting the load to a smaller vector of
larger types and loading is more efficient.
Patch by Micah Villmow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c7e77f91fecd662b198939a9a8ee0a0cc3828fc4 |
|
13-Nov-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
This patch reapplies r193676 with an additional fix for the Hexagon backend. The
SystemZ backend has already been fixed by r194148.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask type for the given target. Now the type
legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
Reviewed by Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 028e4d27b1afc62be0687e9c3b57992c36852938 |
|
11-Nov-2013 |
Daniel Sanders <daniel.sanders@imgtec.com> |
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too
Reviewers: dsanders
Reviewed By: dsanders
CC: llvm-commits, nadav
Differential Revision: http://llvm-reviews.chandlerc.com/D1958
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9a5df73e32819c45884feee6bd49e7ebe911f977 |
|
30-Oct-2013 |
Juergen Ributzka <juergen@apple.com> |
Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."
Now Hexagon and SystemZ are not happy with it :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4eced19c505bb32dc210a18e87624f64d011894c |
|
30-Oct-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask type for the given target. This mask has
usually the same size as the VSELECT return type (except for Intel KNL). Now the
type legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
Reviewed by Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193676 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a7be36c8eb4717e44b05e00008544b883fc87de9 |
|
28-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
[DAGCombiner] Respect volatility when checking for aliases
Making useAA() default to true for SystemZ showed that the combiner alias
analysis wasn't handling volatile accesses. This hit many of the SystemZ
tests, but I arbitrarily picked one for the purpose of this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 66589dcc8fb5dcf0894a9a80a8dee890a4f3a379 |
|
28-Oct-2013 |
Richard Sandiford <rsandifo@linux.vnet.ibm.com> |
Keep TBAA info when rewriting SelectionDAG loads and stores
Most SelectionDAG code drops the TBAA info when creating a new form of a
load and store (e.g. during legalization, or when converting a plain
load to an extending one). This patch tries to catch all cases where
the TBAA information can legitimately be carried over.
The patch adds alternative forms of getLoad() and getExtLoad() that take
a MachineMemOperand instead of individual fields. (The corresponding
getTruncStore() already exists.) The idea is to use the MachineMemOperand
forms when all fields are carried over (size, pointer info, isVolatile,
isNonTemporal, alignment and TBAA info). If some adjustment is being
made, e.g. to narrow the load, then we still pass the individual fields
but also pass the TBAA info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 97541d400e5011fd8ab5d2eb2a736c301d85b232 |
|
25-Oct-2013 |
Nadav Rotem <nrotem@apple.com> |
Optimize concat_vectors(X, undef) -> scalar_to_vector(X).
This optimization is not SSE specific so I am moving it to DAGco.
The new scalar_to_vector dag node exposed a missing pattern in the AArch64 target that I needed to add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 888cbad774acdff580611f6b07daaf96e825b7e7 |
|
17-Oct-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Fix edge condition in DAGCombiner to improve codegen of shift sequences.
When canonicalizing dags according to the rule
(shl (zext (shr X, c1) ), c1) ==> (zext (shl (shr X, c1), c1))
remember to add the new shl dag to the DAGCombiner worklist of nodes.
If we don't explicitly add it to the worklist of nodes to visit, we
may not trigger later on the rule that folds the shift left + logical
shift right into a AND instruction with bitmask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| adbd3ae1dfa7530d23653b6fd910d28de8217fbd |
|
17-Oct-2013 |
Jack Carter <jack.carter@imgtec.com> |
[projects/test-suite] White space and long line fixes.
No functionality changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 72a3ee742296aa68fda0118d0e1fa649be756938 |
|
16-Oct-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't fold xor into not if getNOT would introduce an illegal constant.
This happens e.g. with <2 x i64> -1 on x86_32. It cannot be generated directly
because i64 is illegal. It would be nice if getNOT would handle this
transparently, but I don't see a way to generate a legal constant there right
now. Fixes PR17487.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 83f743a4d5b4298893adaada0270ff2d832a50c7 |
|
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Reapply load slicing (192471) with a test that explicitly set sse4.2 support.
This should fix the buildbots.
Original commit message:
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192476 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4351741a3b36bfe1ac1b385334fc5fa6f6ef5a11 |
|
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Revert load slicing (r192471), until I figure out why it fails on ubuntu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192474 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c34693f6efc670b71e11f3479844c36d9696b535 |
|
11-Oct-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] Slice a big load in two loads when the element are next to each
other in memory and the target has paired load and performs post-isel loads
combining.
E.g., this optimization will transform something like this:
a = load i64* addr
b = trunc i64 a to i32
c = lshr i64 a, 32
d = trunc i64 c to i32
into:
b = load i32* addr1
d = load i32* addr2
Where addr1 = addr2 +/- sizeof(i32), if the target supports paired load and
performs post-isel loads combining.
One should overload TargetLowering::hasPairedLoad to provide this information.
The default is false.
<rdar://problem/14477220>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 03c8f8fbd539e539796b0bd9824797f3240261d7 |
|
05-Oct-2013 |
Hal Finkel <hfinkel@anl.gov> |
Fix DAGCombiner::visitFP_EXTEND to ignore indexed loads
DAGCombiner::visitFP_EXTEND will apply the following transformation:
fold (fpext (load x)) -> (fpext (fptrunc (extload x)))
but the implementation does not handle indexed loads (pre/post inc.), but did
not specifically ignore them either (unlike for extending loads, which it
already ignored), causing an assert when the transformation was applied to an
indexed load. This is the minimal fix for correctness (causing the
transformation to be skipped for indexed loads).
Unfortunately, I don't have an in-tree test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191989 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b70a05a871a9ce44231a5f6308271f333c4ad110 |
|
03-Oct-2013 |
Jin-Gu Kang <jaykang10@imrc.kist.re.kr> |
Added checking code whehter target supports specific dag combining about rotate
or not. The corresponding dag patterns are as following:
"DAGCombier::MatchRotate" function in DAGCombiner.cpp
Pattern1
// fold (or (shl (*ext x), (*ext y)),
// (srl (*ext x), (*ext (sub 32, y)))) ->
// (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext y)),
// (srl (*ext x), (*ext (sub 32, y)))) ->
// (*ext (rotr x, (sub 32, y)))
pattern2
// fold (or (shl (*ext x), (*ext (sub 32, y))),
// (srl (*ext x), (*ext y))) ->
// (*ext (rotl x, y))
// fold (or (shl (*ext x), (*ext (sub 32, y))),
// (srl (*ext x), (*ext y))) ->
// (*ext (rotr x, (sub 32, y)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191905 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a9f113d0662faba063742d0ed82709c1f9087710 |
|
27-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Re-apply the change from r191393 with fix for pr17380.
This change fixes the problem reported in pr17380 and re-add the dagcombine
transformation ensuring that the value types are always legal if the
transformation is triggered after Legalization took place.
Added the test case from pr17380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191509 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6c73cf5a8aef28e4274a0d843940fdee0d9f7329 |
|
26-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Revert r191393 since it caused pr17380.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2ce3ac8dd8c8e43f0a1a4db1a11f452b087ca24d |
|
25-Sep-2013 |
Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> |
Teach DAGCombiner how to canonicalize dags according to the rule
(shl (zext (shr A, X)), X) => (zext (shl (shr A, X), X)).
The rule only triggers when there are no other uses of the
zext to avoid materializing more instructions.
This helps the DAGCombiner understand that the shl/shr
sequence can then be converted into an and instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191393 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cd216b2c7359b21de08e568792ae01106407b351 |
|
24-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Unify rotate matching for extended and unextended amounts.
No functionality change, lots of indentation changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191303 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 670711e66217d32a751f0dfc7bb88006bfb05012 |
|
23-Sep-2013 |
Kay Tiong Khoo <kkhoo@perfwizard.com> |
fix typo: than -> then
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191214 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 189c6235e7d783928c94cbfe4bccb39e4bd0b84f |
|
21-Sep-2013 |
Juergen Ributzka <juergen@apple.com> |
Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too."
This reverts commit r191130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191138 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1941431f8a0f61fb5d5e3175cc49efd5dd19033c |
|
21-Sep-2013 |
Juergen Ributzka <juergen@apple.com> |
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
The Type Legalizer recognizes that VSELECT needs to be split, because the type
is to wide for the given target. The same does not always apply to SETCC,
because less space is required to encode the result of a comparison. As a result
VSELECT is split and SETCC is unrolled into scalar comparisons.
This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG
Combiner. If a matching pattern is found, then the result mask of SETCC is
promoted to the expected vector mask for the given target. This mask has usually
te same size as the VSELECT return type (except for Intel KNL). Now the type
legalizer will split both VSELECT and SETCC.
This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX
pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c2286720de4f665dc2750d54c3748d331f81e105 |
|
20-Sep-2013 |
David Blaikie <dblaikie@gmail.com> |
Add braces to suppress Clang's dangling-else warning.
These violations were introduced in r191049
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ceb3b4649086c4aa6aa535440748c5860093f6e6 |
|
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
PR16726: extend rol/ror matching
C-like languages promote types like unsigned short to unsigned int before
performing an arithmetic operation. Currently the rotate matcher in the
DAGCombiner does not consider this situation.
This commit extends the DAGCombiner in the way that the pattern
(or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y))))
is folded into
([az]ext (rotl x, y))
The matching is restricted to aext and zext because in this cases the upper
bits are either undefined or known. Test case is included.
This fixes PR16726.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7cb98c9cb7688ad775d4dee07ca66570f1c030d1 |
|
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
Revert PR16726: extend rol/ror matching
There is a buildbot failure. Need to investigate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191048 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a5950e0149871671847c051c95113460f161e384 |
|
20-Sep-2013 |
Kai Nacke <kai.nacke@redstar.de> |
PR16726: extend rol/ror matching
C-like languages promote types like unsigned short to unsigned int before
performing an arithmetic operation. Currently the rotate matcher in the
DAGCombiner does not consider this situation.
This commit extends the DAGCombiner in the way that the pattern
(or (shl ([az]ext x), (*ext y)), (srl ([az]ext x), (*ext (sub 32, y))))
is folded into
([az]ext (rotl x, y))
The matching is restricted to aext and zext because in this cases the upper
bits are either undefined or known. Test case is included.
This fixes PR16726.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191045 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 530d09a22bd2f5c638ae1932bed560c8a46e399e |
|
19-Sep-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't fold vector muls with constants that look like a splat of a power of 2 but differ in bit width.
PR17283.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191000 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77364b7a200682e84f75171f30f8a77005b87e94 |
|
15-Sep-2013 |
Hal Finkel <hfinkel@anl.gov> |
Prevent assert in CombinerGlobalAA with null values
DAGCombiner::isAlias can be called with SrcValue1 or SrcValue2 null, and we
can't use AA in this case (if we try, then the casting code in AA will assert).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190763 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 253acef7a5ea2fbba7848d2257ae3cce2ea02ce0 |
|
29-Aug-2013 |
Hal Finkel <hfinkel@anl.gov> |
Use TargetSubtargetInfo::useAA() in DAGCombine
This uses the TargetSubtargetInfo::useAA() function to control the defaults of
the -combiner-alias-analysis and -combiner-global-alias-analysis options.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189564 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2b884bcbce3ec76bd065d2dd9a6597f13e9fdd57 |
|
29-Aug-2013 |
Juergen Ributzka <juergen@apple.com> |
Fix a typo and coding style of a previous commit. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5d8c2e460cac05dedf3466d630995f1475317fc9 |
|
27-Aug-2013 |
Tim Northover <tnorthover@apple.com> |
DAGCombiner: make sure or/shl/srl really has zero high bits before forming bswap
We want to convert code like (or (srl N, 8), (shl N, 8)) into (srl (bswap N),
const), but this is only valid if the bits above 16 on the source pattern are
0, the checks we were doing on this were slightly wrong before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| edd08f74289c6ba3b3f8e730e4ab825ef9bd6492 |
|
26-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
SelectionDAG: Remove unnecessary uses of TargetLowering::getPointerTy()
If we have a binary operation like ISD:ADD, we can set the result type
equal to the result type of one of its operands rather than using
TargetLowering::getPointerTy().
Also, any use of DAG.getIntPtrConstant(C) as an operand for a binary
operation can be replaced with:
DAG.getConstant(C, OtherOperand.getValueType());
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189227 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 915e936de270c3c57df1382b683001adc2c0d695 |
|
21-Aug-2013 |
Juergen Ributzka <juergen@apple.com> |
Teach BaseIndexOffset::match to identify base pointers in loops.
The small utility function that pattern matches Base + Index +
Offset patterns for loads and stores fails to recognize the base
pointer for loads/stores from/into an array at offset 0 inside a
loop. As a result DAGCombiner::MergeConsecutiveStores was not able
to merge all stores.
This commit fixes the issue by adding an additional pattern match
and also a test case.
Reviewer: Nadav
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0ff1190888f5b24f64a196392c452800447186d8 |
|
15-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Replace getValueType().getSimpleVT() with getSimpleValueType().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 51a0280d296405cb1fdb268e5387867e0db2e46e |
|
13-Aug-2013 |
Jim Grosbach <grosbach@apple.com> |
DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
A common idiom is to use zero and all-ones as sentinal values and to
check for both in a single conditional ("x != 0 && x != (unsigned)-1").
That generates code, for i32, like:
testl %edi, %edi
setne %al
cmpl $-1, %edi
setne %cl
andb %al, %cl
With this transform, we generate the simpler:
incl %edi
cmpl $1, %edi
seta %al
Similar improvements for other integer sizes and on other platforms. In
general, combining the two setcc instructions into one is better.
rdar://14689217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188315 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 01d22aaa78b831ad4837f928e0554be7e65addaa |
|
08-Aug-2013 |
Craig Topper <craig.topper@gmail.com> |
Optimize mask generation for one of the DAG combiner shufflevector cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 425b76c2314ff7ee7ad507011bdda1988ae481ef |
|
06-Aug-2013 |
Tom Stellard <thomas.stellard@amd.com> |
TargetLowering: Add getVectorIdxTy() function v2
This virtual function can be implemented by targets to specify the type
to use for the index operand of INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT,
INSERT_SUBVECTOR, EXTRACT_SUBVECTOR. The default implementation returns
the result from TargetLowering::getPointerTy()
The previous code was using TargetLowering::getPointerTy() for vector
indices, because this is guaranteed to be legal on all targets. However,
using TargetLowering::getPointerTy() can be a problem for targets with
pointer sizes that differ across address spaces. On such targets,
when vectors need to be loaded or stored to an address space other than the
default 'zero' address space (which is the address space assumed by
TargetLowering::getPointerTy()), having an index that
is a different size than the pointer can lead to inefficient
pointer calculations, (e.g. 64-bit adds for a 32-bit address space).
There is no intended functionality change with this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 75c9433b49b1e4e2d7e61249c3cd0e3ce910d5c8 |
|
30-Jul-2013 |
Quentin Colombet <qcolombet@apple.com> |
[DAGCombiner] insert_vector_elt: Avoid building a vector twice.
This patch prevents the following combine when the input vector is used more
than once.
insert_vector_elt (build_vector elt0, ..., eltN), NewEltIdx, idx
=>
build_vector elt0, ..., NewEltIdx, ..., eltN
The reasons are:
- Building a vector may be expensive, so try to reuse the existing part of a
vector instead of creating a new one (think big vectors).
- elt0 to eltN now have two users instead of one. This may prevent some other
optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187396 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1f67c63cb23ba5d405452d72bb8892df6b7ccd4f |
|
24-Jul-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free
This commit also implements these functions for R600 and removes a test
case that was relying on the buggy behavior.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187007 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a0ec3f9b7b826b9b40b80199923b664bad808cce |
|
14-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6c64fba6336a00e56d2428c45400c406b586f7f7 |
|
13-Jul-2013 |
Craig Topper <craig.topper@gmail.com> |
Pass SmallVector by const reference instead of by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 75d13065fda4b470f272311520f5dfe6c11460ce |
|
10-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Remove trailing whitespac
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186032 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e54885af9b54bfc7436a928a48d3db1ef88a2a70 |
|
09-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
AArch64/PowerPC/SystemZ/X86: This patch fixes the interface, usage, and all
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in
order to resolve the following issues with fmuladd (i.e. optional FMA)
intrinsics:
1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd
intrinsics even if the subtarget does not support FMA instructions, leading
to laughably bad code generation in some situations.
2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128,
resulting in a call to a software fp128 FMA implementation.
3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types
like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize,
etc. to types that support hardware FMAs.
The function has also been slightly renamed for consistency and to force a
merge/build conflict for any out-of-tree target implementing it. To resolve,
see comments and fixed in-tree examples.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bd6f1f6896275e04ce46c9ef82fd96e2e6c125dd |
|
09-Jul-2013 |
Hal Finkel <hfinkel@anl.gov> |
DAGCombine tryFoldToZero cannot create illegal types after type legalization
When folding sub x, x (and other similar constructs), where x is a vector, the
result is a vector of zeros. After type legalization, make sure that the input
zero elements have a legal type. This type may be larger than the result's
vector element type.
This was another bug found by llvm-stress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b49401533082fa0e8625c7cbaa0813db6c4c9bd5 |
|
09-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Style fixes: remove unnecessary braces for one-statement if blocks, no else after return, etc. No funcionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185893 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 155615d7dc4e4fbfd3b7273720a76356468edf46 |
|
08-Jul-2013 |
Stephen Lin <stephenwlin@gmail.com> |
Remove trailing whitespace from SelectionDAG/*.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f4eeab452ad4093986359c78a57321df12df99b0 |
|
06-Jul-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Don't drop extension behavior when shrinking a load when unsafe.
ReduceLoadWidth unconditionally drops extensions from loads. Limit it to the
case when all of the bits the extension would otherwise produce are dropped by
the shrink. It would be possible to shrink the load in more cases by merging
the extensions, but this isn't trivial and a very rare case. I left a TODO for
that case.
Fixes PR16551.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5bce67a95feb136389ca630cc5dd6a81e97ff1eb |
|
02-Jul-2013 |
Tim Northover <tnorthover@apple.com> |
DAGCombiner: fix use-counting issue when forming zextload
DAGCombiner was counting all uses of a load node when considering whether it's
worth combining into a zextload. Really, it wants to ignore the chain and just
count real uses.
rdar://problem/13896307
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d8026708ef9c1ebb326426d207cf79cba7ff09b3 |
|
26-Jun-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Fixed a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 87070fe1073b1e95748d987af0810d02aac43603 |
|
26-Jun-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184931 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2da863984bdd0123fa53ab3f5439d239a5a9e419 |
|
21-Jun-2013 |
Michael Liao <michael.liao@intel.com> |
Fix PR16360
When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7e6d620336d75c75086905184c451c6a2a21d6a3 |
|
15-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: slightly refactor DAGCombiner::visitSELECT_CC to avoid redudant checks...
This doesn't really effect performance due to all the relevant calls being transparent but is clearer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184027 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b05e4778f0871cbb02f61e4d55ad7375738a1d01 |
|
15-Jun-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Introduce getSelect usage and use more getSelectCC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a553bede23578dbf5233a28b1e67183d0911096c |
|
14-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: minor fix to order of operands in comments to match the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 38103d1012cb8a51da8866134886a0a8f35f4e30 |
|
14-Jun-2013 |
Stephen Lin <stephenwlin@gmail.com> |
SelectionDAG: Fix incorrect condition checks in some cases of folding FADD/FMUL combinations; also improve accuracy of comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ac6d9bec671252dd1e596fa71180ff6b39d06b5d |
|
25-May-2013 |
Andrew Trick <atrick@apple.com> |
Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c6af2432c802d241c8fffbe0371c023e6c58844e |
|
25-May-2013 |
Michael J. Spencer <bigcheesegs@gmail.com> |
Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182680 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 225ed7069caae9ece32d8bd3d15c6e41e21cc04b |
|
18-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Add LLVMContext argument to getSetCCResultType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9aa8fdfddb7a01f52d887176823dfc4e3f9a81a1 |
|
17-May-2013 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
Replace redundant code
Use EVT::changeExtendedVectorElementTypeToInteger instead of doing the
same thing that it does
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182165 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a753ff72b2dfcd9c09451a124373e0a8ed1a1d47 |
|
13-May-2013 |
Bob Wilson <bob.wilson@apple.com> |
Remove redundant variable introduced by r181682.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3778c04b2e3bc879cb7f175ba4d42f23fb9cef76 |
|
13-May-2013 |
Hao Liu <Hao.Liu@arm.com> |
Fix PR15950 A bug in DAG Combiner about undef mask
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181682 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 768ebcdf631baa1b18dc65a5983a237b307a99c2 |
|
10-May-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Generate a correct constant for vector types when folding (xor (and)) into (and (not)).
PR15948.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 363160a6be82df343fa60aa09d9d8f8f44605529 |
|
08-May-2013 |
David Majnemer <david.majnemer@gmail.com> |
DAGCombiner: Simplify inverted bit tests
Fold (xor (and x, y), y) -> (and (not x), y)
This removes an opportunity for a constant to appear twice.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181395 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2720248ae5b0201a7bdba57f3625869b578f2a5d |
|
06-May-2013 |
Michael Kuperstein <michael.m.kuperstein@intel.com> |
Fix slightly too aggressive conact_vector optimization.
(Would sometimes optimize away conacts used to extend a vector with undef values)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b2ed5fac0693e949ffdbf45266f5d53839211b63 |
|
01-May-2013 |
Nadav Rotem <nrotem@apple.com> |
Optimize away nop CONCAT_VECTOR nodes.
Optimize CONCAT_VECTOR nodes that merge EXTRACT_SUBVECTOR values that extract from the same vector.
rdar://13402653
PR15866
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180871 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 730a570c8c1b84f650ae92bacd61c88cfef9c6a4 |
|
26-Apr-2013 |
Silviu Baranga <silviu.baranga@arm.com> |
Re-write the address propagation code for pre-indexed loads/stores to take into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6242fda42ad13eebc908e744426ae7bc8cf8d1c3 |
|
26-Apr-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Canonicalize vector integer abs in the same way we do it for scalars.
This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed5707baf9be36c0d06c278f589b6c55db8b96c0 |
|
23-Apr-2013 |
Owen Anderson <resistor@mac.com> |
DAGCombine should not aggressively fold SEXT(VSETCC(...)) into a wider VSETCC without first checking the target's vector boolean contents.
This exposed an issue with PowerPC AltiVec where it appears it was setting the wrong vector boolean contents. The included change
fixes the PowerPC tests, and was OK'd by Hal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180129 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6265d5c91a18b2fb6499eb581c488315880c044d |
|
20-Apr-2013 |
Tim Northover <Tim.Northover@arm.com> |
Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179939 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6fac1fbf30e41d33506b5bc66aa480ac7de7531d |
|
09-Apr-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Fold a shuffle on CONCAT_VECTORS into a new CONCAT_VECTORS if possible.
This pattern occurs in SROA output due to the way vector arguments are lowered
on ARM.
The testcase from PR15525 now compiles into this, which is better than the code
we got with the old scalarrepl:
_Store:
ldr.w r9, [sp]
vmov d17, r3, r9
vmov d16, r1, r2
vst1.8 {d16, d17}, [r0]
bx lr
Differential Revision: http://llvm-reviews.chandlerc.com/D647
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e737018a86fa3da37f74ec1757603f933efcf5aa |
|
02-Apr-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
DAGCombiner: Merge store/loads when we have extload/truncstores
This is helps on architectures where i8,i16 are not legal but we have byte, and
short loads/stores. Allowing us to merge copies like the one below on ARM.
copy(char *a, char *b, int n) {
do {
int t0 = a[0];
int t1 = a[1];
b[0] = t0;
b[1] = t1;
radar://13536387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f28a29b776b7dc2b97d09c75d69494f862c216b3 |
|
01-Apr-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
Merge load/store sequences with adresses: base + index + offset
We would also like to merge sequences that involve a variable index like in the
example below.
int index = *idx++
int i0 = c[index+0];
int i1 = c[index+1];
b[0] = i0;
b[1] = i1;
By extending the parsing of the base pointer to handle dags that contain a
base, index, and offset we can handle examples like the one above.
The dag for the code above will look something like:
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i8 load %index))))
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i32 add (i32 signextend (i8 load %index))
(i32 1)))))
The code that parses the tree ignores the intermediate sign extensions. However,
if there is a sign extension it needs to be on all indexes.
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (add (i8 load %index)
(i8 1))))
vs
(load (i64 add (i64 copyfromreg %c)
(i64 signextend (i32 add (i32 signextend (i8 load %index))
(i32 1)))))
radar://13536387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b68b758bbb6718fc67423109eeb9df64c711a37 |
|
30-Mar-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine: visitXOR can replace a node without returning it, bail out in that case.
Fixes the crash reported in PR15608.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178429 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b4f98ea1213c866f39aa5b341ec0116f9c2335d7 |
|
26-Mar-2013 |
Michael Liao <michael.liao@intel.com> |
Enhance folding of (extract_subvec (insert_subvec V1, V2, IIdx), EIdx)
- Handle the case where the result of 'insert_subvect' is bitcasted
before 'extract_subvec'. This removes the redundant insertf128/extractf128
pair on unaligned 256-bit vector load/store on vectors of non 64-bit integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1cd1d02141788b212e185d190b4c358e47cc74b4 |
|
25-Mar-2013 |
Shuxin Yang <shuxin.llvm@gmail.com> |
Disable some unsafe-fp-math DAG-combine transformation after legalization.
For instance, following transformation will be disabled:
x + x + x => 3.0f * x;
The problem of these transformations is that it introduces a FP constant, which
following Instruction-Selection pass cannot handle.
Reviewed by Nadav, thanks a lot!
rdar://13445387
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1a5c0510ecb029b7e5d04249cdd4e50b97bf1c3f |
|
12-Mar-2013 |
Richard Relph <Richard.Relph@amd.com> |
Avoid generating ISD::SELECT for vector operands to SIGN_EXTEND
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176881 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ef5383b3537a420c5e2ab3e657c378e5185549d |
|
08-Mar-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Use correct value type for checking legality of BR_CC v3
LegalizeDAG.cpp uses the value of the comparison operands when checking
the legality of BR_CC, so DAGCombiner should do the same.
v2:
- Expand more BR_CC value types for NVPTX
v3:
- Expand correct BR_CC value types for Hexagon, Mips, and XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f31bd0f7d92fdab64a478ccf6497e887d454d4af |
|
21-Feb-2013 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Make the post-legalize vector op optimization more aggressive.
A legal BUILD_VECTOR goes in and gets constant folded into another legal
BUILD_VECTOR so we don't lose any legality here. The problematic PPC
optimization that made this check necessary was fixed recently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c46e2df74cf75a33742f57d2b4d6c6fcf73bced9 |
|
20-Feb-2013 |
Arnold Schwaighofer <aschwaighofer@apple.com> |
DAGCombiner: Fold pointless truncate, bitcast, buildvector series
(2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y)))
can be folded into a (2xi32) (buildvector i32 a, i32 b).
Such a DAG would cause uneccessary vdup instructions followed by vmovn
instructions.
We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in
the vectorized version of the code below.
double A[N];
double B[N];
void test_double_compare_to_double() {
int i;
for(i=0;i<N;i++)
A[i] = (double)(A[i] < B[i]);
}
radar://13191881
Fixes bug 15283.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6cc4b8d1eb2adf547807044e0a97f3a255733784 |
|
14-Feb-2013 |
Nadav Rotem <nrotem@apple.com> |
Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175190 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 39125d9a3a319b6dfd1fba639cd7df2fa1465a8e |
|
14-Feb-2013 |
Owen Anderson <resistor@mac.com> |
Add some legality checks for SETCC before introducing it in the DAG combiner post-operand legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175149 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5c97450df748819381daa4c4d400c39b0d7378ae |
|
12-Feb-2013 |
Paul Redmond <paul.redmond@intel.com> |
PR14562 - Truncation of left shift became undef
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32))
into (shl i32 v, 32) into undef. To prevent this, check the shift count
against the final result size.
Patch by: Kevin Schoedel
Reviewed by: Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174972 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0fde6dc029a33945bfeea7082a03940f664943c |
|
12-Feb-2013 |
Pete Cooper <peter_cooper@apple.com> |
Check type for legality before forming a select from loads.
Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later.
I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 089a5f8a8c5e24f996dd41419de2c7bc7b42ea29 |
|
08-Feb-2013 |
Hal Finkel <hfinkel@anl.gov> |
DAGCombiner: Constant folding around pre-increment loads/stores
Previously, even when a pre-increment load or store was generated,
we often needed to keep a copy of the original base register for use
with other offsets. If all of these offsets are constants (including
the offset which was combined into the addressing mode), then this is
clearly unnecessary. This change adjusts these other offsets to use the
new incremented address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b48783b09127136c98cc6b0399be757728504e56 |
|
05-Feb-2013 |
Owen Anderson <resistor@mac.com> |
Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load. This caused infinite loops in DAG combine with the
original application of this patch.
ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment. However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.
This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| eb260b252749470654ef0655aa1d1334a4c0d983 |
|
05-Feb-2013 |
NAKAMURA Takumi <geek4civic@gmail.com> |
Revert r174343, "When the target-independent DAGCombiner inferred a higher alignment for a load,"
It caused hangups in compiling clang/lib/Parse/ParseDecl.cpp and clang/lib/Driver/Tools.cpp in stage2 on some hosts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174374 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 429f7ef0c116c0504052b9a6655ef4d973177e9d |
|
05-Feb-2013 |
Owen Anderson <resistor@mac.com> |
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment. However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.
This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 98b93e5a94f69f6c7b12152a98455f501db1895d |
|
02-Feb-2013 |
Shuxin Yang <shuxin.llvm@gmail.com> |
rdar://13126763
Fix a bug in DAGCombine. The symptom is mistakenly optimizing expression
"x + x*x" into "x * 3.0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174239 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0c8607ba6a21578996a7532b9390afba13bd2087 |
|
20-Jan-2013 |
Nadav Rotem <nrotem@apple.com> |
Revert 172708.
The optimization handles esoteric cases but adds a lot of complexity both to the X86 backend and to other backends.
This optimization disables an important canonicalization of chains of SEXT nodes and makes SEXT and ZEXT asymmetrical.
Disabling the canonicalization of consecutive SEXT nodes into a single node disables other DAG optimizations that assume
that there is only one SEXT node. The AVX mask optimizations is one example. Additionally this optimization does not update the cost model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172968 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6c327f92a562d9d280bdbc3bde3c0ce269a4c65c |
|
17-Jan-2013 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimization for the following SIGN_EXTEND pairs:
v8i8 -> v8i64,
v8i8 -> v8i32,
v4i8 -> v4i64,
v4i16 -> v4i64
for AVX and AVX2.
Bug 14865.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 89e88e30bff4a5f4303dc9e44d3faa89b81af5a8 |
|
14-Jan-2013 |
Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
This patch addresses an incorrect transformation in the DAG combiner.
The included test case is derived from one of the GCC compatibility tests.
The problem arises after the selection DAG has been converted to type-legalized
form. The combiner first sees a 64-bit load that can be converted into a
pre-increment form. The original load feeds into a SRL that isolates the
upper 32 bits of the loaded doubleword. This looks like an opportunity for
DAGCombiner::ReduceLoadWidth() to replace the 64-bit load with a 32-bit load.
However, this transformation is not valid, as the replacement load is not
a pre-increment load. The pre-increment load produces an extra result,
which feeds a subsequent add instruction. The replacement load only has
one result value, and this value is propagated to all uses of the pre-
increment load, including the add. Because the add is looking for the
second result value as its operand, it ends up attempting to add a constant
to a token chain, resulting in a crash.
So the patch simply disables this transformation for any load with more than
two result values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172480 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 78ec0255d9ab184af7799c14d93879e5f21b9007 |
|
09-Jan-2013 |
Evan Cheng <evan.cheng@apple.com> |
Fix a DAG combine bug visitBRCOND() is transforming br(xor(x, y)) to br(x != y).
It cahced XOR's operands before calling visitXOR() but failed to update the
operands when visitXOR changed the XOR node.
rdar://12968664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 56d433dffe02e14cafaab44d2628e20dc0bf26fe |
|
07-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Sink AddrMode back into TargetLowering, removing one of the most
peculiar headers under include/llvm.
This struct still doesn't make a lot of sense, but it makes more sense
down in TargetLowering than it did before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d40758b24ebab5777131533d9369e707fc852594 |
|
02-Jan-2013 |
Tom Stellard <thomas.stellard@amd.com> |
DAGCombiner: Avoid generating illegal vector INT_TO_FP nodes
DAGCombiner::reduceBuildVecConvertToConvertBuildVec() was making two
mistakes:
1. It was checking the legality of scalar INT_TO_FP nodes and then generating
vector nodes.
2. It was passing the result value type to
TargetLoweringInfo::getOperationAction() when it should have been
passing the value type of the first operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b8c9a80f20772c3793201ab5b251d3520b9cea3 |
|
02-Jan-2013 |
Chandler Carruth <chandlerc@gmail.com> |
Move all of the header files which are involved in modelling the LLVM IR
into their new header subdirectory: include/llvm/IR. This matches the
directory structure of lib, and begins to correct a long standing point
of file layout clutter in LLVM.
There are still more header files to move here, but I wanted to handle
them in separate commits to make tracking what files make sense at each
layer easier.
The only really questionable files here are the target intrinsic
tablegen files. But that's a battle I'd rather not fight today.
I've updated both CMake and Makefile build systems (I think, and my
tests think, but I may have missed something).
I've also re-sorted the includes throughout the project. I'll be
committing updates to Clang, DragonEgg, and Polly momentarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 831737d329a727f53a1fb0572f7b7a8127208881 |
|
30-Dec-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove the Function::getFnAttributes method in favor of using the AttributeSet
directly.
This is in preparation for removing the use of the 'Attribute' class as a
collection of attributes. That will shift to the AttributeSet class instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 444b4bf5c84c80833ff283244de0885124091a13 |
|
27-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Refactor DAGCombinerInfo. Change the different booleans that indicate if we are before or after different runs of DAGCo, with the CombineLevel enum.
Also, added a new API for checking if we are running before or after the LegalizeVectorOps phase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 99d8e76d44bcf72aef1a90df545c302172006768 |
|
20-Dec-2012 |
Bob Wilson <bob.wilson@apple.com> |
Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/12879313>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fdbeb057b8a844b641f323fd27a61ffcb32b43da |
|
19-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170524 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4b977312c7a9c078211de83771b40a1561deb047 |
|
19-Dec-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Optimized load + SIGN_EXTEND patterns in the X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170506 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9a65a01eeb97cdc10ca6b97ade3f9f8aba11fa9f |
|
13-Dec-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bug in DAGCombiner::MatchBSwapHWord. Make sure the node has operands before referencing them. rdar://12868039
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 981b96376a99dacced70cc9b1e870968f426331a |
|
12-Dec-2012 |
Manman Ren <mren@apple.com> |
DAGCombine: clamp hi bit in APInt::getBitsSet to avoid assertion
rdar://12838504
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 34525f9ac098c1c6bc9002886d6da3039a284fd2 |
|
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 204301f0459c1deb6c535723760c848ba2fcd42b |
|
11-Dec-2012 |
Patrik Hagglund <patrik.h.hagglund@ericsson.com> |
Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169843 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1c49fda408ae5ba90fdaf1b274edd1119aea58b7 |
|
11-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Fix a miscompile in the DAG combiner. Previously, we would incorrectly
try to reduce the width of this load, and would end up transforming:
(truncate (lshr (sextload i48 <ptr> as i64), 32) to i32)
to
(truncate (zextload i32 <ptr+4> as i64) to i32)
We lost the sext attached to the load while building the narrower i32
load, and replaced it with a zext because lshr always zext's the
results. Instead, bail out of this combine when there is a conflict
between a sextload and a zext narrowing. The rest of the DAG combiner
still optimize the code down to the proper single instruction:
movswl 6(...),%eax
Which is exactly what we wanted. Previously we read past the end *and*
missed the sign extension:
movl 6(...), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 48b509c77318cc6e753513ca5dcdd67e18094235 |
|
10-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combine to handle vector add/sub with vectors of all 0s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5a0f372feb994a07ce40687c5ecff2e2c792bf24 |
|
09-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove extra blank line.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9472b4fbf96fb840eb416acd00bbee173c62e8da |
|
08-Dec-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combine to handle vector logical operations with vectors of all 1s or all 0s. These cases can show up when vectors are split for legalizing. Fix some tests that were dependent on these cases not being combined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169684 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dde785cd70a4a7418f310a0d86afcbfe3dd8dbfe |
|
06-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a bug in the code that merges consecutive stores. Previously we did not
check if loads that happen in between stores alias with the first store in the
chain, only with the second store onwards.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d04a8d4b33ff316ca4cf961e06c9e312eff8e64f |
|
03-Dec-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.
Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a569a80e58fd89f08600b002f2e46b60ed2ba554 |
|
02-Dec-2012 |
Nadav Rotem <nrotem@apple.com> |
Allow merging multiple store sequences on the same chain.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 90e11dc8ada81015becd6f613152131e5c28a29d |
|
29-Nov-2012 |
Nadav Rotem <nrotem@apple.com> |
When combining consecutive stores allow loads in between the stores, if the loads do not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8e2b8ae3b11b9778da5cb54d330e984b33979bf9 |
|
14-Nov-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Handle DAG CSE adding new uses during ReplaceAllUsesWith. Fixes PR14333.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167912 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| efcc1aec6459c356c6516e28be29acaa51e876fa |
|
03-Nov-2012 |
Owen Anderson <resistor@mac.com> |
Be careful not to optimize a SELECT_CC into a SETCC post-legalization if the SETCC node would be illegal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 607ebde651f18d68e45724c6e3b3544d4786879f |
|
01-Nov-2012 |
Owen Anderson <resistor@mac.com> |
Add a few more simple fast-math constant propagations and cancellations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e669c930a61dd56891df2f9822966ecb173c8072 |
|
29-Oct-2012 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
In various places throughout the code generator, there were special
checks to avoid performing compile-time arithmetic on PPCDoubleDouble.
Now that APFloat supports arithmetic on PPCDoubleDouble, those checks
are no longer needed, and we can treat the type like any other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166958 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1a5cc710ee78bf55c3799b49c6fd37619d2dbb7b |
|
24-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (buildvec (Xint2fp x)) to (Xint2fp (buildvec x))
- If more than 1 elemennts are defined and target supports the vectorized
conversion, use the vectorized one instead to reduce the strength on
conversion operation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166546 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| adf38913f815a2a453d4783e88b1528473b4740d |
|
24-Oct-2012 |
Jakub Staszak <kubastaszak@gmail.com> |
Keep coding standard. Don't evaluate getNumOperands() every time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166531 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fac14ab1795cfce21e4e5e51c711a11f6181074b |
|
24-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Clean up code and put transformation on (build_vec (ext x)) into a helper func
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9aecdb51c743f13f88748ef3c539a3e6e6df9e99 |
|
19-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Simplify condition checking as CONCAT assume all inputs of the same type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166260 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1c5bf3f429927c31b9ffc1308ea1ada7a58ee1c0 |
|
18-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
In SimplifySelectOps we pulled two loads through a select node despite the fact that one was dependent on the other.
rdar://12513091
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166196 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07edaf3801f7169477bab6d33cad86209ea8f558 |
|
18-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Revert part of r166049 back and enable test case in r166125.
- Folding (trunc (concat ... X )) to (concat ... (trunc X) ...) is valid
when '...' are all 'undef's.
- r166125 relies on this transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166155 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4031e9018b071d25e5fc905aa38a943fcd9facb6 |
|
18-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Revert r166049
- In general, it's unsafe for this transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166135 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 13429e224cb165dae658ae4ea3ef67d69c1860fa |
|
17-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_i
- If the extracted vector has the same type of all vectored being concatenated
together, it should be simplified directly into v_i, where i is the index of
the element being extracted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 272ea0323999890d8bcf75b873a1c8ab2cdcba0d |
|
16-Oct-2012 |
Michael Liao <michael.liao@intel.com> |
Teach DAG combine to fold (trunc (fptoXi x)) to (fptoXi x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ad6aedc7d980d407da4452ff3ed4592d3df1a3f7 |
|
09-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Refactor the AddrMode class out of TLI to its own header file.
This class is used by LSR and a number of places in the codegen.
This is the first step in de-coupling LSR from TLI, and creating
a new interface in between them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3574eca1b02600bac4e625297f4ecf745f4c4f32 |
|
08-Oct-2012 |
Micah Villmow <villmow@gmail.com> |
Move TargetData to DataLayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a4b5050cf5af18ac18565073fecbfcb95f93556b |
|
05-Oct-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Remove unused but set variable flagged by GCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ebd7eabca4c090175b71f221e880f8bd937a4523 |
|
05-Oct-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Simplify code, don't or a bool with an uint64_t.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ea2c50c0416555a91cf963618f07c90a4c791708 |
|
05-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
When merging connsecutive stores, use vectors to store the constant zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165267 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e7d38192de6ccdc54cf138fabdf00b81a6cd11d |
|
03-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a cycle in the DAG. In this code we replace multiple loads with a single load and
multiple stores with a single load. We create the wide loads and stores (and their chains)
before we remove the scalar loads and stores and fix the DAG chain. We attempted to merge
loads with a different chain. When that happened, the assumption that it is safe to RAUW
broke and a cycle was introduced.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165148 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c653de6c0f3722154a41cbb57c213a0cdd789419 |
|
03-Oct-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for mergeing consecutive stores to memory. The optimization
is not profitable in many cases because modern processors perform multiple stores
in parallel and merging stores prior to merging requires extra work. We handle two main cases:
1. Store of multiple consecutive constants:
q->a = 3;
q->4 = 5;
In this case we store a single legal wide integer.
2. Store of multiple consecutive loads:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
In this case we load/store either ilegal vector registers or legal wide integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 73fab91f2cd5fa3dbe4593506ac4a31aa3faf897 |
|
30-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Revert r164910 because it causes failures to several phase2 builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e5f163a3b98a531c3ff35da0e97e7364c0e04b95 |
|
30-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 454627252b1cc43e81949d41eb20e9ea9560da58 |
|
29-Sep-2012 |
Duncan Sands <baldrick@free.fr> |
Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots. Original commit message:
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0eb5dadf657d38da9a8c7fe44c660bcfb6933038 |
|
29-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Tidy up to match coding standards. Remove 'else' after 'return' and moving operators to end of preceding line. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164887 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 32b7343a96feb052e8afa0c99fb3bfcac617f0a5 |
|
29-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace a couple if/elses around similar calls with conditional operators on the varying arguments. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 72f7b0811efef58080a909abbc14d74c40c0867d |
|
29-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164885 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 94c22716d60ff5edf6a98a3c67e0faa001be1142 |
|
27-Sep-2012 |
Sylvestre Ledru <sylvestre@debian.org> |
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7e2c793a2b5c746344652b6579e958ee42fafdcc |
|
27-Sep-2012 |
Sylvestre Ledru <sylvestre@debian.org> |
Fix a typo 'iff' => 'if'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6dfabb6cc72118e046d2a466aa6adcec4c4923db |
|
20-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix 80-col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 91a7e0184a4f7976ef11cb48697d2782fc1b9be7 |
|
13-Sep-2012 |
Nadav Rotem <nrotem@apple.com> |
Fix a dagcombine optimization. The optimization attempts to optimize a bitcast of fneg to integers
by xoring the high-bit. This fails if the source operand is a vector because we need to negate
each of the elements in the vector.
Fix rdar://12281066 PR13813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163802 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dd201ff1dcbc138cde07fb86896d491134987a2e |
|
11-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. Factor similar code out of FNEG DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8cd08bf4ac67b9d711fd1f72e6f5e00425d8c6ad |
|
10-Sep-2012 |
James Molloy <james.molloy@arm.com> |
Fix an assertion failure when optimising a shufflevector incorrectly into concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 956342b2104c734d4d6b758a58a799ccd3beb63d |
|
10-Sep-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to constant fold fneg of a BUILD_VECTOR of constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163483 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2943e378048636691eda1b1b4e437eea9da4a839 |
|
06-Sep-2012 |
Roman Divacky <rdivacky@freebsd.org> |
Constify this properly. Found by gcc48 -Wcast-qual.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163256 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3d5e161fe45f9553009c0377a5689324aab1c64a |
|
05-Sep-2012 |
Silviu Baranga <silviu.baranga@arm.com> |
Fixed the DAG combiner to better handle the folding of AND nodes for vector types. The previous code was making the assumption that the length of the bitmask returned by isConstantSplat was equal to the size of the vector type. Now we first make sure that the splat value has at least the length of the vector lane type, then we only use as many fields as we have available in the splat value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 58d5729540bec7c6f7aef19a9a6a179123deab47 |
|
01-Sep-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine a number of tricks to simplify FMA expressions in fast-math mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163051 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b79bff50bdf68615dfa1ddd2239c8d093e155e1f |
|
01-Sep-2012 |
Michael Liao <michael.liao@intel.com> |
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163049 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 43da6c7f13aedcc11530f9d81dbbb2ee07ad226a |
|
31-Aug-2012 |
Owen Anderson <resistor@mac.com> |
Teach the DAG combiner to turn chains of FADDs (x+x+x+x+...) into FMULs by constants. This is only enabled in unsafe FP math mode, since it does not preserve rounding effects for all such constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fdeb9fe5e08146d9cb953000cb893eda80329a08 |
|
22-Aug-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Rejected 169195. As Duncan commented, bitcasting to proper type is wrong approach. We need to insert some valid TRANCATE node here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 08da177c355dcde40dbe6c0a21b26956fcbca32c |
|
20-Aug-2012 |
Stepan Dyatkovskiy <stpworld@narod.ru> |
Fixed DAGCombiner bug (found and localized by James Malloy):
The DAGCombiner tries to optimise a BUILD_VECTOR by checking if it
consists purely of get_vector_elts from one or two source vectors. If
so, it either makes a concat_vectors node or a shufflevector node.
However, it doesn't check the element type width of the underlying
vector, so if you have this sequence:
Node0: v4i16 = ...
Node1: i32 = extract_vector_elt Node0
Node2: i32 = extract_vector_elt Node0
Node3: v16i8 = BUILD_VECTOR Node1, Node2, ...
It will attempt to:
Node0: v4i16 = ...
NewNode1: v16i8 = concat_vectors Node0, ...
Where this is actually invalid because the element width is completely
different. This causes an assertion failure on DAG legalization stage.
Fix:
If output item type of BUILD_VECTOR differs from input item type.
Make concat_vectors based on input element type and then bitcast it to the output vector type. So the case described above will transformed to:
Node0: v4i16 = ...
NewNode1: v8i16 = concat_vectors Node0, ...
NewNode2: v16i8 = bitcast NewNode1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7c626d30974c632ab500171ff185a24bcf2603bf |
|
14-Aug-2012 |
Owen Anderson <resistor@mac.com> |
Add a roundToIntegral method to APFloat, which can be parameterized over various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1503aba4a036f5394c7983417bc1e64613b2fc77 |
|
01-Aug-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
Added FMA functionality to X86 target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161110 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed1a335ece5c83230af662580e69008ed6fcca17 |
|
23-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fixed DAGCombine optimizations which generate select_cc for targets
that do not support it (X86 does not lower select_cc).
PR: 13428
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160619 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 96cb1128528a512f1ef9c28ae5e1b78a98dcc505 |
|
19-Jul-2012 |
Bill Wendling <isanbard@gmail.com> |
Remove tabs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160475 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a9e13ba3c8230073dd1157e4a17ef52906ac6cb8 |
|
17-Jul-2012 |
Evan Cheng <evan.cheng@apple.com> |
Back out r160101 and instead implement a dag combine to recover from instcombine transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160387 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b87bdac6a3de4ab83e23bf808f990e4bb7eade5e |
|
15-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Refactor the code that checks that all operands of a node are UNDEFs.
Add a micro-optimization to getNode of CONCAT_VECTORS when both operands are undefs.
Can't find a testcase for this because VECTOR_SHUFFLE already handles undef operands, but Duncan suggested that we add this.
Together with Michael Kuperstein <michael.m.kuperstein@intel.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b7e230d999deec5c90ee51a7c2bbc6ee5be0a914 |
|
14-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a dagcombine optimization to convert concat_vectors of undefs into a single undef.
The unoptimized concat_vectors isd prevented the canonicalization of the vector_shuffle node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 45299995d6a1273d644d127b4aeaf4e7eb365292 |
|
11-Jul-2012 |
Owen Anderson <resistor@mac.com> |
Only apply the SETCC+SITOFP -> SELECTCC optimization when the SETCC returns an MVT::i1, i.e. before type legalization.
This is a speculative fix for a problem on Mips reported by Akira Hatanaka.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160036 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2dd83eb1ab3b7d7cdef2e244317caefd78be8a45 |
|
10-Jul-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Improve the loading of load-anyext vectors by allowing the codegen to load
multiple scalars and insert them into a vector. Next, we shuffle the elements
into the correct places, as before.
Also fix a small dagcombine bug in SimplifyBinOpWithSameOpcodeHands, when the
migration of bitcasts happened too late in the SelectionDAG process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159991 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d9bf71fdd26475f4629ef8861debfd2c621a372f |
|
09-Jul-2012 |
Owen Anderson <resistor@mac.com> |
Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional move, since there are only two possible values.
Previously, this would become an integer extension operation, followed by a real integer->float conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 16436dffb50fac4677c7162639f8da0b73eb4e99 |
|
26-Jun-2012 |
Evan Cheng <evan.cheng@apple.com> |
Make sure type is not extended or untyped before create a constant of the type. No test case. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e0231413225cf47aaf3238bf21afd0d59025028d |
|
22-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Rename -allow-excess-fp-precision flag to -fuse-fp-ops, and switch from a
boolean flag to an enum: { Fast, Standard, Strict } (default = Standard).
This option controls the creation by optimizations of fused FP ops that store
intermediate results in higher precision than IEEE allows (E.g. FMAs). The
behavior of this option is intended to match the behaviour specified by a
soon-to-be-introduced frontend flag: '-ffuse-fp-ops'.
Fast mode - allows formation of fused FP ops whenever they're profitable.
Standard mode - allow fusion only for 'blessed' FP ops. At present the only
blessed op is the fmuladd intrinsic. In the future more blessed ops may be
added.
Strict mode - allow fusion only if/when it can be proven that the excess
precision won't effect the result.
Note: This option only controls formation of fused ops by the optimizers. Fused
operations that are explicitly requested (e.g. FMA via the llvm.fma.* intrinsic)
will always be honored, regardless of the value of this option.
Internally TargetOptions::AllowExcessFPPrecision has been replaced by
TargetOptions::AllowFPOpFusion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158956 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 438c04027bb5f219e8d77770828a555c42fd1d7c |
|
21-Jun-2012 |
Pete Cooper <peter_cooper@apple.com> |
Fix potential crash if DAGCombine on stores sees a half type
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158927 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3affd9e8f366f241adbbc57ef53489ff2052db4f |
|
20-Jun-2012 |
Pete Cooper <peter_cooper@apple.com> |
Add users of a MERGE_VALUE node to the worklist to process again when the node is removed. Sorry, no test case. Foudn it by inspection of the code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158839 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d65e463ff9327d168e8389e5c9a9f16a601be8a5 |
|
20-Jun-2012 |
Hal Finkel <hfinkel@anl.gov> |
Fix DAGCombine to deal with ext-conversion of pre/post_inc loads.
The test case for this will come with the PPC indexed preinc loads commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d693cafcfb9e67ba7040cb810e4409a166421482 |
|
20-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Add DAG-combines for aggressive FMA formation.
This patch adds DAG combines to form FMAs from pairs of FADD + FMUL or
FSUB + FMUL. The combines are performed when:
(a) Either
AllowExcessFPPrecision option (-enable-excess-fp-precision for llc)
OR
UnsafeFPMath option (-enable-unsafe-fp-math)
are set, and
(b) TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) is true for the type of
the FADD/FSUB, and
(c) The FMUL only has one user (the FADD/FSUB).
If your target has fast FMA instructions you can make use of these combines by
overriding TargetLoweringInfo::isFMAFasterThanMulAndAdd(VT) to return true for
types supported by your FMA instruction, and adding patterns to match ISD::FMA
to your FMA instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158757 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0180694b2f416e2247af1d284d701b19e1431a6c |
|
14-Jun-2012 |
Lang Hames <lhames@gmail.com> |
Make comment slightly more helpful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f917d20561688ca79fab5a58feb495e332f84903 |
|
30-May-2012 |
Owen Anderson <resistor@mac.com> |
Switch the canonical FMA term operand order to match both the comment I wrote and the usual LLVM convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 85ef6f4c99aee3c2ed43bbe6d190541f283a7e43 |
|
30-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAGCombine to canonicalize the position of a constant in the term operands of an FMA node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a249f7de5df0bb6260fdebee528221fc84092140 |
|
08-May-2012 |
Jim Grosbach <grosbach@apple.com> |
DAGCombiner should not change the type of an extract_vector index.
When a combine twiddles an extract_vector, care should be take to preserve
the type of the index operand. No luck extracting a reasonable testcase,
unfortunately.
rdar://11391009
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 713e953118175d693a3fddbf6a61dc73aa69ad87 |
|
07-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine to fold x-x to 0.0 when unsafe FP math is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156324 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 062c0a5b58b756b91811bf3e6e978257c9fda3ff |
|
03-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 363e4b90c0a8dfca87ac847001158c743491c06f |
|
02-May-2012 |
Owen Anderson <resistor@mac.com> |
Teach DAG combine that multiplication by 1.0 can always be constant folded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1da5867236f4132ec56493f3535c7b5830878b55 |
|
22-Apr-2012 |
Elena Demikhovsky <elena.demikhovsky@intel.com> |
ZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bc7d448f242b1bbc1031fb87cd69c285ff9aaffa |
|
21-Apr-2012 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Register DAGUpdateListeners with SelectionDAG.
Instead of passing listener pointers to RAUW, let SelectionDAG itself
keep a linked list of interested listeners.
This makes it possible to have multiple listeners active at once, like
RAUWUpdateListener was already doing. It also makes it possible to
register listeners up the call stack without controlling all RAUW calls
below.
DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG
list of active listeners.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 31490baf38680012000890dcb11ac4914ec94911 |
|
16-Apr-2012 |
Hal Finkel <hfinkel@anl.gov> |
Remove dead SD nodes after the combining pass. Fixes PR12201.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e506198c8cc7eec8f2f4fb4719a07daef17f931 |
|
11-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Reapply 154397. Original message:
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 507bb7a42fce6502f90268712cbc32158c17bb59 |
|
10-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Add a comment noting that the fdiv -> fmul conversion won't generate
multiplication by a denormal, and some tests checking that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b79855ee181b0a74507022894b0f753af0041121 |
|
10-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Revert r154397, which was causing make check failures on the buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77dde089abc8dcfd40c73f980ccebf3f2255405f |
|
10-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154397 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 999821cddfeb8fd5115261c539c951f8733c943a |
|
10-Apr-2012 |
Anton Korobeynikov <asl@math.spbu.ru> |
Transform div to mul with reciprocal only when fp imm is legal.
This fixes PR12516 and uncovers one weird problem in legalize (workarounded)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fdb230a154ead49cf0ded5b4587be994ec2f43e0 |
|
10-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Don't try to zExt just to check if an integer constant is zero, it might
not fit in a i64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| decbc43f72866fa33d18e4b63d0d2dd2a2e102f6 |
|
09-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Pattern match a setcc of boolean value with 0 as a truncate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154322 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f920423ffc41dcde33b25ea7d6f25272b709b7fc |
|
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unnecessary type check when combining and/or/xor of swizzles. Move some checks to allow better early out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b7135e5838f1d08378952de125af9006449fa25c |
|
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Remove unnecessary 'else' on an 'if' that always returns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4b206bdfd0839fe61fda3e0b6955a80646a93977 |
|
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Optimize code slightly. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154307 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ae1bec52f7a0e8b719e74f3575ec238094ff7599 |
|
09-Apr-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace some explicit checks with asserts for conditions that should never happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154305 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c47bc3321825ff3aa9aee4ff125c5e9ee853e449 |
|
08-Apr-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence sign-compare warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ef3fcfc0414b96d626b706c6151596684b7d134 |
|
08-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Only have codegen turn fdiv by a constant into fmul by the reciprocal
when -ffast-math, i.e. don't just always do it if the reciprocal can
be formed exactly. There is already an IR level transform that does
that, and it does it more carefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d16c8d0d336638225378466bc17c9db156401817 |
|
07-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
1. Remove the part of r153848 which optimizes shuffle-of-shuffle into a new
shuffle node because it could introduce new shuffle nodes that were not
supported efficiently by the target.
2. Add a more restrictive shuffle-of-shuffle optimization for cases where the
second shuffle reverses the transformation of the first shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 961d666be4f3714452ff9f15470f9255d85f0506 |
|
07-Apr-2012 |
Duncan Sands <baldrick@free.fr> |
Convert floating point division by a constant into multiplication by the
reciprocal if converting to the reciprocal is exact. Do it even if inexact
if -ffast-math. This substantially speeds up ac.f90 from the polyhedron
benchmarks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154265 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 26c8dcc692fb2addd475446cfff24d6a4e958bca |
|
04-Apr-2012 |
Rafael Espindola <rafael.espindola@gmail.com> |
Always compute all the bits in ComputeMaskedBits.
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 29f60f359b59032108cdabcde91217b6784c4e13 |
|
03-Apr-2012 |
Owen Anderson <resistor@mac.com> |
Add predicates for checking whether targets have free FNEG and FABS operations, and prevent the DAGCombiner from turning them into bitwise operations if they do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 44b5e6de8cb7a5562f698078415a3a9b608b8ed6 |
|
02-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Optimizing swizzles of complex shuffles may generate additional complex shuffles.
Do not try to optimize swizzles of shuffles if the source shuffle has more than
a single user, except when the source shuffle is also a swizzle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153864 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4ac9081c7110dbf099d682fa51c091741e763491 |
|
01-Apr-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
This commit contains a few changes that had to go in together.
1. Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B))
(and also scalar_to_vector).
2. Xor/and/or are indifferent to the swizzle operation (shuffle of one src).
Simplify xor/and/or (shuff(A), shuff(B)) -> shuff(op (A, B))
3. Optimize swizzles of shuffles: shuff(shuff(x, y), undef) -> shuff(x, y).
4. Fix an X86ISelLowering optimization which was very bitcast-sensitive.
Code which was previously compiled to this:
movd (%rsi), %xmm0
movdqa .LCPI0_0(%rip), %xmm2
pshufb %xmm2, %xmm0
movd (%rdi), %xmm1
pshufb %xmm2, %xmm1
pxor %xmm0, %xmm1
pshufb .LCPI0_1(%rip), %xmm1
movd %xmm1, (%rdi)
ret
Now compiles to this:
movl (%rsi), %eax
xorl %eax, (%rdi)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77d9521945fa46e03af9451b526fe0e588f44a04 |
|
27-Mar-2012 |
Chris Lattner <sabre@nondot.org> |
fix what looks like a real logic bug, found by PVS-Studio (part of PR12357)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0c9da210f703f0cc98f7e198db1b68073091ce25 |
|
20-Mar-2012 |
Craig Topper <craig.topper@gmail.com> |
When combining (vextract shuffle (load ), <1,u,u,u>), 0) -> (load ), add users of the final load to the worklist too. Needed by changes I'm preparing to make to X86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153078 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 00294caadb5cdb4cafeb5e1c05486a395fef590c |
|
19-Mar-2012 |
Duncan Sands <baldrick@free.fr> |
Fix DAG combine which creates illegal vector shuffles. Patch by Heikki Kultala.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6431ff96be8f2f7bf3428fdaa3ad4d30bf2c1db3 |
|
15-Mar-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5a89434236a4d6ad5fa6a570cbf3e717b757a148 |
|
15-Mar-2012 |
Bill Wendling <isanbard@gmail.com> |
Add a xform to the DAG combiner.
Transform:
(fsub x, (fadd x, y)) -> (fneg y) and
(fsub x, (fadd y, x)) -> (fneg y)
if 'unsafe math' is specified.
<rdar://problem/7540295>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a03d366c8887755080cf21e11c43d76d22610fdf |
|
13-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Fortify r152675 a bit. Although I'm not able to come up with a test case that would trigger the truncation case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 84387ea5f547f3b63dc701fdcac163b8dc797e5d |
|
13-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
DAG combine incorrectly optimize (i32 vextract (v4i16 load $addr), c) to
(i16 load $addr+c*sizeof(i16)) and replace uses of (i32 vextract) with the
i16 load. It should issue an extload instead: (i32 extload $addr+c*sizeof(i16)).
rdar://11035895
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152675 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d5f769065152d6d9331817c439caf9df0a5e8d69 |
|
10-Mar-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
Give dagcombiner's worklist some inline capacity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152454 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 03be3622aae67aa095bc047bcac88cdebebaafd6 |
|
07-Mar-2012 |
Evan Cheng <evan.cheng@apple.com> |
Extend r148086 to check for [r +/- reg] address mode. This fixes queens performance regression (due to increased register pressure from overly aggressive pre-inc formation).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| afd3d56b9dc791d37120922318293a021bd35598 |
|
06-Mar-2012 |
Owen Anderson <resistor@mac.com> |
Make it possible for a target to mark FSUB as Expand. This requires providing a default expansion (FADD+FNEG), and teaching DAGCombine not to form FSUBs post-legalize if they are not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152079 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6259dcdc576f4e35cdab27465a355630950b621b |
|
20-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Teach the DAGCombiner that certain loadext nodes followed by ANDs can be converted to zeroexts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6afa3f744a57933aef57b94a8e7a7148065c432c |
|
16-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Remove extraneous #include and spelling mistake introduced in r150669.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6660c05da33a93a011977454239cead97c3ff579 |
|
16-Feb-2012 |
James Molloy <james.molloy@arm.com> |
Modify the algorithm when traversing the DAGCombiner's worklist to be O(log N) for all operations. This fixes a horrible worst case with lots of nodes where 99% of the time was being spent in std::remove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150669 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0877fdf30bb626217f635547ca90741a8c7558ad |
|
13-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix a bug in DAGCombine for the optimization of BUILD_VECTOR. We cant generate a shuffle node from two vectors of different types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2ee746b87d9471d2dc024827cacdc46114ed3708 |
|
12-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
This patch addresses the problem of poor code generation for the zext
v8i8 -> v8i32 on AVX machines. The codegen often scalarizes ANY_EXTEND nodes.
The DAGCombiner has two optimizations that can mitigate the problem. First,
if all of the operands of a BUILD_VECTOR node are extracted from an ZEXT/ANYEXT
nodes, then it is possible to create a new simplified BUILD_VECTOR which uses
UNDEFS/ZERO values to eliminate the scalar ZEXT/ANYEXT nodes.
Second, another dag combine optimization lowers BUILD_VECTOR into a shuffle
vector instruction.
In the case of zext v8i8->v8i32 on AVX, a value in an XMM register is to be
shuffled into a wide YMM register.
This patch modifes the second optimization and allows the creation of
shuffle vectors even when the newly generated vector and the original vector
from which we extract the values are of different types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150340 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc870a8f936bfc478b7d3d39724dd604a9de8f76 |
|
05-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Add additional documentation to the extract-and-trunc dagcombine optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7e413e9c94294f17daa64ac9fda09a738e20caa5 |
|
03-Feb-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
The type-legalizer often scalarizes code. One of the common patterns is extract-and-truncate.
In this patch we optimize this pattern and convert the sequence into extract op of a narrow type.
This allows the BUILD_VECTOR dag optimizations to construct efficient shuffle operations in many cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ba05c91ed28e70505ac854dce976ac14f4c6e602 |
|
17-Jan-2012 |
Nadav Rotem <nadav.rotem@intel.com> |
Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d3b588965daf43d5fd13c7bf6603c9f8017a041c |
|
17-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Teach DAG combiner to turn a BUILD_VECTOR of UNDEFs into an UNDEF of vector type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ae4746b29a3f418dde0b8e2820019ec07303594e |
|
15-Jan-2012 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombiner: Deduplicate code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148217 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c4b527ac06c8e2e7c43020a56f000a53ab1dc9de |
|
13-Jan-2012 |
Evan Cheng <evan.cheng@apple.com> |
DAGCombine's logic for forming pre- and post- indexed loads / stores were being
overly conservative. It was concerned about cases where it would prohibit
folding simple [r, c] addressing modes. e.g.
ldr r0, [r2]
ldr r1, [r2, #4]
=>
ldr r0, [r2], #4
ldr r1, [r2]
Change the logic to look for such cases which allows it to form indexed memory
ops more aggressively.
rdar://10674430
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f103b3d1b99db0ae314c36d8b4ae71427816379e |
|
11-Jan-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Teach the X86 instruction selection to do some heroic transforms to
detect a pattern which can be implemented with a small 'shl' embedded in
the addressing mode scale. This happens in real code as follows:
unsigned x = my_accelerator_table[input >> 11];
Here we have some lookup table that we look into using the high bits of
'input'. Each entity in the table is 4-bytes, which means this
implicitly gets turned into (once lowered out of a GEP):
*(unsigned*)((char*)my_accelerator_table + ((input >> 11) << 2));
The shift right followed by a shift left is canonicalized to a smaller
shift right and masking off the low bits. That hides the shift right
which x86 has an addressing mode designed to support. We now detect
masks of this form, and produce the longer shift right followed by the
proper addressing mode. In addition to saving a (rather large)
instruction, this also reduces stalls in Intel chips on benchmarks I've
measured.
In order for all of this to work, one part of the DAG needs to be
canonicalized *still further* than it currently is. This involves
removing pointless 'trunc' nodes between a zextload and a zext. Without
that, we end up generating spurious masks and hiding the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147936 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 704e1a0f044614e6d2da236380c890fa5f2d1e03 |
|
07-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Replace some uses of hasNUsesOfValue(0, X) with !hasAnyUseOfValue(X)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147733 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc274526ef801c23083bb76e335bb5152dddcc58 |
|
07-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Add some DAG combines for SUBC/SUBE. If nothing uses the carry/borrow out of subc, turn it into a sub. Turn (subc x, x) into 0 with no borrow. Turn (subc x, 0) into x with no borrow. Turn (subc -1, x) into (xor x, -1) with no borrow. Turn sube with no borrow in into subc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 62dfc511524b28a9411f62e19d48120066c1e41b |
|
05-Jan-2012 |
Chandler Carruth <chandlerc@gmail.com> |
Prevent a DAGCombine from firing where there are two uses of
a combined-away node and the result of the combine isn't substantially
smaller than the input, it's just canonicalized. This is the first part
of a significant (7%) performance gain for Snappy's hot decompression
loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 481b79c95003a3a72b315dbda966779392ee0c19 |
|
04-Jan-2012 |
Craig Topper <craig.topper@gmail.com> |
Implement VECTOR_SHUFFLE canonicalizations during DAG combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147525 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d6e2560e7aea0e6c6bca950966252552f1caec63 |
|
26-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure DAGCombiner doesn't introduce multiple loads from the same memory location. PR10747, part 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147283 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 63974b2144c87c962effdc0508c27643c8ad98b6 |
|
13-Dec-2011 |
Chandler Carruth <chandlerc@gmail.com> |
Initial CodeGen support for CTTZ/CTLZ where a zero input produces an
undefined result. This adds new ISD nodes for the new semantics,
selecting them when the LLVM intrinsic indicates that the undef behavior
is desired. The new nodes expand trivially to the old nodes, so targets
don't actually need to do anything to support these new nodes besides
indicating that they should be expanded. I've done this for all the
operand types that I could figure out for all the targets. Owners of
various targets, please review and let me know if any of these are
incorrect.
Note that the expand behavior is *conservatively correct*, and exactly
matches LLVM's current behavior with these operations. Ideally this
patch will not change behavior in any way. For example the regtest suite
finds the exact same instruction sequences coming out of the code
generator. That's why there are no new tests here -- all of this is
being exercised by the existing test suite.
Thanks to Duncan Sands for reviewing the various bits of this patch and
helping me get the wrinkles ironed out with expanding for each target.
Also thanks to Chris for clarifying through all the discussions that
this is indeed the approach he was looking for. That said, there are
likely still rough spots. Further review much appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1c663fee566546fc5622ffb4f169438bbd495fbf |
|
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this doesn't affect any in-tree target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146015 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 26323442d5b8373391d9899159974c1f38f6f4d5 |
|
07-Dec-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves correctly. PR11494.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8a8d479214745c82ef00f08d4e4f1c173b5f9ce2 |
|
02-Dec-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.
One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed1c0c7f5817be939872b462be984534bd48bb9b |
|
28-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead.
Conservatively returns zero when the GV does not specify an alignment nor is it
initialized. Previously it returns ABI alignment for type of the GV. However, if
the type is a "packed" type, then the under-specified alignments is attached to
the load / store instructions. In that case, the alignment of the type cannot be
trusted.
rdar://10464621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145300 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1c487869f5d47a7ad89d21ed9912bf89f25e3b72 |
|
28-Nov-2011 |
Evan Cheng <evan.cheng@apple.com> |
DAG combine should not increase alignment of loads / stores with alignment less
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.
rdar://10301431
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145273 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4db4addcd49310599d2df8c6824dc188aaccb613 |
|
17-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure to replace the chain properly when DAGCombining a LOAD+EXTRACT_VECTOR_ELT into a single LOAD. Fixes PR10747/PR11393.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144863 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8c2e35269c10914c16f351449fb9b8108ccb2556 |
|
15-Nov-2011 |
Jay Foad <jay.foad@gmail.com> |
Remove some unnecessary includes of PseudoSourceValue.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 501852423d34578bc41a745681783b04124dd0db |
|
12-Nov-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144438 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5207bf2177e9ef1e68d9408ea4b44f1c8a5ef9c0 |
|
08-Nov-2011 |
Lang Hames <lhames@gmail.com> |
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d752e0f7e64585839cb3a458ef52456eaebbea3c |
|
08-Nov-2011 |
Pete Cooper <peter_cooper@apple.com> |
Added invariant field to the DAG.getLoad method and changed all calls.
When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144100 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 19a4daff9bbe18dab2620e25ac6cbf0635639ec6 |
|
07-Nov-2011 |
Richard Osborne <richard@xmos.com> |
Don't introduce custom nodes after legalization in TargetLowering::BuildSDIV()
and TargetLowering::BuildUDIV(). Fixes PR11283
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f47368bbbe1ebcf77efd202362bfd1125a2126c7 |
|
31-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Cleanup. Document. Make sure that this build_vector optimization only runs before the op legalizer and that the used type is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 50bf86ea8a757be4059a56a2c38270873dcf9e2e |
|
30-Oct-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Silence compiler warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143308 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b00418af67b36dcd7d70a268ebba3480c1011348 |
|
29-Oct-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Add a new DAGCombine optimization for BUILD_VECTOR.
If all of the inputs are zero/any_extended, create a new simple BV
which can be further optimized by other BV optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fd58cd75630b1a2ace727d6caaee8c9308ba0240 |
|
27-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Don't crash on 128-bit sdiv by constant. Found by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143095 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9312613137caf4f1e7b4747964b8daf3de79c190 |
|
25-Oct-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Remove a couple redundant checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142959 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| db2b18febaea04d01b3dcb24fc44d5be7bd27a00 |
|
18-Oct-2011 |
Bob Wilson <bob.wilson@apple.com> |
Fix a DAG combiner assertion failure when constant folding BUILD_VECTORS.
svn r139159 caused SelectionDAG::getConstant() to promote BUILD_VECTOR operands
with illegal types, even before type legalization. For this testcase, that led
to one BUILD_VECTOR with i16 operands and another with promoted i32 operands,
which triggered the assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142370 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7b316c93273b2156f173fb2877c5e482f13f6778 |
|
23-Sep-2011 |
Dan Gohman <gohman@apple.com> |
Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
worklist, as it may be possible to perform further optimization on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e97190fdf875843e8161a942f2046fd3ef81330f |
|
21-Sep-2011 |
Bruno Cardoso Lopes <bruno.cardoso@gmail.com> |
Add a DAGCombine for subvector extracts to remove useless chains of
subvector inserts and extracts. Initial patch by Rackover, Zvi with
some tweak done by me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9db817fd0ce0949d0358f5cedfd9ca5a9f1726dd |
|
09-Sep-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make the SelectionDAG verify that all the operands of BUILD_VECTOR have the same type. Teach DAGCombiner::visitINSERT_VECTOR_ELT not to make invalid BUILD_VECTORs. Fixes PR10897.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 28b77e968d2b01fc9da724762bd8ddcd80650e32 |
|
06-Sep-2011 |
Duncan Sands <baldrick@free.fr> |
Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons. Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all"). Patch mostly by
Nadav Rotem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| deaa64546ea1d0922aa4671a05f13be3d7c9d53c |
|
20-Aug-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Roll back the rest of r126557. It's a hack that will break in some obscure cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c796ae1d68c92026be5d353584b514311cc3eb0d |
|
12-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Revert r137310 because it does not optimize any code on ToT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137466 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f80a894bf03ea65624a25b8f64bfcc9c6cf7f80f |
|
11-Aug-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
[AVX] When joining two XMM registers into a YMM register, make sure that the
lower XMM register gets in first. This will allow the SUBREG pattern to
elliminate the first vector insertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed4b4272ba2c2ff68f839738ba8147c3606d8885 |
|
26-Jul-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Make sure this DAGCombine actually returns an UNDEF of the correct type; PR10476.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135993 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| db125cfaf57cc83e7dd7453de2d509bc8efd0e5e |
|
18-Jul-2011 |
Chris Lattner <sabre@nondot.org> |
land David Blaikie's patch to de-constify Type, with a few tweaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7332e6ee25378e19c0f621c80c32b283b07f428a |
|
14-Jul-2011 |
Eric Christopher <echristo@apple.com> |
Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A
Fixes rdar://9761830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 944520f38c79f3cbf1abfca92a5414458d639029 |
|
07-Jul-2011 |
Lang Hames <lhames@gmail.com> |
Add functions 'hasPredecessor' and 'hasPredecessorHelper' to SDNode. The
hasPredecessorHelper function allows predecessors to be cached to speed up
repeated invocations. This fixes PR10186.
X.isPredecessorOf(Y) now just calls Y.hasPredecessor(X)
Y.hasPredecessor(X) calls Y.hasPredecessorHelper(X, Visited, Worklist) with
empty Visited and Worklist sets (i.e. no caching over invocations).
Y.hasPredecessorHelper(X, Visited, Worklist) caches search state in Visited
and Worklist to speed up repeated calls. The Visited set is searched for X
before going to the worklist to further search the DAG if necessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134592 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bdd1ef2dbec63d4e428f4ff19d54821dc08fa168 |
|
29-Jun-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Revert a part of r126557 which could create unschedulable DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 267010864e139781ef5949939e081c41f954de0a |
|
22-Jun-2011 |
Jay Foad <jay.foad@gmail.com> |
Replace the existing forms of ConstantArray::get() with a single form
that takes an ArrayRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133615 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9568e5c3c3f1e25288d2ff375dba0fddbf161fd6 |
|
21-Jun-2011 |
Evan Cheng <evan.cheng@apple.com> |
Teach dag combine to match halfword byteswap patterns.
1. (((x) & 0xFF00) >> 8) | (((x) & 0x00FF) << 8)
=> (bswap x) >> 16
2. ((x&0xff)<<8)|((x&0xff00)>>8)|((x&0xff000000)>>8)|((x&0x00ff0000)<<8))
=> (rotl (bswap x) 16)
This allows us to eliminate most of the def : Pat patterns for ARM rev16
revsh instructions. It catches many more cases for ARM and x86.
rdar://9609108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133503 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c06b5bf34004a9b01048905c8750761146094586 |
|
16-Jun-2011 |
Nick Lewycky <nicholas@mxc.ca> |
Add a DAGCombine for (ext (binop (load x), cst)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| baff46f192fd028af8950f2e3824ea7c71fbd76e |
|
15-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Enable the simplification of truncating-store after fixing the usage of
GetDemandBits (which must operate on the vector element type).
Fix the a usage of getZeroExtendInReg which must also be done on scalar types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 92bcd96bbcf42911a76570cc0974e513bc7f261d |
|
15-Jun-2011 |
Chad Rosier <mcrosier@apple.com> |
When pattern matching during instruction selection make sure shl x,1 is not
converted to add x,x if x is a undef. add undef, undef does not guarantee
that the resulting low order bit is zero.
Fixes <rdar://problem/9453156> and <rdar://problem/9487392>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c7cb7ed013d7672bccba61c8df5e921d8bd3ae75 |
|
14-Jun-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Disable trunc-store simplification on vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2a6d9eb10bc268df18ff57531c34b8928f858471 |
|
10-Jun-2011 |
Eli Friedman <eli.friedman@gmail.com> |
Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132809 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9728ea2447e689ae6e884cf044f226b99c4a47da |
|
24-May-2011 |
Devang Patel <dpatel@apple.com> |
Revert 121907 (it causes llc crash) and apply original patch from PR9817.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f55d26e78851c2c09f8b09cfd7e7bbda7130d93b |
|
21-May-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Implement mulo x, 2 -> addo x, x in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 71dc7c9d895afc1e678b28d24a1ecc85ecd42178 |
|
18-May-2011 |
Dan Gohman <gohman@apple.com> |
Misc. code cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 42febc6e9963f82d5c56c3c7e6afe5e00769af41 |
|
11-May-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131183 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c356f33aaf6de0e2fb6495113ea2c9059f64973d |
|
09-May-2011 |
Duncan Sands <baldrick@free.fr> |
Indent properly, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131082 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e545d38a2871dd4fc93802d9405373325baf1e21 |
|
17-Apr-2011 |
Eli Friedman <eli.friedman@gmail.com> |
PR9055: extend the fix to PR4050 (r70179) to apply to zext and anyext.
Returning a new node makes the code try to replace the old node, which
in the included testcase is killed by CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129650 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a34d93630ea5864fde8066d5c9638fdda86e1fc1 |
|
14-Apr-2011 |
Owen Anderson <resistor@mac.com> |
Fix another instance of the DAG combiner not using the correct type for the RHS of a shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129522 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b3452ea35c3e78d1a8c7d92f9448b0054d36e740 |
|
09-Apr-2011 |
Chris Lattner <sabre@nondot.org> |
have dag combine zap "store undef", which can be formed during call lowering
with undef arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129185 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed3caf90866e183380a06c0ae49101204a9f3c28 |
|
02-Apr-2011 |
Cameron Zwarich <zwarich@apple.com> |
Add a RemoveFromWorklist method to DCI. This is needed to do some complicated
transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128758 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9ef82ce4fe8e6f9f49c31abeebcc9672985afad4 |
|
11-Mar-2011 |
Evan Cheng <evan.cheng@apple.com> |
Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7e33418671728359325f51faf69a14f630ba7f91 |
|
02-Mar-2011 |
Stuart Hastings <stuart@apple.com> |
Can't introduce floating-point immediate constants after legalization.
Radar 9056407.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126864 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fcd96199f5999988226ee710e842df869720be21 |
|
27-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix typos in the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126565 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7466678003f38f985d5b2dffd0917643137b11cf |
|
26-Feb-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.
1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible
It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 95771afbfd604ad003fa3723cac66c9370fed55d |
|
25-Feb-2011 |
Owen Anderson <resistor@mac.com> |
Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8c20ec54d98176d31f310e4684d1d7f2ea0639bc |
|
24-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Enable support for vector sext and trunc:
Limit the folding of any_ext and sext into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.
Similar to commit 126080 (for enabling zext).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed9b934f65d82324506f03e2db2834682c7a8914 |
|
20-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix 9267; Add vector zext support.
The DAGCombiner folds the zext into complex load instructions. This patch
prevents this optimization on vectors since none of the supported targets
knows how to perform load+vector_zext in one instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126080 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a901129169194881a78b7fd8953e09f55b846d10 |
|
16-Feb-2011 |
Stuart Hastings <stuart@apple.com> |
Swap VT and DebugLoc operands of getExtLoad() for consistency with
other getNode() methods. Radar 9002173.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7bccf6abdc5de989cdb3872369480825ebc9c3a9 |
|
16-Feb-2011 |
Eric Christopher <echristo@apple.com> |
Refactor zero folding slightly. Clean up todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125651 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 169e1552e748348b033fb6817df4bffc345e5583 |
|
16-Feb-2011 |
Eric Christopher <echristo@apple.com> |
The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct
type. Check that we can make the transformation first, and add a TODO to
refactor this code with similar cases.
Fixes: PR9223 and rdar://9000350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e075118489baf15a7cea2e7f155b4799b93d6d02 |
|
13-Feb-2011 |
Chris Lattner <sabre@nondot.org> |
Revisit my fix for PR9028: the issue is that DAGCombine was
generating i8 shift amounts for things like i1024 types. Add
an assert in getNode to prevent this from occuring in the future,
fix the buggy transformation, revert my previous patch, and
document this gotcha in ISDOpcodes.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 609d54ee1e715af57e499c2cd10ff5a9ba89b9f2 |
|
12-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
A fix for 9165.
The DAGCombiner created illegal BUILD_VECTOR operations.
The patch added a check that either illegal operations are
allowed or that the created operation is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125435 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f94fdb6f571c2cdf8390ead558ba40b267df1172 |
|
11-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
SimplifySelectOps can only handle selects with a scalar condition. Add a check
that the condition is not a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5a4552ca4256461f402f9d7d2511e77c79316907 |
|
11-Feb-2011 |
Nadav Rotem <nadav.rotem@intel.com> |
Fix #9190
The bug happens when the DAGCombiner attempts to optimize one of the patterns
of the SUB opcode. It tries to create a zero of type v2i64. This type is legal
on 32bit machines, but the initializer of this vector (i64) is target dependent.
Currently, the initializer attempts to create an i64 zero constant, which fails.
Added a flag to tell the DAGCombiner to create a legal zero, if we require that
the pass would generate legal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125391 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 31959b19a72608051888160514977875a8027dfc |
|
02-Feb-2011 |
Evan Cheng <evan.cheng@apple.com> |
Given a pair of floating point load and store, if there are no other uses of
the load, then it may be legal to transform the load and store to integer
load and store of the same width.
This is done if the target specified the transformation as profitable. e.g.
On arm, this can transform:
vldr.32 s0, []
vstr.32 s0, []
to
ldr r12, []
str r12, []
rdar://8944252
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124708 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4e3740ee6ddfc5895061245364de21e3f73517fe |
|
31-Jan-2011 |
Richard Osborne <richard@xmos.com> |
Fix bug where ReduceLoadWidth was creating illegal ZEXTLOAD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124587 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9b108a338d544a6baf2ff087055326e301e6815d |
|
30-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Teach DAGCombine to fold fold (sra (trunc (sr x, c1)), c2) -> (trunc (sra x, c1+c2) when c1 equals the amount of bits that are truncated off.
This happens all the time when a smul is promoted to a larger type.
On x86-64 we now compile "int test(int x) { return x/10; }" into
movslq %edi, %rax
imulq $1717986919, %rax, %rax
movq %rax, %rcx
shrq $63, %rcx
sarq $34, %rax <- used to be "shrq $32, %rax; sarl $2, %eax"
addl %ecx, %eax
This fires 96 times in gcc.c on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124559 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2c94b4201beccbd061fd679ea7e9db1381fe8357 |
|
29-Jan-2011 |
Benjamin Kramer <benny.kra@googlemail.com> |
Add the missing sub identity "A-(A-B) -> B" to DAGCombine.
This happens e.g. for code like "X - X%10" where we lower the modulo operation
to a series of multiplies and shifts that are then subtracted from X, leading to
this missed optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124532 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 16c29b5f285f375be53dabaa73e3e91107485fe4 |
|
10-Jan-2011 |
Anton Korobeynikov <asl@math.spbu.ru> |
Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f50125ecaab0cc379892280de33f0a2d387f7f5b |
|
23-Dec-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
DAGCombine add (sext i1), X into sub X, (zext i1) if sext from i1 is illegal. The latter usually compiles into smaller code.
example code:
unsigned foo(unsigned x, unsigned y) {
if (x != 0) y--;
return y;
}
before:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
notl %eax ## encoding: [0xf7,0xd0]
addl 8(%esp), %eax ## encoding: [0x03,0x44,0x24,0x08]
ret ## encoding: [0xc3]
after:
_foo: ## @foo
cmpl $1, 4(%esp) ## encoding: [0x83,0x7c,0x24,0x04,0x01]
movl 8(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x08]
adcl $-1, %eax ## encoding: [0x83,0xd0,0xff]
ret ## encoding: [0xc3]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cbf68dfbc0b36de8ef20bb42ce0c7d75cb132fc7 |
|
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Fix a bug in ReduceLoadWidth that wasn't handling extending
loads properly. We miscompiled the testcase into:
_test: ## @test
movl $128, (%rdi)
movzbl 1(%rdi), %eax
ret
Now we get a proper:
_test: ## @test
movl $128, (%rdi)
movsbl (%rdi), %eax
movzbl %ah, %eax
ret
This fixes PR8757.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122392 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7a2a7faf9cfdbdf5f1de720385dc8a0009cd60a6 |
|
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
more cleanups, move a check for "roundedness" earlier to reject
unhanded cases faster and simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122391 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4c32bc24ded3d36db1f9fda301e46c16d1df6786 |
|
22-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
reduce indentation and improve comments, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c72b18cdc8f155dbb99d554056f3bb6b38f5f72c |
|
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Reapply 122353-122355 with fixes. 122354 was wrong;
the shift type was needed one place, the shift count
type another. The transform in 123555 had the same
problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d0cf2585a00bc7dd9a682b65dc53245db37ec366 |
|
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Revert 122353-122355 for the moment, they broke stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122360 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a83bf35d167c43ff2eb8c61bdea0cb660d2b07d8 |
|
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Add a new transform to DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5ecc340e34e6ca4b9f6ebde6c1379cb3b8084f69 |
|
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Get the type of a shift from the shift, not from its shift
count operand. These should be the same but apparently are
not always, and this is cleaner anyway. This improves the
code in an existing test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122354 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| efc96dd38c285c1a01aa6f613f533d1205e4acb2 |
|
21-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Shift by the word size is invalid IR; don't create it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122353 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 90b0364cff2531008831428a9b4576bf4be47c70 |
|
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
fix some typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f1b4eafbfec976f939ec0ea3e8acf91cef5363e3 |
|
21-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
something that just glues two nodes together, even if it is
sometimes used for flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 025cc6e1be4cc3d780f10bb9ec92eba831a45f79 |
|
20-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Cosmetic changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122259 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d727343a407bd3056f93e96c60eee72725d458c8 |
|
18-Dec-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix a DAGCombiner crash when folding binary vector operations with constant
BUILD_VECTOR operands where the element type is not legal. I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f5daf8bb7ff9539f7a6e0113609b39e4b9b64ff5 |
|
17-Dec-2010 |
Dale Johannesen <dalej@apple.com> |
Add a transform to DAG Combiner. This improves the
code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant. 8771012.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122090 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 33e77d3cb98de64b8657c011b549bdb54abf73fc |
|
15-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
take care of some todos, transforming [us]mul_lohi into
a wider mul if the wider mul is legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121848 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1a0fbe2cf438ac2788df669284293789681424e1 |
|
15-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
when transforming a MULHS into a wider MUL, there is no need to SRA the
result, the top bits are truncated off anyway, just use SRL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| de1c3605a649239cf8a96ba31885c8fbef2bc838 |
|
13-Dec-2010 |
Chris Lattner <sabre@nondot.org> |
Add a couple dag combines to transform mulhi/mullo into a wider multiply
when the wider type is legal. This allows us to compile:
define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
%div = udiv i16 %x, 33
ret i16 %div
}
into:
test1: # @test1
movzwl 4(%esp), %eax
imull $63551, %eax, %eax # imm = 0xF83F
shrl $21, %eax
ret
instead of:
test1: # @test1
movw $-1985, %ax # imm = 0xFFFFFFFFFFFFF83F
mulw 4(%esp)
andl $65504, %edx # imm = 0xFFE0
movl %edx, %eax
shrl $5, %eax
ret
Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320
We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121696 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 503a64dcd47e6ed9216a75ac68299a2f081b313c |
|
09-Dec-2010 |
Eric Christopher <echristo@apple.com> |
80-col fixups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 40f8f6264d5af2c38e797e0dc59827cd231e8ff7 |
|
07-Dec-2010 |
Jay Foad <jay.foad@gmail.com> |
PR5207: Change APInt methods trunc(), sext(), zext(), sextOrTrunc() and
zextOrTrunc(), and APSInt methods extend(), extOrTrunc() and new method
trunc(), to be const and to return a new value instead of modifying the
object in place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bebfbc560bba894c8d0aa0e8b6ee109fda2d1b0c |
|
28-Nov-2010 |
Bob Wilson <bob.wilson@apple.com> |
Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bf17cfa3f904e488e898ac2e3af706fd1a892f08 |
|
23-Nov-2010 |
Wesley Peck <peckw@wesleypeck.com> |
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b9064bb96458ab48a878e1a7e678cada2e22ab7a |
|
18-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
Fix thinko: we must turn select(anyext, sext) into sext(select)
not anyext(select). Spotted by Frits van Bommel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119739 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dcfd3a798ffbd5e02d4892eeef562c9124598844 |
|
18-Nov-2010 |
Duncan Sands <baldrick@free.fr> |
The DAGCombiner was threading select over pairs of extending loads even
if the extension types were not the same. The result was that if you
fed a select with sext and zext loads, as in the testcase, then it
would get turned into a zext (or sext) of the select, which is wrong
in the cases when it should have been an sext (resp. zext). Reported
and diagnosed by Sebastien Deldon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119728 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6a559cd6959bef28d20acef2129e5510bcc12bb8 |
|
09-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d81f17acb4f2d755759a4d8a83a71a98ade0edd3 |
|
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
Just return undef for invalid masks or elts, and since we're doing that,
just do it earlier too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| caebdd44f3a2c89457f09d0fa45a998c912235d2 |
|
03-Nov-2010 |
Eric Christopher <echristo@apple.com> |
If we have an undef mask our Elt will be -1 for our access, handle
this by using an undef as a pointer.
Fixes rdar://8625016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118164 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 394d6298bcf89a75b51c8314a6705f6984e46b49 |
|
03-Nov-2010 |
Dan Gohman <gohman@apple.com> |
Fix DAGCombiner to avoid going into an infinite loop when it
encounters (and:i64 (shl:i64 (load:i64), 1), 0xffffffff).
This fixes rdar://8606584.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118143 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 46455096bea2b6c81bb4b0226701524d2a9eb242 |
|
30-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Remove DAG combiner patch to fold vector splats. Instcombiner does it now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0f1db1a6c64bb6661f15be1eab21645a0cbcccd8 |
|
28-Oct-2010 |
Bob Wilson <bob.wilson@apple.com> |
Teach the DAG combiner to fold a splat of a splat. Radar 8597790.
Also do some minor refactoring to reduce indentation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f96e4bd2a3b11928af75fb7472288930d16fec0b |
|
20-Oct-2010 |
Dan Gohman <gohman@apple.com> |
Make CodeGen TBAA-aware.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116890 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2a135ae53057ef7d0e9123d450b958d0d59d8ccc |
|
05-Oct-2010 |
Evan Cheng <evan.cheng@apple.com> |
This DAG combine BRCOND transformation can look pass truncate of the operand:
// %a = ...
// %b = and i32 %a, 2
// %c = srl i32 %b, 1
// brcond i32 %c ...
//
// into
//
// %a = ...
// %b = and i32 %a, 2
// %c = setcc eq %b, 0
// brcond %c ...
Make sure it restores local variable N1, which corresponds to the condition operand if it fails to match.
This apparently breaks TCE but since that backend isn't in the tree I don't have a test for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2831a194954cb4a79049e8a666d246a9a1662b92 |
|
01-Oct-2010 |
Chris Lattner <sabre@nondot.org> |
fix rdar://8494845 + PR8244 - a miscompile exposed by my patch in r101350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115294 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed1088afb51189efff02886891c4e25a5a5fb5f9 |
|
23-Sep-2010 |
Owen Anderson <resistor@mac.com> |
A select between a constant and zero, when fed by a bit test, can be efficiently
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114599 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bc146b0a4dcee601459eee943b4133d3cf63f1dd |
|
21-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6229d0acb8f395552131a7015a5d1e7b2bae2111 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
update a bunch of code to use the MachinePointerInfo version of getStore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114461 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| da2d8e1032eb4c2fefb1f647d7877910b9483835 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
eliminate an old SelectionDAG::getTruncStore method, propagating
MachinePointerInfo around more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3d6ccfba314ed38e4506dae2781a060e9a3e07ac |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
propagate MachinePointerInfo through various uses of the old
SelectionDAG::getExtLoad overload, and eliminate it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fa45901eaaecbad3b95042518d7991ad0e5c08a0 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
convert dagcombine off the old form of getLoad. This fixes several bugs
with SVOffset computation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f16580665589584d3249d8a3c4dd4ea90dfb9e47 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
simplify DAGCombiner::SimplifySelectOps step #2/2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1806161a0bfbc3fa57aa90470d467425ffaf05bb |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
no functionality change (step #1)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114436 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 85ca1066328639119f94c47a83b698c48b84ebb0 |
|
21-Sep-2010 |
Chris Lattner <sabre@nondot.org> |
a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4a9f150926d593b30354db76d8d061fe4c9d124d |
|
20-Sep-2010 |
Owen Anderson <resistor@mac.com> |
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0dcc8142766b3c55915eb9c2d404bdea6bb0f7dd |
|
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Revert r114312 while I sort out some issues.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d910fb2f12782d8636950baaccbf43bd046e828f |
|
19-Sep-2010 |
Owen Anderson <resistor@mac.com> |
Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,
r114268 fixed the last of the blockers to enabling it. I will be monitoring
for failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114312 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 24bde5bce192119ee0fc4f94ef8757fd4031e5f6 |
|
02-Sep-2010 |
Dan Gohman <gohman@apple.com> |
Don't narrow the load and store in a load+twiddle+store sequence unless
there are clearly no stores between the load and the store. This fixes
this miscompile reported as PR7833.
This breaks the test/CodeGen/X86/narrow_op-2.ll optimization, which is
safe, but awkward to prove safe. Move it to X86's README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112861 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e0efc216eb94f8f92b85cb4f1af2da9ce2a583fc |
|
27-Jul-2010 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash in the dag combiner caused by ConstantFoldBIT_CONVERTofBUILD_VECTOR calling itself
recursively and returning a SCALAR_TO_VECTOR node, but assuming the input was always a BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109519 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 54026c0f1b10fc6335f2a090c12627e5f7126641 |
|
19-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Remove r108639 now that it is handled by InstCombine instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ecdfafe3b06844ab0412b48f6daedf3e13e7037 |
|
18-Jul-2010 |
Owen Anderson <resistor@mac.com> |
Add a DAGCombine xform to fold away redundant float->double->float conversions around sqrt instructions.
I am assured by people more knowledgeable than me that there are no rounding issues in eliminating this.
This fixed <rdar://problem/8197504>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3472766f9eb7d66f234c390ce1b3a8b76f0ee9ce |
|
12-Jul-2010 |
Duncan Sands <baldrick@free.fr> |
Convert some tab stops into spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f1d93ca920a106067d5773d57c85370a7efffe96 |
|
09-Jul-2010 |
Bob Wilson <bob.wilson@apple.com> |
Reenable DAG combining for vector shuffles. It looks like it was temporarily
disabled and then never turned back on again. Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107941 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cde51108def63dbb68ffd47f8950b8bdd43dd074 |
|
08-Jul-2010 |
Benjamin Kramer <benny.kra@googlemail.com> |
Merge the duplicated iabs optimization in DAGCombiner and let it detected a few more idioms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107868 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bcc8017c738e92d9c1af221b11c4916cb524184e |
|
08-Jul-2010 |
Evan Cheng <evan.cheng@apple.com> |
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107820 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0d881dabc1a4e1aefad6dd38de166d8358285638 |
|
07-Jul-2010 |
Devang Patel <dpatel@apple.com> |
Propagate debug loc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107710 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8674949513837dab7efa11c8d338db4f714a244b |
|
29-Jun-2010 |
Bob Wilson <bob.wilson@apple.com> |
Unlike other targets, ARM now uses BUILD_VECTORs post-legalization so they
can't be changed arbitrarily by the DAGCombiner without checking if it is
running after legalization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107097 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b447c4e65b5f6d39db16cb8fc338133965291972 |
|
25-Jun-2010 |
Duncan Sands <baldrick@free.fr> |
Remove variables which are assigned to but for which the value
is not used. Spotted by gcc-4.6.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106854 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4e39e9da0f3a435445261d0f796bb0913f3c2bf0 |
|
24-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Reapply r106634, now that the bug it exposed is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cbe762b5d165c565feb98b745e93b71d208a1e36 |
|
23-Jun-2010 |
Daniel Dunbar <daniel@zuster.org> |
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9a526495e0c06c4014d7500788cad1929fd244d3 |
|
23-Jun-2010 |
Jim Grosbach <grosbach@apple.com> |
Some targets don't require the fencing MEMBARRIER instructions surrounding
atomic intrinsics, either because the use locking instructions for the
atomics, or because they perform the locking directly. Add support in the
DAG combiner to fold away the fences.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8a7f7426eeb18fef58c3471db23fc829b67bc350 |
|
18-Jun-2010 |
Dan Gohman <gohman@apple.com> |
Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,
which is faster, simpler, and less surprising.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 86234c30a7dea821e970323df4f168b9632d0bb7 |
|
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix another variant of PR 7191. Also add a testcase
Mon Ping provided; unfortunately bugpoint failed to
reduce it, but I think it's important to have a test for
this in the suite. 8023512.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 61734eb117063b4cd2a10c2403213cedd1347a06 |
|
25-May-2010 |
Dale Johannesen <dalej@apple.com> |
Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104619 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 70fe6643d6d16b9a1bb9560d75e60539ba93ba6b |
|
22-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Clean up extra whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 78f006acdfda52f7250929e1c2fea8afbb9a5b07 |
|
21-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elements
so that it will continue to test what it was meant to test when I commit a
separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon.
Fix a DAG combiner crash exposed by this test change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 492fd454ca3aa3d45e76c4f42b602e934cf519b1 |
|
20-May-2010 |
Bob Wilson <bob.wilson@apple.com> |
Optimize away insertelement of an undef value. This shows up in
test/Codegen/ARM/reg_sequence.ll but it doesn't affect the generated code
because the coalescer cleans it up. Radar 7998853.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104185 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0a942dbb1e0f303191639498c35e742309f08a64 |
|
19-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.
The trouble arises when the result of a vector cmp + sext is then and'ed with all ones. Instcombine will turn it into a vector cmp + zext, dag combiner will miss turning it into a vsetcc and hell breaks loose after that.
Teach dag combine to turn a vector cpm + zest into a vsetcc + and 1. This fixes rdar://7923010.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 28dad2a5caccf579f7430acd3af8fa6e6f8b575e |
|
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Sink dag combine's post index load / store code that swap base ptr and index into the target hook. Only the target knows whether the swap is safe. In Thumb2 mode, the offset must be an immediate. rdar://7998649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104060 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a083988c8a7d57f37bfdd9d595fc3d55c60ea8ae |
|
18-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
FIX PR7158. SimplifyVBinOp was asserting when it fails to constant fold (op (build_vector), (build_vector)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104004 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| aad753bbbd98c952f7e65246af2faf5c7d5a850b |
|
10-May-2010 |
Evan Cheng <evan.cheng@apple.com> |
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ce89f47de03e056e7cb52b0fff24834ef409a57 |
|
30-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a patch from Jan Sjodin to fix a compiler abort on vector
comparisons sign-extended to a different bitwidth than the
comparison operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b3a3d5e858d6613d24a23056bf8b4ce80dcaec41 |
|
28-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Try operation promotion only if regular dag combine and target-specific ones failed to do anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ac7eae5b89d82603c4cf315458380c6a401a8fb2 |
|
27-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- When legal, promote a load to zextload rather than ext load.
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102455 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 95c57ea1825fedc10dc2a311b0d97105f6e61148 |
|
24-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
When a load operand is promoted to an extload, replace other uses with uses of extload result truncated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a7bcef1bce8c5b97b748e5cc7d6eca19cbbc2bef |
|
24-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Apply a fix for a vector setcc dagcombine from Jan Sjodin. No
testcase yet, as the testcase now fails downstream.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102228 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| caf7740f96cdcd47b7ba7fc660b82e1f664363be |
|
23-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102202 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07c4e1085d04fa773708d0bd91794d80c426eae6 |
|
22-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
- It's not safe to promote rotates (at least not trivially).
- Some code refactoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 86c5abb4c0edfffdd24729e142a62b9b949f025d |
|
20-Apr-2010 |
Bill Wendling <isanbard@gmail.com> |
The visitXOR method can return the same SDNode. If so, we don't want to delete
it as it's not dead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101855 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4c26e93e895bfd72a66076de22a216316115f531 |
|
19-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More progress on promoting i16 operations to i32 for x86. Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101808 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e5b51ac7708402473f0a558f4aac74fab63d4f7e |
|
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
More work to allow dag combiner to promote 16-bit ops to 32-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 003d7c4b5d639fcb0231604fe21339dd7071f418 |
|
17-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
(i32 sext_in_reg (i32 aext (i16 x)), i16) -> (i32 sext x). No known test case until -promote-16bit is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 64b7bf71e84094193b40ab81aa7dacad921ecbea |
|
16-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Adding support for dag combiner to promote operations for profit. This requires target specific queries. For example, x86 should promote i16 to i32 when it does not impact load folding.
x86 support is off by default. It can be enabled with -promote-16bit.
Work in progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101448 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e6987587d62bb4de0f57e103f677f6bfb43a09f3 |
|
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
enhance the load/store narrowing optimization to handle a
tokenfactor in between the load/store. This allows us to
optimize test7 into:
_test7: ## @test7
## BB#0: ## %entry
movl (%rdx), %eax
## kill: SIL<def> ESI<kill>
movb %sil, 5(%rdi)
ret
instead of:
_test7: ## @test7
## BB#0: ## %entry
movl 4(%esp), %ecx
movl $-65281, %eax ## imm = 0xFFFFFFFFFFFF00FF
andl 4(%ecx), %eax
movzbl 8(%esp), %edx
shll $8, %edx
addl %eax, %edx
movl 12(%esp), %eax
movl (%eax), %eax
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6dc868581b20380802e6a011de8dd9766790cf7a |
|
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
teach codegen to turn trunc(zextload) into load when possible.
This doesn't occur much at all, it only seems to formed in the case
when the trunc optimization kicks in due to phase ordering. In that
case it is saves a few bytes on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| efcddc33256512a08d7182783e2262da27f27cdd |
|
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
add a simple dag combine to replace trivial shl+lshr with
and. This happens with the store->load narrowing stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101348 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2392ae7d7344674dc3d946e324342515f4771b90 |
|
15-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
Implement rdar://7860110 (also in target/readme.txt) narrowing
a load/or/and/store sequence into a narrower store when it is
safe. Daniel tells me that clang will start producing this sort
of thing with bitfields, and this does trigger a few dozen times
on 176.gcc produced by llvm-gcc even now.
This compiles code like CodeGen/X86/2009-05-28-DAGCombineCrash.ll
into:
movl %eax, 36(%rdi)
instead of:
movl $4294967295, %eax ## imm = 0xFFFFFFFF
andq 32(%rdi), %rax
shlq $32, %rcx
addq %rax, %rcx
movq %rcx, 32(%rdi)
and each of the testcases into a single store. Each of them used
to compile into craziness like this:
_test4:
movl $65535, %eax ## imm = 0xFFFF
andl (%rdi), %eax
shll $16, %esi
addl %eax, %esi
movl %esi, (%rdi)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 46510a73e977273ec67747eb34cbdb43f815e451 |
|
15-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Add const qualifiers to CodeGen's use of LLVM IR constructs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101334 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 58c2587ed8e2cd0928a959dbb213bdcc028b1213 |
|
12-Apr-2010 |
Dan Gohman <gohman@apple.com> |
Remove unnecessary parens.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101010 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d0e88f3596fb214fd26bf91c481d87ffe499d992 |
|
08-Apr-2010 |
Ted Kremenek <kremenek@apple.com> |
Fix -Wsign-compare warning (issued by clang++).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7f893c0712a080470b8c0bb8e7e711c7650eb2bd |
|
07-Apr-2010 |
Chris Lattner <sabre@nondot.org> |
fix 80 col violation, patch by Alastair Lynn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 255f20f7f76e4ca1ac1c73294852cb6fcb18c77d |
|
01-Apr-2010 |
Evan Cheng <evan.cheng@apple.com> |
Fix sdisel memcpy, memset, memmove lowering:
1. Makes it possible to lower with floating point loads and stores.
2. Avoid unaligned loads / stores unless it's fast.
3. Fix some memcpy lowering logic bug related to when to optimize a
load from constant string into a constant.
4. Adjust x86 memcpy lowering threshold to make it more sane.
5. Fix x86 target hook so it uses vector and floating point memory
ops more effectively.
rdar://7774704
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100090 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f2f64e906372a3008112420b15daeb68c3e942e3 |
|
11-Mar-2010 |
Chris Lattner <sabre@nondot.org> |
fix PR6533 by updating the br(xor) code to remember the case
when it looked past a trunc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98203 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8f78e3c87d462e71ddcd3d4f53446b902cc5c593 |
|
10-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix another bitwidth calculation to handle vector types; based on a
patch by Micah Villmow for PR6572.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98188 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6900a39d28132d86529724ba4dc8302edf1a9b53 |
|
04-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix more code to work properly with vector operands. Based on
a patch my Micah Villmow for PR6465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 32f9eb2bc3ddaf17e790f086056829e4ad91ab66 |
|
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
Use APInt instead of zext value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7d9f2b93a356aa89186522bd61c5c565718ff555 |
|
03-Mar-2010 |
Bill Wendling <isanbard@gmail.com> |
This test case:
long test(long x) { return (x & 123124) | 3; }
Currently compiles to:
_test:
orl $3, %edi
movq %rdi, %rax
andq $123127, %rax
ret
This is because instruction and DAG combiners canonicalize
(or (and x, C), D) -> (and (or, D), (C | D))
However, this is only profitable if (C & D) != 0. It gets in the way of the
3-addressification because the input bits are known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5b870aff81da0c07413f0241087bb3722954b83d |
|
02-Mar-2010 |
Dan Gohman <gohman@apple.com> |
Fix several places to handle vector operands properly.
Based on a patch by Micah Villmow for PR6438.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2c755ba12a79e0bb2899c0bde00b2f7ea2c975a0 |
|
27-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cfe30effbb952ae5b49a01de8329e3a2c14bad75 |
|
24-Feb-2010 |
Daniel Dunbar <daniel@zuster.org> |
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
the hopes of fixing PPC bootstrap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 97e6b8390b405f9e7dd994f111a5950fca2962d2 |
|
24-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Re-apply 96540 and 96556 with fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3eba667081cb63761861e4543715c90f8fc47b18 |
|
19-Feb-2010 |
Duncan Sands <baldrick@free.fr> |
Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:
llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)
This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.
Found by bisection.
r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96672 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 89bb7b56407bf81a5d5fdcdac7106d94bb30dd65 |
|
18-Feb-2010 |
Evan Cheng <evan.cheng@apple.com> |
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96556 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1e559443a17d1b335f697551c6263ba60d5dd827 |
|
15-Feb-2010 |
David Greene <greened@obbligato.org> |
Add non-temporal flags and remove an assumption of default arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96240 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f451cb870efcf9e0302d25ed05f4cac6bb494e42 |
|
10-Feb-2010 |
Dan Gohman <gohman@apple.com> |
Fix "the the" and similar typos.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 87c46d8a0e9d85d39bfd93a4e6307a871075add6 |
|
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Improve EXTRACT_VECTOR_ELT patch based on comments from Duncan
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95012 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c6654ec498698919ae8388c53fe91d0366ac24c7 |
|
01-Feb-2010 |
Mon P Wang <wangmp@apple.com> |
Fixed a couple of optimization with EXTRACT_VECTOR_ELT that assumes the result
type is the same as the element type of the vector. EXTRACT_VECTOR_ELT can
be used to extended the width of an integer type. This fixes a bug for
Generic/vector-casts.ll on a ppc750.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94990 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8c7ecaf524ec3040a9c1c7be5f37e574eb1d0207 |
|
26-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Implement cond ? -1 : 0 with sbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cd9e155755dab1913238ffc0374111a39d500adf |
|
20-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fold (add x, shl(0 - y, n)) -> sub(x, shl(y, n)), to simplify some code
that SCEVExpander can produce when running on behalf of LSR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93949 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1ad0e8b5769f25ca442f3d77bf374d03469010bc |
|
18-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Canonicalize -1 - x to ~x.
Instcombine does this but apparently there are situations where this pattern will escape the optimizer and / or created by isel. Here is a case that's seen in JavaScriptCore:
%t1 = sub i32 0, %a
%t2 = add i32 %t1, -1
The dag combiner pattern: ((c1-A)+c2) -> (c1+c2)-A
will fold it to -1 - %a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ff00a555171cac0a77c0434fd85ff5a0ae672ade |
|
14-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Fix a codegen abort seen in 483.xalancbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fe240b1066badd7a56d9a99637cdc7cd25f8305c |
|
11-Jan-2010 |
Mon P Wang <wangmp@apple.com> |
Disable transformation of select of two loads to a select of address and then a load if the
loads are not in the default address space because the transformation discards src value info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93180 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d1996360399ad6dbe75ee185b661b16c83146373 |
|
09-Jan-2010 |
Dan Gohman <gohman@apple.com> |
Revert an earlier change to SIGN_EXTEND_INREG for vectors. The VTSDNode
really does need to be a vector type, because
TargetLowering::getOperationAction for SIGN_EXTEND_INREG uses that type,
and it needs to be able to distinguish between vectors and scalars.
Also, fix some more issues with legalization of vector casts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bd1fccfad59f24267b6fa8b898711d63a3574c7d |
|
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
Fix rdar://7517201, a regression introduced by r92849.
When folding a and(any_ext(load)) both the any_ext and the
load have to have only a single use.
This removes the anyext-uses.ll testcase which started failing
because it is unreduced and unclear what it is testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ef7634ca48c7ed33a88bd80207f3457c07ad85f2 |
|
07-Jan-2010 |
Chris Lattner <sabre@nondot.org> |
factor this code better and reduce nesting at the same
time, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d40d03e1bd1d51857fc2f9f9230e334c3a32b249 |
|
06-Jan-2010 |
Evan Cheng <evan.cheng@apple.com> |
Teach dag combine to fold the following transformation more aggressively:
(OP (trunc x), (trunc y)) -> (trunc (OP x, y))
Unfortunately this simple change causes dag combine to infinite looping. The problem is the shrink demanded ops optimization tend to canonicalize expressions in the opposite manner. That is badness. This patch disable those optimizations in dag combine but instead it is done as a late pass in sdisel.
This also exposes some deficiencies in dag combine and x86 setcc / brcond lowering. Teach them to look pass ISD::TRUNCATE in various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9f7c5c0dca1e63bca39eb6511e8847b02030cb1f |
|
05-Jan-2010 |
Bill Wendling <isanbard@gmail.com> |
Don't assign the shift the same type as the variable being shifted. This could
result in illegal types for the SHL operator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92797 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f10902981c775828bfdd807c88704c965c47ede1 |
|
05-Jan-2010 |
David Greene <greened@obbligato.org> |
Change errs() to dbgs().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9ab2b98ba586b366ad49ea141d83b9821f91d8f3 |
|
18-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Increase opportunities to optimize (brcond (srl (and c1), c2)).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4c2b001f1359d10807c89ff0480e8799a1adbe96 |
|
17-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert this dag combine change:
Fold (zext (and x, cst)) -> (and (zext x), cst)
DAG combiner likes to optimize expression in the other way so this would end up cause an infinite looping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9818c043d2ef1be70780de92bb42edd53d1da62a |
|
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Make 91378 more conservative.
1. Only perform (zext (shl (zext x), y)) -> (shl (zext x), y) when y is a constant. This makes sure it remove at least one zest.
2. If the shift is a left shift, make sure the original shift cannot shift out bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91399 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8acb3100de9cfc02048b7ab23490134ed735b051 |
|
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fold (zext (and x, cst)) -> (and (zext x), cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 99b653c36f0141f6b9515d688960ac8c2cb857ff |
|
15-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Propagate zest through logical shift.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91378 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e141d744ee1354f49a99d9da49dbd9570e4269d |
|
15-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Fix integer cast code to handle vector types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91362 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 87862e77bbf90cf1b68c9eea1f3641ad81435e38 |
|
11-Dec-2009 |
Dan Gohman <gohman@apple.com> |
Implement vector widening, splitting, and scalarizing for SIGN_EXTEND_INREG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91158 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 64fa4a9584113f63eccc1a650e7e0cc4ddbab3f6 |
|
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Move isConsecutiveLoad to SelectionDAG. It's not target dependent and it's primary used by selectdag passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f2dc5c785dea1816cbc064b58b4b6ea23c4fd7d4 |
|
09-Dec-2009 |
Evan Cheng <evan.cheng@apple.com> |
Refactor InferAlignment out of DAGCombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 93e0ed31c54cea6bf3f1f20244bd56a4770b2780 |
|
03-Dec-2009 |
Nate Begeman <natebegeman@mac.com> |
Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90423 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9f0d4e631d73659e8a94495b9a6d5ecbb6ad68a1 |
|
03-Dec-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't call getValueType() on a null SDValue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e0f06c78d3ee56cea4e7195c616aafc200cb0ba2 |
|
17-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove the optimizations that convert BRCOND and BR_CC into
unconditional branches or fallthroghes. Instcombine/SimplifyCFG
should be simplifying branches with known conditions.
This fixes some problems caused by these transformations not
updating the MachineBasicBlock CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89017 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ba565bfc2117b401ecd55631fb3e4e6428a62a5c |
|
09-Nov-2009 |
Dan Gohman <gohman@apple.com> |
Remove an unneeded #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 75832d7d4f23e5151affd167662f0b2c80d0e90d |
|
31-Oct-2009 |
Dan Gohman <gohman@apple.com> |
When discarding SrcValue information, discard all of it so that code
that uses this information knows to behave conservatively.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1507cd03a64679f6999f51218a3a0180d51ab673 |
|
28-Oct-2009 |
Dan Gohman <gohman@apple.com> |
Don't call SDNode::isPredecessorOf when it isn't necessary. If the load's
chains have no users, they can't be predecessors of the condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f5a86f45e75ec744c203270ffa03659eb0a220c1 |
|
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove includes of Support/Compiler.h that are no longer needed after the
VISIBILITY_HIDDEN removal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85043 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6726b6d75a8b679068a58cb954ba97cf9d1690ba |
|
25-Oct-2009 |
Nick Lewycky <nicholas@mxc.ca> |
Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.
Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85042 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2bcf60a9cc435658ca8a02ee692af225599cf9e4 |
|
20-Oct-2009 |
Anton Korobeynikov <asl@math.spbu.ru> |
Fix invalid for vector types fneg(bitconvert(x)) => bitconvert(x ^ sign)
transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84683 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 677c89d8bfaf17587076703816730c75c68c894b |
|
12-Oct-2009 |
Nate Begeman <natebegeman@mac.com> |
More heuristics for Combiner-AA. Still catches all important cases, but
compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc66cdd79c7500e8184a837418debdfae4407b5f |
|
25-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix combiner-aa issue with bases which are different, but can alias.
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4e918b2c8ca81edd63f6708e08835b2c14648615 |
|
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Use getStoreSize() instead of getStoreSizeInBits()/8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8a55ce4a392f07ac1f3c183100ac591b7ad7c693 |
|
23-Sep-2009 |
Dan Gohman <gohman@apple.com> |
Rename several variables from EVT to more descriptive names, now that EVT
is also the name of their type, as declarations like "EVT EVT" look
really odd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82654 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b6aef5c86736accefb1c61cacaf1bd29e9b25ecd |
|
15-Sep-2009 |
Nate Begeman <natebegeman@mac.com> |
Substantially speed up combiner-aa in the following ways:
1. Switch from an std::set to a SmallPtrSet for visited chain nodes.
2. Do not force the recursive flattening of token factor nodes, regardless of
use count.
3. Immediately process newly created TokenFactor nodes.
Also, improve combiner-aa by teaching it that loads to non-overlapping offsets
of relatively aligned objects cannot alias.
These changes result in a >5x speedup for combiner-aa on most testcases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81816 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 92ad363f58681df785933a75a9b9955f13885e7d |
|
11-Sep-2009 |
Bob Wilson <bob.wilson@apple.com> |
Don't swap the operands of a subtraction when trying to create a
post-decrement load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b7c5bdf843419e4222770475c27932c4c8e5c303 |
|
06-Sep-2009 |
Duncan Sands <baldrick@free.fr> |
Remove some unused variables and methods warned about by
icc (#177, partial). Patch by Erick Tryzelaar.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bbbfa99d3d18fe9f20265305e833666645ada528 |
|
23-Aug-2009 |
Chris Lattner <sabre@nondot.org> |
remove a few DOUTs here and there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79832 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5aba5c0e882fca505e3e0fc784c37a85babb872e |
|
23-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
Add check for completeness. Note that this doesn't actually have any
effect with the way the current code is structured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79792 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d68eea2b6d5ff284d3c7371c4f201c25ca030747 |
|
19-Aug-2009 |
Eli Friedman <eli.friedman@gmail.com> |
PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79415 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 23b9b19b1a5a00faa9fce0788155c7dbfd00bfb1 |
|
12-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 825b72b0571821bf2d378749f69d6c4cfb52d2f9 |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 00edf39b3447db1b8dc0030d716ef70675f55755 |
|
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the DAGCombiner's handling of multiple linked
MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78619 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a407ca16c29b4e91ef3cf9e188ac2e3ab6920cd8 |
|
11-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug where DAGCombine was producing an illegal ConstantFP
node after legalize, and remove the workaround code from the
ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78615 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e50ed30282bb5b4a9ed952580523f2dda16215ac |
|
11-Aug-2009 |
Owen Anderson <resistor@mac.com> |
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| eb1fedc62d0a3e3901d79edf40a585747dde2e1e |
|
10-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Make this comment more closely reflect the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78569 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 17421d81fdbc94dbd8b3549b095303baaf52e689 |
|
08-Aug-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Don't build illegal ops in DAGCombiner::SimplifyBinOpWithSameOpcodeHands().
Blackfin supports and/or/xor on i32 but not on i16. Teach
DAGCombiner::SimplifyBinOpWithSameOpcodeHands to not produce illegal nodes
after legalize ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78497 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5cbd37e5056f6a715333553e9d529e0ddddb3e78 |
|
06-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Fix a few places in DAGCombiner that were creating all-ones-bits
and high-bits values in ways that weren't correct for integer
types wider than 64 bits. This fixes a miscompile in
PPMacroExpansion.cpp in clang on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4ea480499c40cd7e28bf35cacda33ccbab2aab07 |
|
02-Aug-2009 |
Dan Gohman <gohman@apple.com> |
Avoid forming a SELECT_CC in a type that the target doesn't
support. This isn't immediately interesting, because Legalize
ends up lowering SELECT_CC if the target doesn't support it,
but this simplifies the process.
Also, if the SELECT_CC would be expanded in Legalize, it
can potentially end up with two copies of the condition
expression. By leaving it as SELECT+SETCC, the SELECT can be
expanded into two SELECTs that use a single SETCC.
The two comparisons are usually CSE'd, but depending on
when various expressions get legalized, the comparison
expression could involve calls to library functions, such
that the comparison expression may not be able to be CSE'd.
This will be needed by a future patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77896 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| debcb01b0f0a15f568ca69e8f288fade4bfc7297 |
|
30-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move types back to the 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77516 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1fd7096407d5e598ed3366a1141548e71273f1c5 |
|
28-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Change ConstantArray to 2.5 API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77347 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 78d12644b905dc54cf6cf984af02a49d30d29744 |
|
24-Jul-2009 |
Jakob Stoklund Olesen <stoklund@2pi.dk> |
Add support for promoting SETCC operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76987 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d101a72d79d910abf781e6573be0edac99061acc |
|
21-Jul-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix a dagga combiner bug: avoid creating illegal constant.
Is this really a winning transformation?
fold (shl (srl x, c1), c2) -> (shl (and x, (shl -1, c1)), (sub c2, c1)) or
(srl (and x, (shl -1, c1)), (sub c1, c2))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76535 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a90b3dc2f1f70ab7102ec3f1fc57f199fd56d7cc |
|
15-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Move a few more convenience factory functions from Constant to LLVMContext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75840 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c23197a26f34f559ea9797de51e187087c039c42 |
|
14-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c25e7581b9b8088910da31702d4ca21c4734c6d7 |
|
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
assert(0) -> LLVM_UNREACHABLE.
Make llvm_unreachable take an optional string, thus moving the cerr<< out of
line.
LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for
NDEBUG builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7d696d80409aad20bb5da0fc4eccab941dd371d4 |
|
11-Jul-2009 |
Torok Edwin <edwintorok@gmail.com> |
Convert more assert(0)+abort() -> LLVM_UNREACHABLE,
and abort()/exit() -> llvm_report_error().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75363 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d1474d09cbe5fdeec8ba0d6c6b52f316f3422532 |
|
09-Jul-2009 |
Owen Anderson <resistor@mac.com> |
Thread LLVMContext through MVT and related parts of SDISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75153 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2b7a271c713ff1db83990f691126bc33d6c59b52 |
|
08-Jul-2009 |
Chris Lattner <sabre@nondot.org> |
dag combine sext(setcc) -> vsetcc before legalize. To make this safe,
VSETCC must define all bits, which is different than it was documented
to before. Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the
documentation. We now get nice code for vec_compare.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| abc019968067736a499467f7db7fb758a425ca06 |
|
05-Jun-2009 |
Nate Begeman <natebegeman@mac.com> |
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
build vectors with i64 elements will only appear on 32b x86 before legalize.
Since vector widening occurs during legalize, and produces i64 build_vector
elements, the dag combiner is never run on these before legalize splits them
into 32b elements.
Teach the build_vector dag combine in x86 back end to recognize consecutive
loads producing the low part of the vector.
Convert the two uses of TLI's consecutive load recognizer to pass LoadSDNodes
since that was required implicitly.
Add a testcase for the transform.
Old:
subl $28, %esp
movl 32(%esp), %eax
movl 4(%eax), %ecx
movl %ecx, 4(%esp)
movl (%eax), %eax
movl %eax, (%esp)
movaps (%esp), %xmm0
pmovzxwd %xmm0, %xmm0
movl 36(%esp), %eax
movaps %xmm0, (%eax)
addl $28, %esp
ret
New:
movl 4(%esp), %eax
pmovzxwd (%eax), %xmm0
movl 8(%esp), %eax
movaps %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72957 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77b81fe487de709d41dfcc97bbb2941ae1bb80af |
|
04-Jun-2009 |
Dan Gohman <gohman@apple.com> |
Don't do the X * 0.0 -> 0.0 transformation in instcombine, because
instcombine doesn't know when it's safe. To partially compensate
for this, introduce new code to do this transformation in
dagcombine, which can use UnsafeFPMath.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 874ae251c317788391f9c3f113957802d390a063 |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4150d83abe90a5da4ddf86433b7bf4329acfa57c |
|
02-Jun-2009 |
Dale Johannesen <dalej@apple.com> |
Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.
Most targets will still produce a Flag-setting target-dependent
version when selection is done. X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted. All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly. The
same can be done on other targets.
The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d3c76bb6fc3c066286850e91b8bf03484ea2a56e |
|
29-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not try to create a MVT type of width 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cdcecc03ce7d3cece0ef2a0d93fade05506849c1 |
|
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Incorporate patch feedbacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72533 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8b944d39b356135676459152385f05c496951f6c |
|
28-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
e.g.
orl $65536, 8(%rax)
=>
orb $1, 10(%rax)
Since narrowing is not always a win, e.g. i32 -> i16 is a loss on x86, dag combiner consults with the target before performing the optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72507 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6bb4958543e2b7ff412b3dac3ebf01a184193ad7 |
|
23-May-2009 |
Torok Edwin <edwintorok@gmail.com> |
Fix PR4254.
The DAGCombiner created a negative shiftamount, stored in an
unsigned variable. Later the optimizer eliminated the shift entirely as being
undefined.
Example: (srl (shl X, 56) 48). ShiftAmt is 4294967288.
Fix it by checking that the shiftamount is positive, and storing in a signed
variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72331 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8c562e2d25d319f8bde7a1a60142203f316a2883 |
|
18-May-2009 |
Daniel Dunbar <daniel@zuster.org> |
Silence Release-Asserts warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72011 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 777d2306b36816a53bc1ae1244c0dc7d998ae691 |
|
09-May-2009 |
Duncan Sands <baldrick@free.fr> |
Rename PaddedSize to AllocSize, in the hope that this
will make it more obvious what it represents, and stop
it being confused with the StoreSize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| caab129cd19441817906ea5ca69e341e81c598e3 |
|
06-May-2009 |
Evan Cheng <evan.cheng@apple.com> |
Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 98a366d547772010e94609e4584489b3e5ce0043 |
|
30-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5a5ca1519e04310f585197c20e7ae584b7f2d11f |
|
29-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
Implement review feedback for vector shuffle work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| be8cc2a3dedeb7685f07e68cdc4b9502eb97eb2b |
|
29-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c69d56f1154342a57c9bdd4c17a10333e3520127 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
r70270 isn't ready yet. Back this out. Sorry for the noise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e9d5f912a9841d3685ba0241abe1131943fed29 |
|
28-Apr-2009 |
Bill Wendling <isanbard@gmail.com> |
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.
Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70270 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9008ca6b6b4f638cfafccb593cbc5b1d3f5ab877 |
|
27-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
2nd attempt, fixing SSE4.1 issues and implementing feedback from duncan.
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70225 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c7b3444095f9aa5398d134c780e327a187cda231 |
|
27-Apr-2009 |
Dan Gohman <gohman@apple.com> |
When transforming sext(trunc(load(x))) into sext(smaller load(x)),
the trunc is directly replaced with the smaller load, so don't
try to create a new sext node. This fixes PR4050.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70179 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4128700ab11d0db62e5ba7ed8a8fc301c7aaa8b1 |
|
25-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Add a top-level comment about DAGCombiner's role in the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 15684b29552393553524171bff1913e750f390f8 |
|
24-Apr-2009 |
Rafael Espindola <rafael.espindola@gmail.com> |
Revert 69952. Causes testsuite failures on linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69967 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b706d29f9c5ed3ed9acc82f7ab46205ba56b92dc |
|
24-Apr-2009 |
Nate Begeman <natebegeman@mac.com> |
PR2957
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle
mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes
as the shuffle mask. A value of -1 represents UNDEF.
In addition to eliminating the creation of illegal BUILD_VECTORS just to
represent shuffle masks, we are better about canonicalizing the shuffle mask,
resulting in substantially better code for some classes of shuffles.
A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c885165e664f3b465403e1b6ce57ba63f57c5f0c |
|
20-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Revise my previous change 68996 as suggested by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b10b5ac8d9da43ca2db61401a20af6b676c98438 |
|
18-Apr-2009 |
Duncan Sands <baldrick@free.fr> |
Don't try to make BUILD_VECTOR operands have the same
type as the vector element type: allow them to be of
a wider integer type than the element type all the way
through the system, and not just as far as LegalizeDAG.
This should be safe because it used to be this way
(the old type legalizer would produce such nodes), so
backends should be able to handle it. In fact only
targets which have legal vector types with an illegal
promoted element type will ever see this (eg: <4 x i16>
on ppc). This fixes a regression with the new type
legalizer (vec_splat.ll). Also, treat SCALAR_TO_VECTOR
the same as BUILD_VECTOR. After all, it is just a
special case of BUILD_VECTOR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69467 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b1303d05a89972195de023fda432cc621375a27c |
|
14-Apr-2009 |
Bob Wilson <bob.wilson@apple.com> |
Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector. This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization. This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.
It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated. The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.
Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands. This patch updates all of the places that I could
find to handle that case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 57fc82d409022e793446c1c5d7d6d8b0d7579f83 |
|
09-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Generalize ExtendUsesToFormExtLoad to be usable for ANY_EXTEND,
in addition to ZERO_EXTEND and SIGN_EXTEND. Fix a bug in the
way it checked for live-out values, and simplify the way it
find users by using SDNode::use_iterator's (relatively) new
features. Also, make it slightly more permissive on targets
with free truncates.
In SelectionDAGBuild, avoid creating ANY_EXTEND nodes that are
larger than necessary. If the target's SwitchAmountTy has
enough bits, use it. This exposes the truncate to optimization
early, enabling more optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68670 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 97121ba2afb8d566ff1bf5c4e8fc5d4077940a7f |
|
08-Apr-2009 |
Dan Gohman <gohman@apple.com> |
Implement support for using modeling implicit-zero-extension on x86-64
with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.
This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.
Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.
Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.
Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.
Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b0cd9113af42c422c829563c3b12e6e52bd2d79 |
|
28-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67917 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a02a3dda5652995afaaf11148c11d98c9b9d908f |
|
26-Mar-2009 |
Bill Wendling <isanbard@gmail.com> |
Pull transform from target-dependent code into target-independent code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67742 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 93b7415f4cc9a83126f1d89b2d2f51a204b09dd6 |
|
17-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Fix a problem with DAGCombine where we were building an illegal build
vector shuffle mask. Forced the mask to be built using i32. Note: this will
be irrelevant once vector_shuffle no longer takes a build vector for the
shuffle mask.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67076 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b7a786842fd6601b99b1073e5393ebc928c1e6c |
|
14-Mar-2009 |
Mon P Wang <wangmp@apple.com> |
Avoid doing the transformation c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4
if FPConstant is legal because if the FPConstant doesn't need to be stored
in a constant pool, the transformation is unlikely to be profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1606e8e4cd937e6de6681f686c266cf61722d972 |
|
13-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.
Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d1980a5acd8509ea34ee2dec5e13de5dbe16af2d |
|
12-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Move 3 "(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))"
related transformations out of target-specific dag combine into the
ARM backend. These were added by Evan in r37685 with no testcases
and only seems to help ARM (e.g. test/CodeGen/ARM/select_xform.ll).
Add some simple X86-specific (for now) DAG combines that turn things
like cond ? 8 : 0 -> (zext(cond) << 3). This happens frequently
with the recently added cp constant select optimization, but is a
very general xform. For example, we now compile the second example
in const-select.ll to:
_test:
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
seta %al
movzbl %al, %eax
movl 4(%esp), %ecx
movsbl (%ecx,%eax,4), %eax
ret
instead of:
_test:
movl 4(%esp), %eax
leal 4(%eax), %ecx
movsd LCPI2_0, %xmm0
ucomisd 8(%esp), %xmm0
cmovbe %eax, %ecx
movsbl (%ecx), %eax
ret
This passes multisource and dejagnu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 600fec3cea2d1d894496cdb8dd4ae280a2395179 |
|
11-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
reapply my previous patch (r66358) with a tweak to set the
alignment of the generated constant pool entry to the
desired alignment of a type. If we don't do this, we end up
trying to do movsd from 4-byte alignment memory. This fixes
450.soplex and 456.hmmer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66641 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 41d88d2ac07d1ccbb3c0d1430d57102aada89390 |
|
10-Mar-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert 66358 for now. It's breaking povray, 450.soplex, and 456.hmmer on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66574 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 66b8bc3289b872cd4b7480710a530f718cc536de |
|
09-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
Fix PR3763 by using proper APInt methods instead of uint64_t's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 476769498e9d2f406a9f9f64218f513636734422 |
|
08-Mar-2009 |
Chris Lattner <sabre@nondot.org> |
implement an optimization to codegen c ? 1.0 : 2.0 as load { 2.0, 1.0 } + c*4.
For 2009-03-07-FPConstSelect.ll we now produce:
_f:
xorl %eax, %eax
testl %edi, %edi
movl $4, %ecx
cmovne %rax, %rcx
leaq LCPI1_0(%rip), %rax
movss (%rcx,%rax), %xmm0
ret
previously we produced:
_f:
subl $4, %esp
cmpl $0, 8(%esp)
movss LCPI1_0, %xmm0
je LBB1_2 ## entry
LBB1_1: ## entry
movss LCPI1_1, %xmm0
LBB1_2: ## entry
movss %xmm0, (%esp)
flds (%esp)
addl $4, %esp
ret
on PPC the code also improves to:
_f:
cntlzw r2, r3
srwi r2, r2, 5
li r3, lo16(LCPI1_0)
slwi r2, r2, 2
addis r3, r3, ha16(LCPI1_0)
lfsx f1, r3, r2
blr
from:
_f:
li r2, lo16(LCPI1_1)
cmplwi cr0, r3, 0
addis r2, r2, ha16(LCPI1_1)
beq cr0, LBB1_2 ; entry
LBB1_1: ; entry
li r2, lo16(LCPI1_0)
addis r2, r2, ha16(LCPI1_0)
LBB1_2: ; entry
lfs f1, 0(r2)
blr
This also improves the existing pic-cpool case from:
foo:
subl $12, %esp
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
cmpl $0, 16(%esp)
movsd .LCPI1_0@GOTOFF(%eax), %xmm0
je .LBB1_2 # entry
.LBB1_1: # entry
movsd .LCPI1_1@GOTOFF(%eax), %xmm0
.LBB1_2: # entry
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret
to:
foo:
call .Lllvm$1.$piclabel
.Lllvm$1.$piclabel:
popl %eax
addl $_GLOBAL_OFFSET_TABLE_ + [.-.Lllvm$1.$piclabel], %eax
xorl %ecx, %ecx
cmpl $0, 4(%esp)
movl $8, %edx
cmovne %ecx, %edx
fldl .LCPI1_0@GOTOFF(%eax,%edx)
ret
This triggers a few dozen times in spec FP 2000.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66358 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cbd88adea66261a2f4372906fe1e08c2093d8718 |
|
02-Mar-2009 |
Nate Begeman <natebegeman@mac.com> |
Fix a problem with DAGCombine on 64b targets where folding
extracts + build_vector into a shuffle would fail, because the
type of the new build_vector would not be legal. Try harder to
create a legal build_vector type. Note: this will be totally
irrelevant once vector_shuffle no longer takes a build_vector for
shuffle mask.
New:
_foo:
xorps %xmm0, %xmm0
xorps %xmm1, %xmm1
subps %xmm1, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
Old:
_foo:
xorps %xmm0, %xmm0
movss %xmm0, %xmm1
xorps %xmm2, %xmm2
unpcklps %xmm1, %xmm2
pshufd $80, %xmm1, %xmm1
unpcklps %xmm1, %xmm2
pslldq $16, %xmm2
pshufd $57, %xmm2, %xmm1
subps %xmm0, %xmm1
mulps %xmm0, %xmm1
addps %xmm0, %xmm1
movaps %xmm1, 0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65791 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a87008d90b7d894cfca53d407642acfd7be2af3c |
|
25-Feb-2009 |
Evan Cheng <evan.cheng@apple.com> |
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4214a5531cdbe538a358033f1847e55c4436be1b |
|
23-Feb-2009 |
Scott Michel <scottm@aero.org> |
Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1ba519b7265397ab5a1f8d87ef5f573f7a2e6b83 |
|
21-Feb-2009 |
Dan Gohman <gohman@apple.com> |
Fix a bug that David Greene found in the DAGCombiner's logic
that checks whether it's safe to transform a store of a bitcast
value into a store of the original value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65201 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fdc40a0a696c658d550d894ea03772e5f8af2c94 |
|
17-Feb-2009 |
Scott Michel <scottm@aero.org> |
Remove trailing whitespace to reduce later commit patch noise.
(Note: Eventually, commits like this will be handled via a pre-commit hook that
does this automagically, as well as expand tabs to spaces and look for 80-col
violations.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e8d7230f480654cdb8ff1c3d0a38e1e9ab0bd55f |
|
07-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there. UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| de06470330260f5937e7ca558f5f5b3e171f2ee5 |
|
06-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ff97d4fe81ef0dcee9fe490bed8ab08e40251905 |
|
03-Feb-2009 |
Dale Johannesen <dalej@apple.com> |
Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0d5cdd52e8448f769cd71aaee6a4b8592dc08b1 |
|
01-Feb-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3453 and probably a bunch of other potential
crashes or wrong code with codegen of large integers:
eliminate the legacy getIntegerVTBitMask and
getIntegerVTSignBit methods, which returned their
value as a uint64_t, so couldn't handle huge types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63494 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fc4b677cd526f1f6a3d6487782557af99fbf6c32 |
|
01-Feb-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot some more DebugLoc propagations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63493 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 92abc62399881ba9c525be80362c134ad836e2d9 |
|
31-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization. Thanks to Dan for writing the
original patch (which I shamelessly pillaged).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9729c5ad3413d3b69d4bc41aa918a7a8dd6bf9f0 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Don't use DebugLoc::getUnknownLoc(). Default to something hopefully sensible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 836ca7dc6e0dbffa83095ccf110ccd9f2bcfdb05 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63454 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c144a57e14faf52fd2223548922dc4174827df03 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c0debad7168e252c34631a04f62577d792c71e07 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in LOAD etc. methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63451 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0225a1dcb1b1324192bf34c532c6d18503017cd4 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
More DebugLoc propagation in floating-point methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63446 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d34470c4f76483f0f1098527d416cd065d46d950 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Standardize comments about folding xforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63443 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7581bfa2757a3149c6d17c0fe592e5c3808aa843 |
|
31-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Get rid of the non-DebugLoc-ified getNOT() method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63442 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a03e74bf6795478fd0b8d8d09b86ab517cda84b5 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0162f58c4dc07e325f47befcbb31c72d894bc1f |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some FP arithmetic methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 67a6768375d29bfda9ebf79edd1d9089f6fea9f5 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for BIT_CONVERT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63439 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8509c90a206eb04ed11da44d357f7250db3df346 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for more *_EXTEND methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63437 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 683c95764aa519ba21686e631fa8d2231c8dbd74 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for ANY_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63436 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6ce610f04bb232ce8b57e50e885f30f65d19e1a6 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for some of the *_EXTEND functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 34584e6aedf02a4123ac7605486093e798cdcb71 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info for SELECT.
- Added xform for (select X, 1, Y) and (select X, Y, 0), which was commented on,
but missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63428 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8810337e36fd56dacad557b016dfaacfc732730a |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for Shifts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 317bd709bdd119a286e4c2e10b59202dc7e81a13 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for XOR and MatchRotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63420 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 09025644791ca400242c51a61aa633f3ded3f3a3 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for OR. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6af7618b2378a3af378d681914976483b5b60c36 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Perform obvious constant arithmetic folding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2627a881e1ba1c7821537d607dbd80c0ef4d2363 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for AND. Also clean up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63416 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b74c8675b11db86c115f698f3d182f9039131161 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyBinOpWithSameOpcodeHands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63411 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 826d11463b3fb0ecadae532821e6d11170276dc1 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SimplifyNodeWithTwoResults.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 326411dc69db3ff6335a2b1351e05c80d20c2b3c |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MULHS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6d3bf8c4c3a1917f255df4ff0d47f4f51261bcc0 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SREM and UREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63374 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07d85140497a8fb58d9d2daa723c6c8b64948b73 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for UDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63373 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 944d34bfe8c79ddcb96516d3ba867be09ebf2890 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for SDIV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63372 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 73e16b2869fbc75ccb3506620b0342b6085fe843 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Forgot to propagate debug loc info here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9c8148ac93835b7d53c81c554cde2e6da3730771 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info for MUL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63369 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0702e0b7e4a9b0a0b4e707512d25ab5a1204408 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in SUB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 14036c00c0b3a83805695afb50b6d42430b70979 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in ADDC and ADDE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f4eb2269eba50a68d0227edc8c4b8872428fab33 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug loc info in DAG combine's "ADD".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63366 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d69c3141ed6d237ad19fdfbfcef8901491b24c2e |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
- Propagate debug loc info in combineSelectAndUse().
- Modify ReassociateOps so that the resulting SDValue is what the comment claims
it is.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63365 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5c71acfb0600ea9272a2dcce00e1610a5b8ee081 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Propagate debug location info for the token factor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63355 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 35247c35136232bb30aa17543dbcf9c92fa24d29 |
|
30-Jan-2009 |
Bill Wendling <isanbard@gmail.com> |
Add DebugLoc propagation to some of the methods in DAG combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e5af2d3a224d4b38760a26d237cde040cb6e14eb |
|
29-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make x86's BT instruction matching more thorough, and add some
dagcombines that help it match in several more cases. Add
several more cases to test/CodeGen/X86/bt.ll. This doesn't
yet include matching for BT with an immediate operand, it
just covers more register+register cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63266 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f560ffae1f1f6591859c7b70636a3eca6c03f083 |
|
28-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.
Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.
This is for the second half of PR3376.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ce9bc12c6f3c3544f7518c0c60203f2f9dff342f |
|
27-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Add an assertion to the form of SelectionDAG::getConstant that takes
a uint64_t to verify that the value is in range for the given type,
to help catch accidental overflow. Fix a few places that relied on
getConstant implicitly truncating the value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e7852d014432a06c783de3c350eb96e686f10f92 |
|
26-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Take the next steps in making SDUse more consistent with LLVM Use, and
tidy up SDUse and related code.
- Replace the operator= member functions with a set method, like
LLVM Use has, and variants setInitial and setNode, which take
care up updating use lists, like LLVM Use's does. This simplifies
code that calls these functions.
- getSDValue() is renamed to get(), as in LLVM Use, though most
places can either use the implicit conversion to SDValue or the
convenience functions instead.
- Fix some more node vs. value terminology issues.
Also, eliminate the one remaining use of SDOperandPtr, and
SDOperandPtr itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a90c8e690bd9103bb4a5d943f98279a55bf42ad1 |
|
23-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fold x-0 to x in unsafe-fp-math mode. This comes up in the
testcase from PR3376, and in fact is sufficient to completely
avoid the problem in that testcase.
There's an underlying problem though; TLI.isOperationLegal
considers Custom to be Legal, which might be ok in some
cases, but that's what DAGCombiner is using in many places
to test if something is legal when LegalOperations is true.
When DAGCombiner is running after legalize, this isn't
sufficient. I'll address this in a separate commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62860 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 67ba22318b49200ffdedb1f50a8d89f08e6c710c |
|
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Fix a minor bug in DAGCombiner's folding of SELECT. Folding "select C, 0, 1"
to "C ^ 1" is only valid when C is known to be either 0 or 1. Most of the
similar foldings in this function only handle "i1" types, but this one appears
intentionally written to handle larger integer types. If C has an integer
type larger than "i1", this needs to check if the high bits of a boolean
are known to be zero. I also changed the comment to describe this folding as
"C ^ 1" instead of "~C", since that is what the code does and since the latter
would only be valid for "i1" types. The good news is that most LLVM targets
use TargetLowering::ZeroOrOneBooleanContent so this change will not disable
the optimization; the bad news is that I've been unable to come up with a
testcase to demonstrate the problem.
I have also removed a "FIXME" comment for folding "select C, X, 0" to "C & X",
since the code looks correct to me. It could be made more aggressive by not
limiting the type to "i1", but that would then require checking for
TargetLowering::ZeroOrNegativeOneBooleanContent. Similar changes could be
done for the other SELECT foldings, but it was decided to be not worth the
trouble and complexity (see e.g., r44663).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62790 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 760f86f3395750ef6d03ecfe6f82d2867fbf568b |
|
22-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Don't create ISD::FNEG nodes after legalize if they aren't legal.
Simplify x+0 to x in unsafe-fp-math mode. This avoids a bunch of
redundant work in many cases, because in unsafe-fp-math mode,
ISD::FADD with a constant is considered free to negate, so the
DAGCombiner often negates x+0 to -0-x thinking it's free, when
in reality the end result is -x, which is more expensive than x.
Also, combine x*0 to 0.
This fixes PR3374.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62789 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4c2454623841f05c6c665659b34c214950d12d7e |
|
22-Jan-2009 |
Bob Wilson <bob.wilson@apple.com> |
Add SelectionDAG::getNOT method to construct bitwise NOT operations,
corresponding to the "not" and "vnot" PatFrags. Use the new method
in some places where it seems appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 764fd0cbc8a0ee512a9352cfeb123e8778542d28 |
|
21-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Simplify ReduceLoadWidth's logic: it doesn't need several different
special cases after producing the new reduced-width load, because the
new load already has the needed adjustments built into it. This fixes
several bugs due to the special cases, including PR3317.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f5add58549fe8ecd9a15cbb7c230282bd693516b |
|
20-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a dagcombine to not generate loads of non-round integer types,
as its comment says, even in the case where it will be generating
extending loads. This fixes PR3216.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dbe664adcddd8610952968d86791478c874cf1cd |
|
19-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix SelectionDAG::ReplaceAllUsesWith to behave correctly when
uses are added to the From node while it is processing From's
use list, because of automatic local CSE. The fix is to avoid
visiting any new uses.
Fix a few places in the DAGCombiner that assumed that after
a RAUW call, the From node has no users and may be deleted.
This fixes PR3018.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62533 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e3bc6ae92a17c28824fb4b6cf606d8ab07cae974 |
|
18-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element based on comments from Duncan Sands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7ac9cdfc991db344a1e0f642aefc6db6b868b9b0 |
|
17-Jan-2009 |
Mon P Wang <wangmp@apple.com> |
Simplify extract element of a scalar to vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62383 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b6a6164832572b2daeba604d6378ad49128d212f |
|
16-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Use the getNode() accessor instead of accessing the Node
member directly, which is private as of r55504.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| df874eed5695420c71bf55cc6a11725631ec2b88 |
|
16-Jan-2009 |
Chris Lattner <sabre@nondot.org> |
new nodes should be added to the worklist, not old nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62359 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 79ce276083ced01256a0eb7d80731e4948ca6e87 |
|
15-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get
destructed and re-constructed for each block. This fixes a
compile-time hot spot in the post-pass scheduler.
To help facilitate this, tidy and do some minor reorganization
in the scheduler constructor functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62275 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc91d63ab7b3ee5c80497acf77f75ad9f76e985c |
|
03-Jan-2009 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61613 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5480c0469e5c0323ffb12f1ead2abd169d6cc0e7 |
|
01-Jan-2009 |
Duncan Sands <baldrick@free.fr> |
Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType. In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7c7bc722ecdeec365074cac4bdb9e2679c02177f |
|
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Change comments so everybody can understand them, hopefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61405 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f9cbc1f9ac087937641c16b218d10986f5b406ad |
|
24-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add another permutation where we should get rid of a-a.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61401 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 58e39b0200f448b796a89e2b7e9b8a5607a1771a |
|
23-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more permutation of subtracting off a base value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fd3b7b7df3d539d1244933d375a766d7a7fe6c91 |
|
16-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
A new dag combine; several permutations of this
are there under ADD, this one was missing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61107 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ab55ebda1c2254f98b06e770bc2dae7d05a4a366 |
|
12-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Redo the arithmetic with overflow architecture. I was changing the semantics of
ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.
Similar for SUB and MUL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 775bb805c5a5a7ba6e4ccac85f650372a51e0273 |
|
11-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
Clarify FIXME.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60867 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a60b5236c1acd31e2aca5705c8bbbd2946ea0873 |
|
11-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Make fix for r60829 less conservative to allow the proper optimization for
vec_extract-sse4.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60865 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2476e5d3458ea3543f233159fcf4f2fea47426e9 |
|
10-Dec-2008 |
Bill Wendling <isanbard@gmail.com> |
If ADD, SUB, or MUL have an overflow bit that's used, don't do transformation on
them. The DAG combiner expects that nodes that are transformed have one value
result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60857 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bae527d949949da0cf45d279990eee21e7c66108 |
|
10-Dec-2008 |
Mon P Wang <wangmp@apple.com> |
Fixed a bug when trying to optimize a extract vector element of a
bit convert that changes the number of elements of a shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60829 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 34d7985927bbd31e16c7de3346eaf3426348ecb1 |
|
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
One more transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60432 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 221cd2f0813be675784b9825aee9f74f22026247 |
|
02-Dec-2008 |
Dale Johannesen <dalej@apple.com> |
Add a few more transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60391 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 56eca9103ecbf2293842bfd6067ac26629221eaf |
|
27-Nov-2008 |
Dale Johannesen <dalej@apple.com> |
Add a missing case in visitADD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 25cf2275ff7de3de3bc0e508abaf457413d74725 |
|
24-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
If the type legalizer actually legalized anything
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types. I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59960 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 03228089d5235f8c90477f88809139464e9c6ea5 |
|
23-Nov-2008 |
Duncan Sands <baldrick@free.fr> |
Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8ac0d4b4fb10406278cd600214cd3ee6d76620cd |
|
22-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
- Move conversion of [SU]ADDO from DAG combiner into legalizer.
- Add "promote integer type" stuff to the legalizer for these nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59847 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 137dccd5d86e0d0741f9560970f9b2952221d37c |
|
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Default to converting UADDO to the generic form that SADDO is converted to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59801 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6c63f62729fbd7cdf66f96ad52ea1bba62851311 |
|
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Remove chains. Unnecessary.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59783 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1c55a9c0cc355ad72c55ae7665143b9a992d223b |
|
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Rename "ADDO" to "SADDO" and "UADDO". The "UADDO" isn't equivalent to "ADDC"
because the boolean it returns to indicate an overflow may not be treated like
as a flag. It could be stored to memory, for instance.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59780 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7cdc3c8ad208d9655be542fc8b082c4457af4b6e |
|
21-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Implement the sadd_with_overflow intrinsic. This is converted into
"ISD::ADDO". ISD::ADDO is lowered into a target-independent form that does the
addition and then checks if the result is less than one of the operands. (If it
is, then there was an overflow.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59779 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ae89bb14431c6df4f784ae1af7019e72ec79b3ca |
|
11-Nov-2008 |
Bill Wendling <isanbard@gmail.com> |
Fix for PR3040:
The CC was changed, but wasn't checked to see if it was legal if the DAG
combiner was being run after legalization. Threw in a couple of checks just to
make sure that it's okay. As far as the PR is concerned, no back-end target
actually exhibited this problem, so there isn't an associated testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| aeb06d246254e4829a49164a11eacced9a43d9d4 |
|
10-Nov-2008 |
Mon P Wang <wangmp@apple.com> |
Added support for the following definition of shufflevector
<result> = shufflevector <n x <ty>> <v1>, <n x <ty>> <v2>, <m x i32> <mask>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58964 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3eb57d54395a979f8d16ca39cd41214a5daa55ea |
|
05-Nov-2008 |
Evan Cheng <evan.cheng@apple.com> |
Type of shuffle mask has changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58751 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6e1c6231ba93ed7590c62ef0f94d0d9443b598ed |
|
28-Oct-2008 |
Chris Lattner <sabre@nondot.org> |
Don't produce invalid comparisons after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58320 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 94989acaabec94d3b09367e218536629cbba666d |
|
19-Oct-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal integer type for vector shuffle mask
elements. Otherwise LegalizeTypes will, reasonably
enough, legalize the mask, which may result in it
no longer being a BUILD_VECTOR node (LegalizeDAG
simply ignores the legality or not of vector masks).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57782 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6520e20e4fb31f2e65e25c38b372b19d33a83df4 |
|
18-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to fold constant offsets into GlobalAddress nodes,
and add a TargetLowering hook for it to use to determine when this
is legal (i.e. not in PIC mode, etc.)
This allows instruction selection to emit folded constant offsets
in more cases, such as the included testcase, eliminating the need
for explicit arithmetic instructions.
This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp
that attempted to achieve the same effect, but wasn't as effective.
Also, fix handling of offsets in GlobalAddressSDNodes in several
places, including changing GlobalAddressSDNode's offset from
int to int64_t.
The Mips, Alpha, Sparc, and CellSPU targets appear to be
unaware of GlobalAddress offsets currently, so set the hook to
false on those targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 74feef261a43392bc85280f66c75fbd4e2ccf73d |
|
17-Oct-2008 |
Dan Gohman <gohman@apple.com> |
Define patterns for shld and shrd that match immediate
shift counts, and patterns that match dynamic shift counts
when the subtract is obscured by a truncate node.
Add DAGCombiner support for recognizing rotate patterns
when the shift counts are defined by truncate nodes.
Fix and simplify the code for commuting shld and shrd
instructions to work even when the given instruction doesn't
have a parent, and when the caller needs a new instruction.
These changes allow LLVM to use the shld, shrd, rol, and ror
instructions on x86 to replace equivalent code using two
shifts and an or in many more cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57662 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0329466b6b4927f4e6f5d144891fef06a027fec5 |
|
14-Oct-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename LoadX to LoadExt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57526 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7111b02c734c992b8c97d9918118768026dad79e |
|
09-Oct-2008 |
Dale Johannesen <dalej@apple.com> |
Rename APFloat::convertToAPInt to bitcastToAPInt to
make it clearer what the function does. No functional
change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57325 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7810bfed5570c192e0714a8fd0e5130a0c38dd2e |
|
26-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode's getSignExtended to getSExtValue, for
consistancy with ConstantInt, and re-implement it in terms
of ConstantInt's getSExtValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56700 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f3cbca279db891403659208a99f8e1cceb8c9ea6 |
|
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Reapplying r56550
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56553 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 83e05c48de05d66a6f664a3e6631692b5baae6e2 |
|
24-Sep-2008 |
Eric Christopher <echristo@apple.com> |
Temporarily revert r56550 until missing commit can be added.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| df0c7bc52d206782872b54a38a3374f0317ce6ff |
|
24-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Refactor the constant folding code into it's own function. And call it from both
the SelectionDAG and DAGCombiner code. The only functionality change is that now
the DAG combiner is performing the constant folding for these operations instead
of being a no-op.
This is *not* in response to a bug, so there isn't a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56550 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 242ebd145dea945364b4fa6ca6a187efe322036d |
|
22-Sep-2008 |
Evan Cheng <evan.cheng@apple.com> |
Per review feedback: Only perform
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56452 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4fbd796a1251a27e6590765a0a34876f436a0af9 |
|
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56162 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f5aeb1a8e4cf272c7348376d185ef8d8267653e0 |
|
12-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Rename ConstantSDNode::getValue to getZExtValue, for consistency
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 942ca7f808b88b8789c665a3733e58c75320834f |
|
08-Sep-2008 |
Dan Gohman <gohman@apple.com> |
In visitUREM, arrange for the temporary UDIV node to be
revisited, consistent with the code in visitSREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55923 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9a0d1ba0510ef68f35c21a43861dad957759d86f |
|
08-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Revert my previous change -- the subtraction of two constants was a no-op
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ca460d5a39e09836e279405b85e2390fa7e7d859 |
|
07-Sep-2008 |
Bill Wendling <isanbard@gmail.com> |
Convert
// fold (sub c1, c2) -> c1-c2
from a no-op into an actual transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55886 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3dd168d4452d0aff4960f01c5a7471a79eec45f3 |
|
05-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Fix a search+replace-o.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6448d91ad1e5497fe2f7015d61b57cb5f3040879 |
|
04-Sep-2008 |
Dan Gohman <gohman@apple.com> |
Clean up uses of TargetLowering::getTargetMachine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55769 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2692d5957482184e767503d9c0ae703163b338e3 |
|
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
Another situation where ROTR is cheaper than ROTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 353dea2f0aca7ddbdad242b9dabb065337744d98 |
|
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
For this pattern, ROTR is the cheaper option.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55576 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c5cbda12e933591ce76135aa776c44193255b2e9 |
|
31-Aug-2008 |
Bill Wendling <isanbard@gmail.com> |
- Fix comment so that it describes how the code really works:
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55575 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 12632d2222d983a1db197929df0f66393a239316 |
|
30-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
fix some 80-col violations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55571 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| eb9f89287e8ff3daeb9191ecd0cc3241a4f4137d |
|
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4529966d996bfb657a977c67b9bb777e5b244e0f |
|
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix 80 col. violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55551 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 17a568b6682874f7a5dfe92728d372421de3e645 |
|
30-Aug-2008 |
Evan Cheng <evan.cheng@apple.com> |
Back out 55498. It broken Apple style bootstrapping.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55549 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ba36cb5242eb02b12b277f82b9efe497f7da4d7f |
|
28-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a3f8b7a4ce8ab5c46d52077162851105a390a6ac |
|
28-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Optimize DAGCombiner's worklist processing. Previously it started
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 99a6cb92d173c142073416c81efe6d3daeb80b49 |
|
27-Aug-2008 |
Gabor Greif <ggreif@gmail.com> |
disallow direct access to SDValue::ResNo, provide a getter instead
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55394 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a267651b7ec4f96e01b31f541d446758bf8da8a9 |
|
20-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Disable DAGCombine's alignment inference in "fast" codegen mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55059 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7f8613e5b8398b688080e3c944ab8c11593e1ed0 |
|
14-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Improve support for vector casts in LLVM IR and CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54784 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8cea8ff34c7fb7a64b6fd247b9db0d097d1ffeea |
|
11-Aug-2008 |
Dan Gohman <gohman@apple.com> |
Take the FrameOffset into account when computing the alignment
of stack objects. This fixes PR2656.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54646 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 75dcf08243d19a40d2e1cc12057bf9c00ca3df3b |
|
31-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Improve dagcombining for sext-loads and sext-in-reg nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54239 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 475871a144eb604ddaf37503397ba0941442e5fb |
|
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Rename SDOperand to SDValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8968450305c28444edc3c272d8752a8db0c2f34a |
|
27-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Tidy SDNode::use_iterator, and complete the transition to have it
parallel its analogue, Value::value_use_iterator. The operator* method
now returns the user, rather than the use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54127 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 292578676524036842aecb2d932e3995dddd9c2a |
|
22-Jul-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix pr2566: incorrect assumption about bit_convert. It doesn't not have to output a vector value. Patch by Nicolas Capens!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53932 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 462dc7f4960e5074ddf4769ec8b2ef1ba7a4d2c8 |
|
21-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Add titles to the various SelectionDAG viewGraph calls
that include useful information like the name of the
block being viewed and the current phase of compilation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d038e04188047eca4749d025ef1f05f7ae660bca |
|
21-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Add VerifyNode, a place to put sanity checks on
generic SDNode's (nodes with their own constructors
should do sanity checking in the constructor). Add
sanity checks for BUILD_VECTOR and fix all the places
that were producing bogus BUILD_VECTORs, as found by
"make check". My favorite is the BUILD_VECTOR with
only two operands that was being used to build a
vector with four elements!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53850 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77926da196908244598627408babdc5254b4a991 |
|
18-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Revert 53729, after waking up in the middle of
the night realising that it was wrong :) I
think the reason the same type was being used
for the shufflevec of indices as for the actual
indices is so that if one of them needs splitting
then so does the other. After my patch it might
be that the indices need splitting but not the
rest, yet there is no good way of handling that.
I think the right solution is to not have the
shufflevec be an operand at all: just have it
be the list of numbers it actually is, stored
as extra info in the node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53768 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f1bb7f1d3e6b06185580ad4b4c343d402bf0a453 |
|
17-Jul-2008 |
Duncan Sands <baldrick@free.fr> |
Use a legal type for elements of the vector_shuffle
mask. These are just indices into the shuffled vector
so their type is unrelated to the type of the
shuffled elements (which is what was being used before).
This fixes vec_shuffle-11.ll when using LegalizeTypes.
What seems to have happened is that Dan's recent change
r53687, which corrected the result type of the shuffle,
somehow caused LegalizeTypes to notice that the mask
operand was a BUILD_VECTOR with a legal type but elements
of an illegal type (i64). LegalizeTypes legalized this
by introducing a new BUILD_VECTOR of i32 and bitcasting
it to the old type. But the mask operand is not supposed
to be a bitcast but a straight BUILD_VECTOR of constants,
causing a crash.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53729 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7a9a5af6a06058e86e9eae5a5486f651aeeda2ec |
|
16-Jul-2008 |
Dan Gohman <gohman@apple.com> |
Fix the result type of a VECTOR_SHUFFLE+BIT_CONVERT dagcombine. This
was turned up by some new SelectionDAG assertion checks that I'm
working on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53687 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cf8462f3004d3fc72217d09e4b3f135d68a50e9d |
|
30-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Use reserve.
SelectionDAG::allnodes_size is linear, but that doesn't appear to
outweigh the benefit of reducing heap traffic. If it does become a
problem, we should teach SelectionDAG to keep a count of how many
nodes are live, because there are several other places where that
information would be useful as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52926 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77455617fbc5e06591187be83aa349f6be8a95f8 |
|
28-Jun-2008 |
Dan Gohman <gohman@apple.com> |
When folding a bitcast into a load or store, preserve the alignment
information of the original load or store, which is checked to be
at least as good, and possibly better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52849 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f77e46be6d7c15656009c1e96423c4cdc3e60aa2 |
|
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
duncan points out that isOperationLegal includes a check for
type legality. Thanks Duncan!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52786 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cda8875433ef74c39c4151d1a58df0588168b2e2 |
|
26-Jun-2008 |
Chris Lattner <sabre@nondot.org> |
when we know the signbit of an input to uint_to_fp is zero,
change it to sint_to_fp on targets where that is cheaper (and
visaversa of course). This allows us to compile uint_to_fp to:
_test:
movl 4(%esp), %eax
shrl $23, %eax
cvtsi2ss %eax, %xmm0
movl 8(%esp), %eax
movss %xmm0, (%eax)
ret
instead of:
.align 3
LCPI1_0: ## double
.long 0 ## double least significant word 4.5036e+15
.long 1127219200 ## double most significant word 4.5036e+15
.text
.align 4,0x90
.globl _test
_test:
subl $12, %esp
movl 16(%esp), %eax
shrl $23, %eax
movl %eax, (%esp)
movl $1127219200, 4(%esp)
movsd (%esp), %xmm0
subsd LCPI1_0, %xmm0
cvtsd2ss %xmm0, %xmm0
movl 20(%esp), %eax
movss %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52747 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0a4627d71f8f836558ef05c9739b560e82412687 |
|
23-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Duncan pointed out this code could be tidied.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52624 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 56867520990a4fea1353d55f71bb74a0126554e6 |
|
22-Jun-2008 |
Dan Gohman <gohman@apple.com> |
Simplify some getNode calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ad205a76871b5112a4bf70edca0df9d03b92de49 |
|
16-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Allow these transforms for types like i256 while
still excluding types like i1 (not byte sized)
and i120 (loading an i120 requires loading an i64,
an i32, an i16 and an i8, which is expensive).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ec87aa87fea8cc5b5961849a34abb79ef7df64bc |
|
15-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
The transforms in visitEXTRACT_VECTOR_ELT are
not valid if the load is volatile. Hopefully
all wrong DAG combiner transforms of volatile
loads and stores have now been caught.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 184a876ee61dbbd602597f35e18240a5df8f5ee4 |
|
14-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove a redundant AfterLegalize check. Turn
on some code when !AfterLegalize - but since
this whole code section is turned off by an
"if (0)" it's not really turning anything on.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52276 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d4b9c17fb705c2f58ceef4f37d789ddb56783584 |
|
13-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Disable some DAG combiner optimizations that may be
wrong for volatile loads and stores. In fact this
is almost all of them! There are three types of
problems: (1) it is wrong to change the width of
a volatile memory access. These may be used to
do memory mapped i/o, in which case a load can have
an effect even if the result is not used. Consider
loading an i32 but only using the lower 8 bits. It
is wrong to change this into a load of an i8, because
you are no longer tickling the other three bytes. It
is also unwise to make a load/store wider. For
example, changing an i16 load into an i32 load is
wrong no matter how aligned things are, since the
fact of loading an additional 2 bytes can have
i/o side-effects. (2) it is wrong to change the
number of volatile load/stores: they may be counted
by the hardware. (3) it is wrong to change a volatile
load/store that requires one memory access into one
that requires several. For example on x86-32, you
can store a double in one processor operation, but to
store an i64 requires two (two i32 stores). In a
multi-threaded program you may want to bitcast an i64
to a double and store as a double because that will
occur atomically, and be indivisible to other threads.
So it would be wrong to convert the store-of-double
into a store of an i64, because this will become two
i32 stores - no longer atomic. My policy here is
to say that the number of processor operations for
an illegal operation is undefined. So it is alright
to change a store of an i64 (requires at least two
stores; but could be validly lowered to memcpy for
example) into a store of double (one processor op).
In short, if the new store is legal and has the same
size then I say that the transform is ok. It would
also be possible to say that transforms are always
ok if before they were illegal, whether after they
are illegal or not, but that's more awkward to do
and I doubt it buys us anything much.
However this exposed an interesting thing - on x86-32
a store of i64 is considered legal! That is because
operations are marked legal by default, regardless of
whether the type is legal or not. In some ways this
is clever: before type legalization this means that
operations on illegal types are considered legal;
after type legalization there are no illegal types
so now operations are only legal if they really are.
But I consider this to be too cunning for mere mortals.
Better to do things explicitly by testing AfterLegalize.
So I have changed things so that operations with illegal
types are considered illegal - indeed they can never
map to a machine operation. However this means that
the DAG combiner is more conservative because before
it was "accidentally" performing transforms where the
type was illegal because the operation was nonetheless
marked legal. So in a few such places I added a check
on AfterLegalize, which I suppose was actually just
forgotten before. This causes the DAG combiner to do
slightly more than it used to, which resulted in the X86
backend blowing up because it got a slightly surprising
node it wasn't expecting, so I tweaked it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| edfcf598faab9ce294712551ecf67093acd1c66e |
|
11-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Sometimes (rarely) nodes held in LegalizeTypes
maps can be deleted. This happens when RAUW
replaces a node N with another equivalent node
E, deleting the first node. Solve this by
adding (N, E) to ReplacedNodes, which is already
used to remap nodes to replacements. This means
that deleted nodes are being allowed in maps,
which can be delicate: the memory may be reused
for a new node which might get confused with the
old deleted node pointer hanging around in the
maps, so detect this and flush out maps if it
occurs (ExpungeNode). The expunging operation
is expensive, however it never occurs during
a llvm-gcc bootstrap or anywhere in the nightly
testsuite. It occurs three times in "make check":
Alpha/illegal-element-type.ll,
PowerPC/illegal-element-type.ll and
X86/mmx-shift.ll. If expunging proves to be too
expensive then there are other more complicated
ways of solving the problem.
In the normal case this patch adds the overhead
of a few more map lookups, which is hopefully
negligable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52214 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 893076354a9fdb915cda27678570914dfd5732fa |
|
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Various tweaks related to apint codegen. No functionality
change for non-funky-sized integers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52151 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8eab8a2798fe74c98703bdeac64661beea0b4dbc |
|
09-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove some DAG combiner assumptions about sizes
of integer types. Fix the isMask APInt method to
actually work (hopefully) rather than crashing
because it adds apints of different bitwidths.
It looks like isShiftedMask is also broken, but
I'm leaving that one to the APInt people (it is
not used anywhere).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52142 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8e4eb09b1e3571965f49edcdfb56b1375b1b7551 |
|
08-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Remove comparison methods for MVT. The main cause
of apint codegen failure is the DAG combiner doing
the wrong thing because it was comparing MVT's using
< rather than comparing the number of bits. Removing
the < method makes this mistake impossible to commit.
Instead, add helper methods for comparing bits and use
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52098 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 83ec4b6711980242ef3c55a4fa36b2d7a39c1bfb |
|
06-Jun-2008 |
Duncan Sands <baldrick@free.fr> |
Wrap MVT::ValueType in a struct to get type safety
and better control the abstraction. Rename the type
to MVT. To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits(). Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52044 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ee335e35acf20d1ed5b781546d647c19b608890e |
|
23-May-2008 |
Dan Gohman <gohman@apple.com> |
Add #includes to make some dependencies explicit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51496 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1fdfa6aabf0518373030cdc7db16c281c33a35ce |
|
20-May-2008 |
Dan Gohman <gohman@apple.com> |
Code simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51345 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77f0b7a50a08614b5ffd58f1864b68a9a30d0cb0 |
|
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51026 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9bfa03c6fd8e02b738e0077fd1af7b18eeeeb4c1 |
|
13-May-2008 |
Evan Cheng <evan.cheng@apple.com> |
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51008 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 187db7b950e57e2f1f10b57e7ee2a7f38e8965c0 |
|
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Evan pointed out that folding sext to zext may not be correct
if the zext is not legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8f0ad582e81e24f2ab35f9e9d2308339c8e8cbeb |
|
28-Apr-2008 |
Dan Gohman <gohman@apple.com> |
Teach DAGCombine to convert (sext x) to (zext x) when the
sign-bit of x is known to be zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9cac5259fe237120a0c347d6d14e549005148f1b |
|
16-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.
Patch is approved by Dan Gohman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49795 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dc1adac582fa120861f18ae7221bfe1421fea59f |
|
07-Apr-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49330 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6397c64441ddce3822ab0e712f224a11bd75811c |
|
03-Apr-2008 |
Evan Cheng <evan.cheng@apple.com> |
Backing out 48222 temporarily.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b061c4bc44caf62a16adad6047cda60785c2d0a4 |
|
31-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner optimization to respect volatile qualification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48994 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e326332acd5fefb9854118603b4d07d4e44b64c5 |
|
26-Mar-2008 |
Roman Levenstein <romix.llvm@googlemail.com> |
Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.
The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.
On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 26471c48b3d49bdbcfcc05cb9a575b5fa123fbbf |
|
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48792 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ea10046ebc7aa103e8434ef63c4350d676dc20f3 |
|
25-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Remove an unneeded test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 08b1173971a51eb89d7d6ee0992c39170c86994a |
|
22-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b9b042800445178e2dff1c83ead3d08d3f36dc29 |
|
20-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Check even more carefully before applying this DAGCombine transform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48580 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 260e07ec8ceb98337a9eeb5377d97dfcc0058a25 |
|
20-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 15cbde3cf6542ec9c120f59d5d8f3586f5f332c6 |
|
19-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2974e49019b05ee4bec175a8d9cc736a512e3254 |
|
18-Mar-2008 |
Bill Wendling <isanbard@gmail.com> |
Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48510 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 981576c8182d9099030153772ac2c40ef79290fb |
|
18-Mar-2008 |
Christopher Lamb <christopher.lamb@gmail.com> |
Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 002e5d0a170dadd5c307e0b00d8c7970835837e6 |
|
13-Mar-2008 |
Dan Gohman <gohman@apple.com> |
More APInt-ification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48344 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c8e3b147eea6155eb047340205730b5332259bb6 |
|
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0cec956d814123140759cd25fec8f07e65b43849 |
|
12-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Total brain cramp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 62fcc41d958bf9b8cee43271789136cb7100705f |
|
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Somewhat better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5b8f82e35b51bf007de07a7ca9347d804084ddf8 |
|
10-Mar-2008 |
Scott Michel <scottm@aero.org> |
Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.
This is a cosmetic change, no functionality impacted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ff247d2ed41dac50d99c5ff534b12f33bb57310a |
|
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Doh
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f79e60649a5edea03bdccf8521d77c15cbb33af4 |
|
10-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 917be6814e0a4e529d290be5d806a054bbbc4a27 |
|
04-Mar-2008 |
Evan Cheng <evan.cheng@apple.com> |
Rename isOperand() to isOperandOf() (and other similar methods). It always confuses me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 220a823f8d044b7e9484999c9ec73e3cbe6d251c |
|
04-Mar-2008 |
Dan Gohman <gohman@apple.com> |
Misc. APInt-ification in the DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47869 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7b8d4a9eef4eb02e561227b50c9d119cea4e8860 |
|
27-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert SimplifyDemandedMask and ShrinkDemandedConstant to use APInt.
Change several cases in SimplifyDemandedMask that don't ever do any
simplifying to reuse the logic in ComputeMaskedBits instead of
duplicating it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47648 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| aeecb6c73ae05100eec57e9521beb87635f1f26e |
|
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PR2096, a regression introduced with my patch last night. This
also fixes cfrac, flops, and 175.vpr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0254e7033a1d879357e582dcdc1943e656192768 |
|
26-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Fix isNegatibleForFree to not return true for ConstantFP nodes
after legalize. Just because a constant is legal (e.g. 0.0 in SSE)
doesn't mean that its negated value is legal (-0.0). We could make
this stronger by checking to see if the negated constant is actually
legal post negation, but it doesn't seem like a big deal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47591 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e68b6f52d0979575b2f02ed29717d907ba0684c |
|
25-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert MaskedValueIsZero and all its users to use APInt. Also add
a SignBitIsZero function to simplify a common use case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b5660dc8223bd5eb3d21d9855692617fcdec5663 |
|
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47382 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 948d8eadec92cc5f31f196de41dd6dfe8579a0c6 |
|
20-Feb-2008 |
Dan Gohman <gohman@apple.com> |
Convert DAGCombiner to use the APInt form of ComputeMaskedBits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47381 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4c71dfe356716e6bc1993ef5efdced08b68fe612 |
|
20-Feb-2008 |
Anton Korobeynikov <asl@math.spbu.ru> |
Update gcc 4.3 warnings fix patch with recent head changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47368 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| efec751a1b786724862ceff52748df94873a807e |
|
19-Feb-2008 |
Evan Cheng <evan.cheng@apple.com> |
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47290 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fec42eb6daff7e8b644bd24cbf12f83d6b14bd8b |
|
13-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
teach dag combiner how to eliminate MERGE_VALUES nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47052 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0753fc1850a1ca4d17acca854d830d67737fd623 |
|
11-Feb-2008 |
Duncan Sands <baldrick@free.fr> |
Add a isBigEndian method to complement isLittleEndian.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 91b9ad182411153608d5bb4232209f3b5fd6bd6b |
|
10-Feb-2008 |
Bill Wendling <isanbard@gmail.com> |
Return "(c1 + c2)" instead of yet another ADD node (which made this a
no-op).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d8cd3be37062747f1abbcdb6de4547574ceea603 |
|
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
the world doesn't need my debugging code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f8dc0617baceeba8ccd67c8881eb88eb1be2902c |
|
03-Feb-2008 |
Chris Lattner <sabre@nondot.org> |
Change the 'global modification' APIs in SelectionDAG to take a new
DAGUpdateListener object pointer instead of just returning a vector
of deleted nodes. This makes the interfaces more efficient (no more
allocating a vector [at least a malloc], filling it in, then walking
it) and more clean. This also allows the client to be notified of
nodes that are *changed* but not deleted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b625f2f8960de32bc973092aaee8ac62863006fe |
|
30-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Factor the addressing mode and the load/store VT out of LoadSDNode
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46538 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 303595942502f17c087fa28874c2b89117148c45 |
|
29-Jan-2008 |
Dan Gohman <gohman@apple.com> |
Use empty() instead of comparing size() with zero.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46514 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f32aac3090849fed64906f7bae499b726a51f877 |
|
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix PowerPC/./2007-10-18-PtrArithmetic.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46424 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ee339f4b2ab3e7789f02a714bbd8b1fb9f956467 |
|
28-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fix a crash on CodeGen/X86/vector-rem.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46422 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3bd39d4ca89804e97c93b039f6c2933f514c165c |
|
27-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Implement some dag combines that allow doing fneg/fabs/fcopysign in integer
registers if used by a bitconvert or using a bitconvert. This allows us to
avoid constant pool loads and use cheaper integer instructions when the
values come from or end up in integer regs anyway. For example, we now
compile CodeGen/X86/fp-in-intregs.ll to:
_test1:
movl $2147483648, %eax
xorl 4(%esp), %eax
ret
_test2:
movl $1065353216, %eax
orl 4(%esp), %eax
andl $3212836864, %eax
ret
Instead of:
_test1:
movss 4(%esp), %xmm0
xorps LCPI2_0, %xmm0
movd %xmm0, %eax
ret
_test2:
movss 4(%esp), %xmm0
andps LCPI3_0, %xmm0
movss LCPI3_1, %xmm1
andps LCPI3_2, %xmm1
orps %xmm0, %xmm1
movd %xmm1, %eax
ret
bitconverts can happen due to various calling conventions that require
fp values to passed in integer regs in some cases, e.g. when returning
a complex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46414 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1329cb8d8992c34365fcc2ac0447356708157dfb |
|
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Infer alignment of loads and increase their alignment when we can tell they are
from the stack. This allows us to compile stack-align.ll to:
_test:
movsd LCPI1_0, %xmm0
movapd %xmm0, %xmm1
*** andpd 4(%esp), %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
instead of:
_test:
movsd LCPI1_0, %xmm0
** movsd 4(%esp), %xmm1
** andpd %xmm0, %xmm1
andpd _G, %xmm0
addsd %xmm1, %xmm0
movl 20(%esp), %eax
movsd %xmm0, (%eax)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46401 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5eee427594c87a037a108047b3cd39c14f724752 |
|
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs in SimplifyNodeWithTwoResults where it would call deletenode to
delete a node even if it was not dead in some cases. Instead, just add it to
the worklist. Also, make sure to use the CombineTo methods, as it was doing
things that were unsafe: the top level combine loop could touch dangling memory.
This fixes CodeGen/Generic/2008-01-25-dag-combine-mul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46384 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 50d8e491a2c044efb9f7b5c0c223d29ea2dbf6cd |
|
26-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
reduce indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46377 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 00161a63dda71714df312661ceed0a318ed8b266 |
|
25-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Add skeletal code to increase the alignment of loads and stores when
we can infer it. This will eventually help stuff, though it doesn't
do much right now because all fixed FI's have an alignment of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46349 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 23e202dee012011a25b3b309d3c05d1915767773 |
|
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
clarify a comment, thanks Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46313 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 125991a1f62db419fc4a504986a998d85fbef699 |
|
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Fix this buggy transformation. Two observations:
1. we already know the value is dead, so don't bother replacing
it with undef.
2. The very case the comment describes actually makes the load
live which asserts in deletenode. If we do the replacement
and the node becomes live, just treat it as new. This fixes
a failure on X86/2008-01-16-InvalidDAGCombineXform.ll with
some local changes in my tree.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46306 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 20e3d86766a38492b3f6203bf4cf70dd9d187b7b |
|
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
The dag combiner is missing revisiting nodes that it really should, and thus leaving
dead stuff around. This gets fed into the isel pass and causes certain foldings from
happening because nodes have extraneous uses floating around. For example, if we turned
foo(bar(x)) -> baz(x), we sometimes left bar(x) around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46305 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0aa5e6f3fbde81c0bf0310ab0582420f0eeb7155 |
|
24-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
fold fp_round(fp_round(x)) -> fp_round(x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46304 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ddf89566a93081cb230bb9406a72ab2d3eada4a7 |
|
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
This commit changes:
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46140 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4626b250a2a83fbd055dde70629cf0b89356e1d3 |
|
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
code cleanups, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46126 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0bd4893a0726889b942405262e53d06cf3fe3be8 |
|
17-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
* Introduce a new SelectionDAG::getIntPtrConstant method
and switch various codegen pieces and the X86 backend over
to using it.
* Add some comments to SelectionDAGNodes.h
* Introduce a second argument to FP_ROUND, which indicates
whether the FP_ROUND changes the value of its input. If
not it is safe to xform things like fp_extend(fp_round(x)) -> x.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46125 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 02c42856431562376ac8280b57ad744ba83f1e38 |
|
17-Jan-2008 |
Evan Cheng <evan.cheng@apple.com> |
Fixes a nasty dag combiner bug that causes a bunch of tests to fail at -O0.
It's not safe to use the two value CombineTo variant to combine away a dead load.
e.g.
v1, chain2 = load chain1, loc
v2, chain3 = load chain2, loc
v3 = add v2, c
Now we replace use of v1 with undef, use of chain2 with chain1.
ReplaceAllUsesWith() will iterate through uses of the first load and update operands:
v1, chain2 = load chain1, loc
v2, chain3 = load chain1, loc
v3 = add v2, c
Now the second load is the same as the first load, SelectionDAG cse will ensure
the use of second load is replaced with the first load.
v1, chain2 = load chain1, loc
v3 = add v1, c
Then v1 is replaced with undef and bad things happen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46099 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 572dee71af1313e6742e1dfd5274fff326b9ef1c |
|
16-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Factor the ReachesChainWithoutSideEffects out of dag combiner into
a public SDOperand::reachesChainWithoutSideEffects method. No
functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46050 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07649d9265c9a378fe753f80601ae5f4de3312dc |
|
09-Jan-2008 |
Chris Lattner <sabre@nondot.org> |
Make load->store deletion a bit smarter. This allows us to compile this:
void test(long long *P) { *P ^= 1; }
into just:
_test:
movl 4(%esp), %eax
xorl $1, (%eax)
ret
instead of code like this:
_test:
movl 4(%esp), %ecx
xorl $1, (%ecx)
movl 4(%ecx), %edx
movl %edx, 4(%ecx)
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45762 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4ee451de366474b9c228b4e5fa573795a715216d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Remove attribution from file headers, per discussion on llvmdev.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b253a8b382824586066a299e1279838f41117e3b |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
make sure not to zap volatile stores, thanks a lot to Dale for noticing this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5938bef2d259ca7648481ec3fb4cefbdff22458d |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
don't fold fp_round(fp_extend(load)) -> fp_round(extload)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45400 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3c87285af63bc6d9b93f8eefe46ce9fea063d66c |
|
29-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Delete a store whose input is a load from the same pointer:
x = load p
store x -> p
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b16f55f3c82fe72e2ca73f1071db5daaa2124e51 |
|
22-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Tell TargetLoweringOpt whether it is running before
or after legalize.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45321 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 02132d62c1ed55fc0d5e03413c314fffc59489f0 |
|
19-Dec-2007 |
Evan Cheng <evan.cheng@apple.com> |
Don't leave newly created nodes around if it turns out they are not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45186 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e0e6fac5e9179b2c95fe3c25591474e4b94f5047 |
|
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Redo previous patch so optimization only done for i1.
Simpler and safer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44663 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d3fd6d2b25fc4e932ac796664ae7f4cd810ced8a |
|
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
third time around: instead of disabling this completely,
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e00cbad78de86ac8e736f35db35632c83ef64c1d |
|
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
Actually, disable this code for now. More analysis and improvements to
the X86 backend are needed before this should be enabled by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44657 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e70da20f9a7edb15e1d9bd221839e2ff26e40955 |
|
06-Dec-2007 |
Chris Lattner <sabre@nondot.org> |
implement a readme entry, compiling the code into:
_foo:
movl $12, %eax
andl 4(%esp), %eax
movl _array(%eax), %eax
ret
instead of:
_foo:
movl 4(%esp), %eax
shrl $2, %eax
andl $3, %eax
movl _array(,%eax,4), %eax
ret
As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:
- movl 8(%eax), %eax
- shll $2, %eax
- andl $1020, %eax
- movl (%esi,%eax), %eax
+ movzbl 8(%eax), %eax
+ movl (%esi,%eax,4), %eax
- shll $2, %edx
- andl $1020, %edx
- movl (%edi,%edx), %edx
+ andl $255, %edx
+ movl (%edi,%edx,4), %edx
Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:
- andl $85, %ebx
- addl _bit_count(,%ebx,4), %ebp
+ shll $2, %ebx
+ andl $340, %ebx
+ addl _bit_count(%ebx), %ebp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 59f1e97ef3940840e023ae1d6226c9b416222d2d |
|
06-Dec-2007 |
Dale Johannesen <dalej@apple.com> |
Fix PR1842.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44649 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 77003040b21816725dc1ca3a55111044d36ac21f |
|
27-Nov-2007 |
Dan Gohman <gohman@apple.com> |
Don't lower srem/urem X%C to X-X/C*C unless the division is actually
optimized. This avoids creating illegal divisions when the combiner is
running after legalize; this fixes PR1815. Also, it produces better
code in the included testcase by avoiding the subtract and multiply
when the division isn't optimized.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fd617d0143a158bc1c996445262d409280e7b0cc |
|
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Move MinAlign to MathExtras.h.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43944 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c6fa170b4db6659c411e77a9a5144ae2e92136c7 |
|
09-Nov-2007 |
Duncan Sands <baldrick@free.fr> |
Fix some load/store logic that would be wrong for
apints on big-endian machines if the bitwidth is
not a multiple of 8. Introduce a new helper,
MVT::getStoreSizeInBits, and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4471194d69cc99ed53dc1638e06053b069dc6454 |
|
08-Nov-2007 |
Evan Cheng <evan.cheng@apple.com> |
If both parts of smul_lohi, etc. are used, don't simplify. If only one part is used, try simplify it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43888 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| de1631bc85380857b11240eb22ddff2bfa5b7104 |
|
30-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43511 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 090b38a0dafbdad144db1e2c5c9db082eb7dc9fe |
|
29-Oct-2007 |
Dan Gohman <gohman@apple.com> |
Fix a DAGCombiner abort on a bitcast from a scalar to a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43470 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3c3ddb3a856e44c603cb8cf8f52ff9c0f06ff14a |
|
29-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dc84650679b6330e0fcdd4cf8bc2a351387db7ca |
|
28-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
The guaranteed alignment of ptr+offset is only the minimum of
of offset and the alignment of ptr if these are both powers of
2. While the ptr alignment is guaranteed to be a power of 2,
there is no reason to think that offset is. For example, if
offset is 12 (the size of a long double on x86-32 linux) and
the alignment of ptr is 8, then the alignment of ptr+offset
will in general be 4, not 8. Introduce a function MinAlign,
lifted from gcc, for computing the minimum guaranteed alignment.
I've tried to fix up everywhere under lib/CodeGen/SelectionDAG/.
I also changed some places that weren't wrong (because both values
were a power of 2), as a defensive change against people copying
and pasting the code.
Hopefully someone who cares about alignment will review the rest
of LLVM and fix up the remaining places. Since I'm on x86 I'm
not very motivated to do this myself...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43421 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b6210fc92b643a5440d8373b5f36b6e579b5feb8 |
|
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Redo "last ppc long double fix" as Chris wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43189 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fabd32deb025ebd47c5eb47259d2424fd789b05c |
|
19-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
More ppcf128 issues (maybe the last)?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43160 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| db44bf85d832b26c398cda9acfd3473832f6e585 |
|
17-Oct-2007 |
Dale Johannesen <dalej@apple.com> |
Disable attempts to constant fold PPC f128.
Remove the assumption that this will happen from
various places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43053 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 01d029b82cb08367d81aa10cdc94d05360466649 |
|
15-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
One mundane change: Change ReplaceAllUsesOfValueWith to *optionally*
take a deleted nodes vector, instead of requiring it.
One more significant change: Implement the start of a legalizer that
just works on types. This legalizer is designed to run before the
operation legalizer and ensure just that the input dag is transformed
into an output dag whose operand and result types are all legal, even
if the operations on those types are not.
This design/impl has the following advantages:
1. When finished, this will *significantly* reduce the amount of code in
LegalizeDAG.cpp. It will remove all the code related to promotion and
expansion as well as splitting and scalarizing vectors.
2. The new code is very simple, idiomatic, and modular: unlike
LegalizeDAG.cpp, it has no 3000 line long functions. :)
3. The implementation is completely iterative instead of recursive, good
for hacking on large dags without blowing out your stack.
4. The implementation updates nodes in place when possible instead of
deallocating and reallocating the entire graph that points to some
mutated node.
5. The code nicely separates out handling of operations with invalid
results from operations with invalid operands, making some cases
simpler and easier to understand.
6. The new -debug-only=legalize-types option is very very handy :),
allowing you to easily understand what legalize types is doing.
This is not yet done. Until the ifdef added to SelectionDAGISel.cpp is
enabled, this does nothing. However, this code is sufficient to legalize
all of the code in 186.crafty, olden and freebench on an x86 machine. The
biggest issues are:
1. Vectors aren't implemented at all yet
2. SoftFP is a mess, I need to talk to Evan about it.
3. No lowering to libcalls is implemented yet.
4. Various operations are missing etc.
5. There are FIXME's for stuff I hax0r'd out, like softfp.
Hey, at least it is a step in the right direction :). If you'd like to help,
just enable the #ifdef in SelectionDAGISel.cpp and compile code with it. If
this explodes it will tell you what needs to be implemented. Help is
certainly appreciated.
Once this goes in, we can do three things:
1. Add a new pass of dag combine between the "type legalizer" and "operation
legalizer" passes. This will let us catch some long-standing isel issues
that we miss because operation legalization often obfuscates the dag with
target-specific nodes.
2. We can rip out all of the type legalization code from LegalizeDAG.cpp,
making it much smaller and simpler. When that happens we can then
reimplement the core functionality left in it in a much more efficient and
non-recursive way.
3. Once the whole legalizer is non-recursive, we can implement whole-function
selectiondags maybe...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42981 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e33544ce55ca18e6e9c90ab7a4de85c90f907258 |
|
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.
This allows this code:
void foo(char *P) {
strcpy(P, "abc");
}
to compile to:
_foo:
ldrb r3, [r1]
ldrb r2, [r1, #+1]
ldrb r12, [r1, #+2]!
ldrb r1, [r1, #+1]
strb r1, [r0, #+3]
strb r2, [r0, #+1]
strb r12, [r0, #+2]
strb r3, [r0]
bx lr
instead of:
_foo:
ldrb r3, [r1, #+3]
ldrb r2, [r1, #+2]
orr r3, r2, r3, lsl #8
ldrb r2, [r1, #+1]
ldrb r1, [r1]
orr r2, r1, r2, lsl #8
orr r3, r2, r3, lsl #16
strb r3, [r0]
mov r2, r3, lsr #24
strb r2, [r0, #+3]
mov r2, r3, lsr #16
strb r2, [r0, #+2]
mov r3, r3, lsr #8
strb r3, [r0, #+1]
bx lr
testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll
This also helps occasionally for X86 and other cases not involving
unaligned load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2b4c279a8e203fa8b13adf7ba3a5d4c8bef70df3 |
|
13-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the
knowledge that they don't demand the top bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 272dce013727398ff9a8726bc720bc6ecff81184 |
|
10-Oct-2007 |
Duncan Sands <baldrick@free.fr> |
Correct swapped arguments to getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42824 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 389079b59f6fc1283eeed407df36959a3fbc0e48 |
|
08-Oct-2007 |
Dan Gohman <gohman@apple.com> |
DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 513da43c9c290094e3f12c0d1ba07c18f062d13c |
|
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Reapply 42677.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5349de1372dabab40691d348f2404da1e1478ef7 |
|
06-Oct-2007 |
Chris Lattner <sabre@nondot.org> |
revert evan's patch until the header is committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c231e8c8a5af35bbecf7eca34a23e519083b1422 |
|
06-Oct-2007 |
Evan Cheng <evan.cheng@apple.com> |
Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr)
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e0480d2ec271bb0043f18feaf4131f6b6cf50757 |
|
18-Sep-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a bogus splat xform:
shuffle <undef, undef, x, undef>, <undef, undef, undef, undef>, <2, 2, 2, 2>
!=
<undef, undef, x, undef>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42111 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c7b21d520ac0400c5661dca2fb67a17ef65c6ac4 |
|
18-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Prevent crash on long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42103 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9d5f45607793052bf5b4436d1b43013fab9999ac |
|
12-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Revise previous patch per review comments.
Next round of x87 long double stuff.
Getting close now, basically works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3f6eb7419de437436265831fce92f62498556e08 |
|
11-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add APInt interfaces to APFloat (allows directly
access to bits). Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling
(untested, probably does not work).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41858 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 61c5ff460b18b970aa651115c4ac78dfc0d602d7 |
|
10-Sep-2007 |
Chris Lattner <sabre@nondot.org> |
Emit:
cmpl %eax, %ecx
setae %al
movzbl %al, %eax
instead of:
cmpl %eax, %ecx
setb %al
xorb $1, %al
movzbl %al, %eax
when using logical not of a C comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41807 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c4dd3c3b519aa2c2ed26ce03a4b1fbb992efeaca |
|
01-Sep-2007 |
Dale Johannesen <dalej@apple.com> |
Add mod, copysign, abs operations to APFloat.
Implement some constant folding in SelectionDAG and
DAGCombiner using APFloat. Remove double versions
of constructor and getValue from ConstantFPSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41664 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e9c8fa095e503933840fa1ea41b4583817db5680 |
|
27-Aug-2007 |
Dan Gohman <gohman@apple.com> |
Make DAGCombiner's global alias analysis query more precise in the case
where both pointers have non-zero offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e6c1742914149d44360fbf05a653041a672282af |
|
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Revise per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41409 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 87503a63d5756f1836f66f4c9723ec0ea30ec3ca |
|
26-Aug-2007 |
Dale Johannesen <dalej@apple.com> |
Add APFloat interface to ConstantFPSDNode. Change
over uses in DAGCombiner. Fix interfaces to work
with APFloats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41407 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 571c4788d5d1527af39f9904e14983d9229c2443 |
|
18-Aug-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fold C ? 0 : 1 to ~C or zext(~C) or trunc(~C) depending the types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41163 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 559742c0eae0a7368eb5f67cde7a3599eaf82ade |
|
26-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix the alias analysis query in DAGCombiner to not add in two
offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40534 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 05d92fe7c4310340335512a3a7de97d3cf07d68d |
|
13-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Don't call SimplifyVBinOp for non-vector operations, following earlier review
feedback. This theoretically makes the common (scalar) case more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39823 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 70fb1aefd58eb78404a2bc86b6960b7b64574082 |
|
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix a bug in the folding of binary operators to undef.
Thanks to Lauro for spotting this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38491 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d595b5f1f051d79764ac8469f02efaae398f115c |
|
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix the folding of undef in several binary operators to recognize
undef in either the left or right operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38489 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d6fd1bc122ba791c698255d8be158b8ec424e248 |
|
10-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Preserve volatililty and alignment information when lowering or
simplifying loads and stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e094f54f4cb6cb899252b66d328aa167013c982d |
|
09-Jul-2007 |
Chris Lattner <sabre@nondot.org> |
Fix this warning:
DAGCombiner.cpp: In member function 'llvm::SDOperand<unnamed>::DAGCombiner::visitOR(llvm::SDNode*)':
DAGCombiner.cpp:1608: warning: passing negative value '-0x00000000000000001' for argument 1 to 'llvm::SDOperand llvm::SelectionDAG::getConstant(uint64_t, llvm::MVT::ValueType, bool)'
oiy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38458 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 613e0d8008b97550ca08c3e816d74c2af2c4fe29 |
|
03-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Fix several over-aggressive folds for undef nodes in dagcombine, to
follow the rules for undef used in instcombine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 23ff1826b9c848c0627747f3de976b6c99c94b4b |
|
02-Jul-2007 |
Dan Gohman <gohman@apple.com> |
Teach GetNegatedExpression to negate 0-B to B in UnsafeFPMath mode, and
visitFSUB to fold 0-B to -B in UnsafeFPMath mode. Also change visitFNEG
to use isNegatibleForFree/GetNegatedExpression instead of doing a subset
of the same thing manually.
This fixes test/CodeGen/X86/negative-sin.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37842 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7f32156bb9c017b71971c52fac892fa7b9b06dd2 |
|
25-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Generalize MVT::ValueType and associated functions to be able to represent
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.
This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ea859be53ca13a1547c4675549946b74dc3c6f41 |
|
22-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b13cdbd8658635e33fc7c5b84dd3f8a053cd907d |
|
21-Jun-2007 |
Evan Cheng <evan.cheng@apple.com> |
Xforms:
(add (select cc, 0, c), x) -> (select cc, x, (add, x, c))
(sub x, (select cc, 0, c)) -> (select cc, x, (sub, x, c))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b5bec2b6f6f4a4da96170d1c258ad424112ad2c5 |
|
19-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37656 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 51eaa86758338d5935c0eff0469c418b1256aba7 |
|
15-Jun-2007 |
Dan Gohman <gohman@apple.com> |
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37579 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3adf951364c30d30b528133df1d4cedf2c2b7046 |
|
25-May-2007 |
Chris Lattner <sabre@nondot.org> |
tighten up recursion depth again
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37330 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c843abe868be76bb18d77ca6bda53dd4d2cf12f7 |
|
24-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix a typo that caused combiner to create mal-formed pre-indexed store where value store is the same as the base pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 501fee71e077aad705ab2ab86741aec15b779174 |
|
23-May-2007 |
Chris Lattner <sabre@nondot.org> |
prevent exponential recursion in isNegatibleForFree
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37310 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fcc4dd91e5d4ba2f8fb8bd9ff24ee0ca0e08ab30 |
|
18-May-2007 |
Dan Gohman <gohman@apple.com> |
Qualify calls to getTypeForValueType with MVT:: too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 98a6c62aff7393683571b05f73f6f22701569c09 |
|
17-May-2007 |
Dale Johannesen <dalej@apple.com> |
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c76d4410ab31723ea1a44821f2daa01a5cfef8eb |
|
16-May-2007 |
Chris Lattner <sabre@nondot.org> |
Use a ptr set instead of a linear search to unique TokenFactor operands.
This fixes PR1423
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 93003b8cf221f084e71e2b4033c41ff2cae6c36d |
|
16-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Bug fix: should check ABI alignment, not pref. alignment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b5bb7ffa9c40d13b21d1a04aec53a4428a6c02a8 |
|
15-May-2007 |
Lauro Ramos Venancio <lauro.venancio@gmail.com> |
Fix an infinite recursion in GetNegatedExpression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37086 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2944652569d1beb538f5a72ab1a4bb581ea5cf91 |
|
15-May-2007 |
Chris Lattner <sabre@nondot.org> |
implement a simple fneg optimization/propagation thing. This compiles:
CodeGen/PowerPC/fneg.ll into:
_t4:
fmul f0, f3, f4
fmadd f1, f1, f2, f0
blr
instead of:
_t4:
fneg f0, f3
fmul f0, f0, f4
fmsub f1, f1, f2, f0
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37054 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2c4f94363a02f482ddcfccc343978595a8a79438 |
|
09-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Can't fold the bit_convert is the store is a truncating store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36962 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c2cd2b29f5b8e2eda88a1edadcd4bc7478a2439c |
|
07-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Forgot a check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 59d5b68dffc4b25290ab21416cd33a7956269389 |
|
07-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Enable a couple of xforms:
- (store (bitconvert v)) -> (store v) if resultant store does not require
higher alignment
- (bitconvert (load v)) -> (load (bitconvert*)v) if resultant load does not
require higher alignment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36908 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a7d4a04d244c5a8c6364af2e39a512ec6b9600a2 |
|
04-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Don't create indexed load / store with zero offset!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36716 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 498f55989a0ef437c098452ff83ccfe7ace2d802 |
|
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
Forgot about chain result; also UNDEF cannot have multiple values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36622 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 45a7ca9b23e7e3447465cdf97788d137aa98cb47 |
|
01-May-2007 |
Evan Cheng <evan.cheng@apple.com> |
* Only turn a load to UNDEF if all of its outputs have no uses (indexed loads
produce two results.)
* Do not touch volatile loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36604 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 95c218a83ecf77590b9dc40c636720772d2b5cd7 |
|
23-Apr-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
PR400 phase 2. Propagate attributed load/store information through DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c67bdc288aac130d88630f7fa95ceca6bcf95077 |
|
21-Apr-2007 |
Reid Spencer <rspencer@reidspencer.com> |
Revert Christopher Lamb's load/store alignment changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36309 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2330e4d4c4f8008d17f5a38ac0d7b04e139d4131 |
|
21-Apr-2007 |
Christopher Lamb <christopher.lamb@gmail.com> |
add support for alignment attributes on load/store instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36301 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 61a4c072b9407983df1a6c965ada57474766b282 |
|
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
allow SRL to simplify its operands, as it doesn't demand all bits as input.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36245 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ec06e9a6707b9b00889e34ebad7cd3f20cb70bb6 |
|
18-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
When replacing a node in SimplifyDemandedBits, if the old node used any
single-use nodes, they will be dead soon. Make sure to remove them before
processing other nodes. This implements CodeGen/X86/shl_elim.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36244 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 95a5e0507e07fa3ef7c61aade9eb0efd1d716a25 |
|
17-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
SIGN_EXTEND_INREG does not demand its top bits. Give SimplifyDemandedBits
a chance to hack on it. This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }
into:
_baz:
slwi r2, r3, 8
srwi r2, r2, 9
extsh r3, r2
blr
instead of:
_baz:
srwi r2, r4, 24
rlwimi r2, r3, 8, 0, 23
srwi r2, r2, 9
extsh r3, r2
blr
This implements CodeGen/PowerPC/sign_ext_inreg1.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36212 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c24bbaddf869aa904300fcb0e8174070bde5c5a2 |
|
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
fix an infinite loop compiling ldecod, notice by JeffC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1eba01e9a04f4a59ddc1cb66dc049a333f256112 |
|
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Fix this harder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35888 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c56a81dff1553536efee17445ef5eab276f22380 |
|
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
don't create shifts by zero, fix some problems with my previous patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35887 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 20a35c3fa57ba9c3184d8848541d9a89b6c2b338 |
|
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Teach the codegen to turn [aez]ext (setcc) -> selectcc of 1/0, which often
allows other simplifications. For example, this compiles:
int isnegative(unsigned int X) {
return !(X < 2147483648U);
}
Into this code:
x86:
movl 4(%esp), %eax
shrl $31, %eax
ret
arm:
mov r0, r0, lsr #31
bx lr
thumb:
lsr r0, r0, #31
bx lr
instead of:
x86:
cmpl $0, 4(%esp)
sets %al
movzbl %al, %eax
ret
arm:
mov r3, #0
cmp r0, #0
movlt r3, #1
mov r0, r3
bx lr
thumb:
mov r2, #1
mov r1, #0
cmp r0, #0
blt LBB1_2 @entry
LBB1_1: @entry
cpy r2, r1
LBB1_2: @entry
cpy r0, r2
bx lr
Testcase here: test/CodeGen/Generic/ispositive.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1982ef20c44d85386a239a1b24eb2bb72cea29ec |
|
11-Apr-2007 |
Chris Lattner <sabre@nondot.org> |
Codegen integer abs more efficiently using the trick from the PPC CWG. This
improves codegen on many architectures. Tests committed as CodeGen/*/iabs.ll
X86 Old: X86 New:
_test: _test:
movl 4(%esp), %ecx movl 4(%esp), %eax
movl %ecx, %eax movl %eax, %ecx
negl %eax sarl $31, %ecx
testl %ecx, %ecx addl %ecx, %eax
cmovns %ecx, %eax xorl %ecx, %eax
ret ret
PPC Old: PPC New:
_test: _test:
cmpwi cr0, r3, -1 srawi r2, r3, 31
neg r2, r3 add r3, r3, r2
bgt cr0, LBB1_2 ; xor r3, r3, r2
LBB1_1: ; blr
mr r3, r2
LBB1_2: ;
blr
ARM Old: ARM New:
_test: _test:
rsb r3, r0, #0 add r3, r0, r0, asr #31
cmp r0, #0 eor r0, r3, r0, asr #31
movge r3, r0 bx lr
mov r0, r3
bx lr
Thumb Old: Thumb New:
_test: _test:
neg r2, r0 asr r2, r0, #31
cmp r0, #0 add r0, r0, r2
bge LBB1_2 eor r0, r2
LBB1_1: @ bx lr
cpy r0, r2
LBB1_2: @
bx lr
Sparc Old: Sparc New:
test: test:
save -96, %o6, %o6 save -96, %o6, %o6
sethi 0, %l0 sra %i0, 31, %l0
sub %l0, %i0, %l0 add %i0, %l0, %l1
subcc %i0, -1, %l1 xor %l1, %l0, %i0
bg .BB1_2 restore %g0, %g0, %g0
nop retl
.BB1_1: nop
or %g0, %l0, %i0
.BB1_2:
restore %g0, %g0, %g0
retl
nop
It also helps alpha/ia64 :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35881 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c9dc11457809b6641de853af2261721a97ad1f26 |
|
02-Apr-2007 |
Scott Michel <scottm@aero.org> |
1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35605 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2041a0ef7544ec5ceece9cabd3963cc887861c1d |
|
30-Mar-2007 |
Dale Johannesen <dalej@apple.com> |
Fix incorrect combination of different loads. Reenable zext-over-truncate
combination.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0b6c76ffe71fc5d16a38b831ef0eddec02ddbe3 |
|
29-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Disable load width reduction xform of variant (zext (truncate load x)) for
big endian targets until llvm-gcc build issue has been resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35449 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 15213b77cfb1f725ebe199b4d68b79407d9e3a84 |
|
26-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
SIGN_EXTEND_INREG requires one extra operand, a ValueType node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dae54ce7fc96be8d8d5d3a5afff856bbdf1e81a9 |
|
24-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Adjust offset to compensate for big endian machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35293 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e177e307fce9cf543b8f0b7a7963cc0328c5f362 |
|
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Make sure SEXTLOAD of the specific type is supported on the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b37b80ce4669c41dcebaeb227b15f552b2c24210 |
|
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Also replace uses of SRL if that's also folded during ReduceLoadWidth().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35286 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b063def9809ed59797fd40a616665ac3e675657 |
|
23-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
A couple of bug fixes for reducing load width xform:
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35274 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c88138fb5e0aa0bcbc95d6c3352e08cfdfcfecef |
|
22-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
More opportunities to reduce load size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35254 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 007b69eeaa59fef76acdf38726cec13862f9dd0c |
|
21-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35239 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 83060c544bde0e2e9798829516040c76c5dd5013 |
|
07-Mar-2007 |
Evan Cheng <evan.cheng@apple.com> |
Avoid combining indexed load further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b654176cb4d58c8784043fbedd4584f3f0eedc07 |
|
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
fold away addc nodes when we know there cannot be a carry-out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34913 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bcf24844508a6acdc6d3078cc4d24978fcd0cca5 |
|
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
generalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34910 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 91153686f04bafe3b10c99edb1735444953f7517 |
|
04-Mar-2007 |
Chris Lattner <sabre@nondot.org> |
canonicalize constants to the RHS of addc/adde. If nothing uses the carry out of
addc, turn it into add.
This allows us to compile:
long long test(long long A, unsigned B) {
return (A + ((long long)B << 32)) & 123;
}
into:
_test:
movl $123, %eax
andl 4(%esp), %eax
xorl %edx, %edx
ret
instead of:
_test:
xorl %edx, %edx
movl %edx, %eax
addl 4(%esp), %eax ;; add of zero
andl $123, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34909 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2255887574250bb0bc577fcfc0c65b3f617e8c3c |
|
26-Feb-2007 |
Chris Lattner <sabre@nondot.org> |
Fold (sext (truncate x)) more aggressively, by avoiding creation of a
sextinreg if not needed. This is useful in two cases: before legalize,
it avoids creating a sextinreg that will be trivially removed. After legalize
if the target doesn't support sextinreg, the trunc/sext would not have been
removed before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34621 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fa1eb27b76ab1e0f78574bf52a432c84a4c1a520 |
|
08-Feb-2007 |
Evan Cheng <evan.cheng@apple.com> |
Move SimplifySetCC to TargetLowering and allow it to be shared with legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34065 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 597a3bde3578f33dc2a038186275b021c79c00b9 |
|
20-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Fix for PR1108: type of insert_vector_elt index operand is PtrVT, not MVT::i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33398 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 42d7ccfd8e672bf3a5d42052f8da50f0d610afb2 |
|
19-Jan-2007 |
Evan Cheng <evan.cheng@apple.com> |
Remove this xform:
(shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
Replace it with:
(add (shl (add x, c1), c2), ) -> (add (add (shl x, c2), c1<<c2), )
This fixes test/CodeGen/ARM/smul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33361 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c4e664bb9d640e7b04f6fce23830dfb808895b31 |
|
16-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Fix PR1114 and CodeGen/Generic/2007-01-15-LoadSelectCycle.ll by being
careful when folding "c ? load p : load q" that C doesn't reach either load.
If so, folding this into load (c ? p : q) will induce a cycle in the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33251 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 938ab02256289a688b1d4f992349f35d44afe4a0 |
|
16-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
add options to view the dags before the first or second pass of dag combine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33249 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ddae4bd68358df7415d532e6930c0ba9c60f6cb5 |
|
09-Jan-2007 |
Chris Lattner <sabre@nondot.org> |
Implement some trivial FP foldings when -enable-unsafe-fp-math is specified.
This implements CodeGen/PowerPC/unsafe-math.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33024 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cd3245ac45c595da96bb768a55cddc356dff55fe |
|
19-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate static ctors from Statistics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32698 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e90460ee9ae9844d4dba9a29c39161ece61e8094 |
|
16-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Cannot combine an indexed load / store any further.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32629 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f6c4ccfaab372081e021c9b02415f3db4190b37d |
|
15-Dec-2006 |
Jim Laskey <jlaskey@mac.com> |
This code was usurping the sextload expand in teh legalizer. Just make
sure the right conditions are checked.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 62be1a71f41813c99f24a136cc31c20fecd9bfb1 |
|
12-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
make this code more aggressive about turning store fpimm into store int imm.
This is not sufficient to fix X86/store-fp-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32465 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 25ece66ff39e9f136a8b48e0fea7aff2332848dc |
|
11-Dec-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't convert store double C, Ptr to store long C, Ptr if i64 is not a legal type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32434 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2cbba8934745fe30662f2d5a59d03545ad5212c5 |
|
11-Dec-2006 |
Nate Begeman <natebegeman@mac.com> |
Move something that should be in the dag combiner from the legalizer to the
dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32431 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 555d8d6f4b0693309cd70efbf51b7abf804df5e4 |
|
07-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2006-12-07-SelectCrash.ll on PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32336 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 832171cb9724d2d31c8dfb73172e2be8f6dd13ee |
|
07-Dec-2006 |
Bill Wendling <isanbard@gmail.com> |
Removing even more <iostream> includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32320 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ac0b6ae358944ae8b2b5a11dc08f52c3ed89f2da |
|
06-Dec-2006 |
Chris Lattner <sabre@nondot.org> |
Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32279 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bc4cf8d5b137d43a1d6fde8238184e47efe162be |
|
27-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
For better or worse, load from i1 is assumed to be zero extended. Do not
form a load from i1 from larger loads that may not be zext'd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31933 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 32ba1aa20468a1906ee69315bda47da6b1b2dc5e |
|
20-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc47021f49851a1b5344b7a0530f7ac50a395216 |
|
16-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix an incorrectly inverted condition.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31773 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 41e53fd39b453be9266e832d7534ae0edeaf334c |
|
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
disallow preinc of a frameindex. This is not profitable and causes 2-addr
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31661 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9f1794ea58fd2acd10b6f39a01ff0fb5a29466cc |
|
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
reduce indentation by using early exits. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31660 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 448f219fedf4f2d119599952b6229f11ed11b035 |
|
11-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
move big chunks of code out-of-line, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31658 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 734c91d2506233d6e5d6531abcfbf6302bff3c8d |
|
10-Nov-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31644 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a7ff64d6080ed2b4bd08b6ee75920e8ad5302143 |
|
10-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31631 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8dc5cad8a255caa4d12d4eba20ad66f3959d161c |
|
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31598 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 144d8f09e139f691cafadbc17873943ba4c465f3 |
|
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d258efaf6eeb63792ba630edc50405fb559337fb |
|
09-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b00dddd1643f207f09de382dd67675f375327bb7 |
|
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Match more post-indexed ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31569 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d6c3422e3126927840683574a658a0deada903f0 |
|
08-Nov-2006 |
Jim Laskey <jlaskey@mac.com> |
Remove redundant <cmath>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 03fa6ea4025d9c658badc5670413e02e4eefc2f2 |
|
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
- When performing pre-/post- indexed load/store transformation, do not worry
about whether the new base ptr would be live below the load/store. Let two
address pass split it back to non-indexed ops.
- Minor tweaks / fixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a4f53ef527e20310555f73e624e7343cda3496cd |
|
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fixed a minor bug preventing some pre-indexed load / store transformation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6c1491dd0610ca826d460ad469af9ade62290708 |
|
08-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Fix a obscure post-indexed load / store dag combine bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31537 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bbd6f6ec1a79c1624fb9cd0a3a1d26155de7c090 |
|
07-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add post-indexed load / store transformations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31498 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ef554d2b12af4ed0a25161fa02222d8f14026e5 |
|
06-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Add comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31473 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d41b30def3181bce4bf87e8bde664d15663165d0 |
|
05-Nov-2006 |
Jeff Cohen <jeffc@jolt-lang.org> |
Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 33dbedcdcb6d4d647b013b1c57ad30bf53b15e1f |
|
05-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added pre-indexed store support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1a854be35295fd1c9c4d0d0f8894e720e22b5e4f |
|
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31413 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b8f4e0aa1719c1d5b93b096a8723ec7f68b4929a |
|
03-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Remove dead variable. Fix 80 column violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7fc033a24d5e82674212379ef4d4d67373a03990 |
|
03-Nov-2006 |
Evan Cheng <evan.cheng@apple.com> |
Added DAG combiner transformation to generate pre-indexed loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31410 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ed469ccd7b028a030b550d84b7336d146f5d8fa |
|
02-Nov-2006 |
Reid Spencer <rspencer@reidspencer.com> |
For PR786:
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07a2709e9de7c619edc26d97b3491c48ccae55ef |
|
18-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Add option for controlling inclusion of global AA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31040 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 096c22ea3d0174d1c75358dbdc49618cf18e9fb7 |
|
18-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Use global info for alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31035 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 50662beab7cc6394a0d6524d16fe7de1d5192196 |
|
17-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/PowerPC/2006-10-17-brcc-miscompile.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31019 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 26f7fa7bba94eb18bf0e43586dd2b596cb58ca80 |
|
17-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Make it simplier to dump DAGs while in DAGCombiner. Remove a nasty optimization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31009 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5d04a1af4fe7600b43812d28757a5d62ba409942 |
|
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make sure operand does have size and element type operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30999 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5956922a2d22dc46523078e35de7dc648a1db172 |
|
17-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Be careful when looking through a vbit_convert. Optimizing this:
(vector_shuffle
(vbitconvert (vbuildvector (copyfromreg v4f32), 1, v4f32), 4, f32),
(undef, undef, undef, undef), (0, 0, 0, 0), 4, f32)
to the
vbitconvert
is a very bad idea.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30989 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c7c3f110eda0ff8040e4bd99e38d3112b910810f |
|
16-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Pass AliasAnalysis thru to DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30984 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d4edf2cf911f1f6543ec6cc89fe7b8bb37ad95b3 |
|
14-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Tidy up after truncstore changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30961 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 30f73e78bd92f9815647ef8e3d29dd355f29432c |
|
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Make sure that the node returned by SimplifySetCC is added to the worklist
so that it can be deleted if unused.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30955 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8ac9d0ebdea49dedca3387fafa4e40e911d3269f |
|
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
fold setcc of a setcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30953 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 51dabfb28375be7bc5848806ae31cd068b6133f8 |
|
14-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
When SimplifySetCC was moved to the DAGCombiner, it was never removed from
SelectionDAG and it has since bitrotted. Remove the copy from SelectionDAG.
Next, remove the constant folding piece of DAGCombiner::SimplifySetCC into
a new FoldSetCC method which can be used by getNode() and SimplifySetCC.
This fixes obscure bugs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30952 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 274062c172bbdf70b8f717875ecf0dabb176c6e5 |
|
14-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Reduce the workload by not adding chain users to work list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30948 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8b2794aeff151be8cdbd44786c1d0f94f8f2e427 |
|
13-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 26d2990e03e60adc66fc5232baac5855fe65c747 |
|
12-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Lower X%C into X/C+stuff. This allows the 'division by a constant' logic to
apply to rems as well as divs. This fixes PR945 and speeds up ReedSolomon
from 14.57s to 10.90s (which is now faster than gcc).
It compiles CodeGen/X86/rem.ll into:
_test1:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
imull %ecx
addl %esi, %edx
movl %edx, %eax
shrl $31, %eax
sarl $7, %edx
addl %eax, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
_test2:
movl 4(%esp), %eax
movl %eax, %ecx
sarl $31, %ecx
shrl $24, %ecx
addl %eax, %ecx
andl $4294967040, %ecx
subl %ecx, %eax
ret
_test3:
subl $4, %esp
movl %esi, (%esp)
movl $2155905153, %ecx
movl 8(%esp), %esi
movl %esi, %eax
mull %ecx
shrl $7, %edx
imull $255, %edx, %eax
subl %eax, %esi
movl %esi, %eax
movl (%esp), %esi
addl $4, %esp
ret
instead of div/idiv instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30920 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3657ffe03733cf7cd9d6ed823ad696edb4547362 |
|
12-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
add a minor dag combine noticed when looking at PR945
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30915 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ad175bd707f268436afa42af8672569b5b92cb2 |
|
12-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
D'oh - need to use the rigth kind of store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30903 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7aed46c25b9c1527b4112e71060f35c4f9c6b024 |
|
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Alias analysis of TRUNCSTORE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30889 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c2b19f3449a48bb4810afbf1a80a46bc87098606 |
|
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Handle aliasing of loadext.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30883 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7ca56aff2257ac0acceb54f3ae7ba65458d46e67 |
|
11-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Fix regression in combiner alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30880 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2e49f090f9656af7d5ed4d5c4e9fa26af59c7233 |
|
11-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Naming consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 466685d41a9ea4905b9486fea38e83802e46f196 |
|
09-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6270f686b323281aa6774d019413a52696337ff2 |
|
09-Oct-2006 |
Chris Lattner <sabre@nondot.org> |
Eliminate more token factors by taking advantage of transitivity:
if TF depends on A and B, and A depends on B, TF just needs to depend on
A. With Jim's alias-analysis stuff enabled, this compiles the testcase in
PR892 into:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %edx, 28(%esp)
movl %eax, 32(%esp)
movl %eax, 24(%esp)
movl %edx, 36(%esp)
movl 52(%esp), %ecx
movl %ecx, 4(%esp)
movl %eax, 8(%esp)
movl %edx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
instead of:
__Z4test3Val:
subl $44, %esp
call L__Z3foov$stub
movl %eax, 24(%esp)
movl %edx, 28(%esp)
movl 24(%esp), %eax
movl %eax, 32(%esp)
movl 28(%esp), %eax
movl %eax, 36(%esp)
movl 32(%esp), %eax
movl 36(%esp), %ecx
movl 52(%esp), %edx
movl %edx, 4(%esp)
movl %eax, 8(%esp)
movl %ecx, 12(%esp)
movl 48(%esp), %eax
movl %eax, (%esp)
call L__Z3bar3ValS_$stub
addl $44, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30821 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7138234bafedf3fc3b9099d3d4bb7c062eb49c6a |
|
08-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Combiner alias analysis passes Multisource (release-asserts.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30818 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 786225adf09e606c795ef68a1f789c12f37869f2 |
|
06-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make use of getStore().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bc588b8bbf30a3349ff7b8fa7a8fa2326b0a5df0 |
|
05-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
Alias analysis code clean ups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30753 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6ff23e5e844b49cee021894f168c739a4af423b5 |
|
04-Oct-2006 |
Jim Laskey <jlaskey@mac.com> |
More extensive alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30721 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c548428c5d7328592f4db6f6cd815af18b3152a3 |
|
04-Oct-2006 |
Evan Cheng <evan.cheng@apple.com> |
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bb1518585b2f2b2f501f70cc45c49a2d2ea57804 |
|
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Load chain check is not needed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30613 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 79597d2af6e1bd80a7768eab3b380d3d71469f5d |
|
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Chain can be any operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30611 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3dd1170616001e38b4dd899d5990734cea339663 |
|
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Wrong size for load
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30610 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 172585b3aac4444e22d250a68e59bc03b8837ef4 |
|
26-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Can't move a load node if it's chain is not used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30609 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 14fbcbfa2b7146569c588c451825206906c3b55a |
|
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Accidental enable of bad code
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30601 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 288af5e740174463c27539e6021369e0e8ca20fa |
|
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Fix chain dropping in load and drop unused stores in ret blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30600 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 279f053eae35729f449f38e08618664b118806bd |
|
25-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Core antialiasing for load and store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30597 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2adffa1f6648c2bb1d96f22a4bf97964b7e4128f |
|
21-Sep-2006 |
Evan Cheng <evan.cheng@apple.com> |
Make it work for DAG combine of multi-value nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30573 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 516b0eacff5aedf26e146812d1fbcd5f3ceedca8 |
|
21-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
core corrections
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30570 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d1aed7aaf7047873b8878502859905159eaf5362 |
|
21-Sep-2006 |
Jim Laskey <jlaskey@mac.com> |
Basic "in frame" alias analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30568 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0e4b922680f55a8e28fc2c3db0b80a1c78d24918 |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
fold (aext (and (trunc x), cst)) -> (and x, cst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30561 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bf3708794f4dca6e959247a3fe7cbe0cb5348eeb |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Check the right value type. This fixes 186.crafty on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30560 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 111c22824115ed77a8f14e555c10880d07a45eb4 |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
int %test(ulong *%tmp) {
%tmp = load ulong* %tmp ; <ulong> [#uses=1]
%tmp.mask = shr ulong %tmp, ubyte 50 ; <ulong> [#uses=1]
%tmp.mask = cast ulong %tmp.mask to ubyte
%tmp2 = and ubyte %tmp.mask, 3 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp2 to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
andl $3, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
# TRUNCATE movb %al, %al
andb $3, %al
movzbl %al, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30558 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6007b84a5bdcba9ee012418fedd32c236aad2cf6 |
|
21-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when
the src/dst are not the same size. This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30557 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e3152e54b5e92ef4bc29b3d8c5923893d31617ab |
|
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
int test3(int a, int b) { return (a < 0) ? a : 0; }
to:
_test3:
srawi r2, r3, 31
and r3, r2, r3
blr
instead of:
_test3:
cmpwi cr0, r3, 1
li r2, 0
blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
mr r3, r2
LBB2_2: ;entry
blr
This implements: PowerPC/select_lt0.ll:seli32_a_a
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30517 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 84750587bf859a048580f7f13b1b2710d0b681fb |
|
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fold the full generality of (any_extend (truncate x))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30514 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5f42a240ba5c6199d2d78fb1238938da2c073755 |
|
20-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Two things:
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
ignoring the result. This allows us to compile:
bool %test(ulong %x) {
%tmp = setlt ulong %x, 4294967296
ret bool %tmp
}
to:
_test:
cntlzw r2, r3
cmplwi cr0, r3, 1
srwi r2, r2, 5
li r3, 0
beq cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
instead of:
_test:
addi r2, r3, -1
cntlzw r2, r2
cntlzw r3, r3
srwi r2, r2, 5
cmplwi cr0, r2, 0
srwi r2, r3, 5
li r3, 0
bne cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
This isn't wonderful, but it's an improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30513 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1ec72738ac685543a02068559877ec713b36a463 |
|
14-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible.
This implements CodeGen/X86/and-or-fold.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30379 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 516b962b5a043e4773f0655d0790e58780e3a345 |
|
14-Sep-2006 |
Chris Lattner <sabre@nondot.org> |
Split rotate matching code out to its own function. Make it stronger, by
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30376 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dfcfacb0cba97e1ac7e1f619b091d4383218fbd0 |
|
31-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
DAG combiner fix for rotates. Previously the outer-most condition checks
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29997 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1efba0ecb4d0b3807c48e6e0f74e3ce5c9fad809 |
|
29-Aug-2006 |
Evan Cheng <evan.cheng@apple.com> |
Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29951 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a4f0b3a084d120cfc5b5bb06f64b222f5cb72740 |
|
27-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29911 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3577e38c2b34c7978b8a1b6047eed3e421559d28 |
|
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
change internal impl of dag combiner so that calls to CombineTo never have to
make a temporary vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29618 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b9ea4a39b8192bd13d69d5e15d1e6a2290d24e80 |
|
11-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Change one ReplaceAllUsesWith method to take an array of operands to replace
instead of a vector of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29616 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bd564bfc63163e31f320c3da9749db70992dc35e |
|
08-Aug-2006 |
Chris Lattner <sabre@nondot.org> |
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9160a6a18fdd091717cc3375bbac604d1949a65c |
|
25-Jul-2006 |
Reid Spencer <rspencer@reidspencer.com> |
Initialize some variables the compiler warns about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29277 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 917ec983df36c642492cdc786dee531fbdd6a775 |
|
21-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
If a shuffle is a splat, check if the argument is a build_vector with all elements being the same. If so, return the argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29242 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e7bec0dbb50235ec60f78f1f7b3f6d2f6bb5cd91 |
|
21-Jul-2006 |
Evan Cheng <evan.cheng@apple.com> |
If a shuffle is unary, i.e. one of the vector argument is not needed, turn the
operand into a undef and adjust mask accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29232 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ae6153f943970f3899ace54287ef4421879813e6 |
|
20-Jul-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
80 cols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29221 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ed41f1bb1981a98eea63f00c5988cf62bbdd7c59 |
|
20-Jul-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Reduce number of exported symbols
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29220 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 360e8200ec544a3c877ff74b48f445140ac9bbd6 |
|
28-Jun-2006 |
Chris Lattner <sabre@nondot.org> |
Mark these two classes as hidden, shrinking libllbmgcc.dylib by 25K
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28970 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 232c910b8acd81cbf47fb18595ce557789c2217c |
|
12-Jun-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Start on my todo list
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7b336a87466da67cbd528d124e38c12390707a24 |
|
31-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
visitVBinOp: Can't fold divide by zero!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28584 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 729c6d1da87ad5b3bf849c4102b255657f67276c |
|
27-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a nasty dag combiner bug that caused nondeterminstic crashes (MY FAVORITE!):
SimplifySelectOps would eliminate a Select, delete it, then return true.
The clients would see that it did something and return null.
The top level would see a null return, and decide that nothing happened,
proceeding to process the node in other ways: boom.
The fix is simple: clients of SimplifySelectOps should return the select
node itself.
In order to catch really obnoxious boogs like this in the future, add an
assert that nodes are not deleted. We do this by checking for a sentry node
type that the SDNode dtor sets when a node is destroyed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28514 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| dae9cbe8d4fcd8f182a99403d67cae906bdb3175 |
|
16-May-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
Move this code to a common place
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5eed34d208159e02949097ec91d98d5d9eb30e27 |
|
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Comment out dead variables
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28252 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 21a57dc75172aa964c51d386b2cdd0ad3be7792f |
|
12-May-2006 |
Chris Lattner <sabre@nondot.org> |
Two simplifications for token factor nodes: simplify tf(x,x) -> x.
simplify tf(x,y,y,z) -> tf(x,y,z).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 60e8c71c9f63959890ecabb70c6e2cde2f947224 |
|
09-May-2006 |
Evan Cheng <evan.cheng@apple.com> |
Debugging info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28200 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4b37e87ab9e7bfad8b87115278ca589f8d49ba26 |
|
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Make the case I just checked in stronger. Now we compile this:
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
to:
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test2:
add r2, r3, r4
extsh r2, r2
srwi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28175 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| eaeda56649052fc75e527b37089d6d67c4a5976d |
|
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement and_sext.ll:test3, generating:
_test4:
srawi r3, r3, 16
blr
instead of:
_test4:
srwi r2, r3, 16
extsh r3, r2
blr
for:
short test4(unsigned X) {
return (X >> 16);
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28174 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a850446a0be73ceb9ac1b312bffb1e06d7e40d99 |
|
08-May-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this:
short test4(unsigned X) {
return (X >> 16);
}
to:
_test4:
movl 4(%esp), %eax
sarl $16, %eax
ret
instead of:
_test4:
movl $-65536, %eax
andl 4(%esp), %eax
sarl $16, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28171 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5c742681edc9d0e8be16f7518af5429d2b643078 |
|
08-May-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix PR772
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28161 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 310b578023bc6c91f5961582ec8de49c9268f711 |
|
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
Simplify some code, add a couple minor missed folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28152 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 541a24f7af685610838b5a89b2feffc2285937db |
|
07-May-2006 |
Chris Lattner <sabre@nondot.org> |
remove cases handled elsewhere
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28150 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ee4ea923589a2556ff85edbaf444d9575050613a |
|
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Use the new TargetLowering::ComputeNumSignBits method to eliminate
sign_extend_inreg operations. Though ComputeNumSignBits is still rudimentary,
this is enough to compile this:
short test(short X, short x) {
int Y = X+x;
return (Y >> 1);
}
short test2(short X, short x) {
int Y = (short)(X+x);
return Y >> 1;
}
into:
_test:
add r2, r3, r4
srawi r3, r2, 1
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r3, r2, 1
blr
instead of:
_test:
add r2, r3, r4
srawi r2, r2, 1
extsh r3, r2
blr
_test2:
add r2, r3, r4
extsh r2, r2
srawi r2, r2, 1
extsh r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28146 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b72773bb88859633c62bc4938d05aafedb1442f1 |
|
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold trunc(any_ext). This gives stuff like:
27,28c27
< movzwl %di, %edi
< movl %edi, %ebx
---
> movw %di, %bx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28137 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 06afe070371c5bdcdc76d90d9e13f8532d9f95aa |
|
06-May-2006 |
Chris Lattner <sabre@nondot.org> |
Shrink shifts when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28136 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e564dbb51ca1ad9ff6d88ae6120782a48bd040c2 |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold (fpext (load x)) -> (extload x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28130 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0d8dae749c116a4168c3b4312f1bc0352d22c9db |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Fold some common code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28124 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 540121f1ec6495445aab87ff464b170c0b762d05 |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement:
// fold (and (sext x), (sext y)) -> (sext (and x, y))
// fold (or (sext x), (sext y)) -> (sext (or x, y))
// fold (xor (sext x), (sext y)) -> (sext (xor x, y))
// fold (and (aext x), (aext y)) -> (aext (and x, y))
// fold (or (aext x), (aext y)) -> (aext (or x, y))
// fold (xor (aext x), (aext y)) -> (aext (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28123 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a3dc3f692c2967dc9cfac6344c7216f62098feda |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Pull and through and/or/xor. This compiles some bitfield code to:
mov EAX, DWORD PTR [ESP + 4]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
or EDX, ECX
and EDX, -2147483648
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
ret
instead of:
sub ESP, 4
mov DWORD PTR [ESP], ESI
mov EAX, DWORD PTR [ESP + 8]
mov ECX, DWORD PTR [EAX]
mov EDX, ECX
add EDX, EDX
mov ESI, ECX
and ESI, -2147483648
and EDX, -2147483648
or EDX, ESI
and ECX, 2147483647
or EDX, ECX
mov DWORD PTR [EAX], EDX
mov ESI, DWORD PTR [ESP]
add ESP, 4
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28122 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5ffc066912ce4f5c32741c5e56dc28a8fe1dc050 |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Implement a variety of simplifications for ANY_EXTEND.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 35e5c14b80a732c7d061a13a3717362e936852b1 |
|
05-May-2006 |
Chris Lattner <sabre@nondot.org> |
Factor some code, add these transformations:
// fold (and (trunc x), (trunc y)) -> (trunc (and x, y))
// fold (or (trunc x), (trunc y)) -> (trunc (or x, y))
// fold (xor (trunc x), (trunc y)) -> (trunc (xor x, y))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 25c344a7589054bd3f6ad31c777a02fb4916c31f |
|
29-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Remove a bogus transformation. This fixes SingleSource/UnitTests/2006-01-23-InitializedBitField.c
with some changes I have to the new CFE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28022 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ef027f940cca409d9e923be3e30afa3f4f0af41a |
|
21-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a couple more memory issues
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27930 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fedced7bc3702f2db5c5d78531b7f58e0f6c9c50 |
|
21-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a really subtle and obnoxious memory bug that caused issues with an
llvm-gcc4 boostrap. Whenever a node is deleted by the dag combiner, it
*must* be returned by the visit function, or the dag combiner will not
know that the node has been processed (and will, e.g., send it to the
target dag combine xforms).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27922 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 44f1f09b4e08bf6f94269c1fe4363b99ef17af50 |
|
20-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
Turn a VAND into a VECTOR_SHUFFLE is applicable.
DAG combiner can turn a VAND V, <-1, 0, -1, -1>, i.e. vector clear elements,
into a vector shuffle with a zero vector. It only does so when TLI tells it
the xform is profitable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27874 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 17614ea63db9189050b6ca0310f535d12bdedb81 |
|
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Canonicalize vvector_shuffle(x,x) -> vvector_shuffle(x,undef) to enable patterns
to match again :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27533 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3e104b11168da4692b69cc6b236c1da22adff959 |
|
08-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Codegen shufflevector as VVECTOR_SHUFFLE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27529 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c04766a22832bd044bf3e1c3740415165b9400d6 |
|
07-Apr-2006 |
Evan Cheng <evan.cheng@apple.com> |
1. If both vector operands of a vector_shuffle are undef, turn it into an undef.
2. A shuffle mask element can also be an undef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27472 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e44be60ee91b65df8dcf13cca15563ab80b236c4 |
|
04-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Do not create ZEXTLOAD's unless we are before legalize or the operation is
legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27402 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 97c2073270e59efd966e9fe1c9b6697cc863d680 |
|
03-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a missing check, this fixes UnitTests/Vector/sumarray.c
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27375 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a4c5d8c6b4e91b880fcd1b8b293f330e3aa198a3 |
|
03-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a missing check, which broke a bunch of vector tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27374 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cf4fb61f6c1daa3b4446ad0444b63770f3026d2d |
|
03-Apr-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
back this out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27367 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 50a0d426e85b4e27766a99279d2e61f622525f94 |
|
02-Apr-2006 |
Andrew Lenharth <andrewl@lenharth.org> |
This should be a win of every arch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27364 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 350bec0fb9680b849942052b25f838d8ad10c743 |
|
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Add a little dag combine to compile this:
int %AreSecondAndThirdElementsBothNegative(<4 x float>* %in) {
entry:
%tmp1 = load <4 x float>* %in ; <<4 x float>> [#uses=1]
%tmp = tail call int %llvm.ppc.altivec.vcmpgefp.p( int 1, <4 x float> < float 0x7FF8000000000000, float 0.000000e+00, float 0.000000e+00, float 0x7FF8000000000000 >, <4 x float> %tmp1 ) ; <int> [#uses=1]
%tmp = seteq int %tmp, 0 ; <bool> [#uses=1]
%tmp3 = cast bool %tmp to int ; <int> [#uses=1]
ret int %tmp3
}
into this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
mtspr 256, r2
blr
instead of this:
_AreSecondAndThirdElementsBothNegative:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI1_0)
lis r5, ha16(LCPI1_0)
lvx v0, 0, r3
lvx v1, r5, r4
vcmpgefp. v0, v1, v0
mfcr r3, 2
rlwinm r3, r3, 27, 31, 31
xori r3, r3, 1
cntlzw r3, r3
srwi r3, r3, 5
mtspr 256, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27356 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| edab1b91336af19e815e780f2e28eb3d2013ddf4 |
|
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Constant fold all of the vector binops. This allows us to compile this:
"vector unsigned char mergeLowHigh = (vector unsigned char)
( 8, 9, 10, 11, 16, 17, 18, 19, 12, 13, 14, 15, 20, 21, 22, 23 );
vector unsigned char mergeHighLow = vec_xor( mergeLowHigh, vec_splat_u8(8));"
aka:
void %test2(<16 x sbyte>* %P) {
store <16 x sbyte> cast (<4 x int> xor (<4 x int> cast (<16 x ubyte> < ubyte 8, ubyte 9, ubyte 10, ubyte 11, ubyte 16, ubyte 17, ubyte 18, ubyte 19, ubyte 12, ubyte 13, ubyte 14, ubyte 15, ubyte 20, ubyte 21, ubyte 22, ubyte 23 > to <4 x int>), <4 x int> cast (<16 x sbyte> < sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8, sbyte 8 > to <4 x int>)) to <16 x sbyte>), <16 x sbyte> * %P
ret void
}
into this:
_test2:
mfspr r2, 256
oris r4, r2, 32768
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
lvx v0, r5, r4
stvx v0, 0, r3
mtspr 256, r2
blr
instead of this:
_test2:
mfspr r2, 256
oris r4, r2, 49152
mtspr 256, r4
li r4, lo16(LCPI2_0)
lis r5, ha16(LCPI2_0)
vspltisb v0, 8
lvx v1, r5, r4
vxor v0, v1, v0
stvx v0, 0, r3
mtspr 256, r2
blr
... which occurs here:
http://developer.apple.com/hardware/ve/calcspeed.html
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27343 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6258fb2592d97e1c8e58d4fadf6c47ddeb23b455 |
|
02-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Implement constant folding of bit_convert of arbitrary constant vbuild_vector nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27341 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f1d0c623c6d9ce3e5d1b30ba3e76e122adc6720e |
|
01-Apr-2006 |
Chris Lattner <sabre@nondot.org> |
Delete identity shuffles, implementing CodeGen/Generic/vector-identity-shuffle.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27317 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 29cd7db31097a1ae70a88d7f721a46f207363b46 |
|
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Remove dead *extloads. This allows us to codegen vector.ll:test_extract_elt
to:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 12, r32
;;
ldfs f8 = [r8]
mov ar.pfs = r3
br.ret.sptk.many rp
instead of:
test_extract_elt:
alloc r3 = ar.pfs,0,1,0,0
adds r8 = 28, r32
adds r9 = 24, r32
adds r10 = 20, r32
adds r11 = 16, r32
;;
ldfs f6 = [r8]
;;
ldfs f6 = [r9]
adds r8 = 12, r32
adds r9 = 8, r32
adds r14 = 4, r32
;;
ldfs f6 = [r10]
;;
ldfs f6 = [r11]
ldfs f8 = [r8]
;;
ldfs f6 = [r9]
;;
ldfs f6 = [r14]
;;
ldfs f6 = [r32]
mov ar.pfs = r3
br.ret.sptk.many rp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27297 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e4b953939c2848cd71ab4aeaecaa150ba1ae7fd9 |
|
31-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Delete dead loads in the dag. This allows us to compile
vector.ll:test_extract_elt2 into:
_test_extract_elt2:
lfd f1, 32(r3)
blr
instead of:
_test_extract_elt2:
lfd f0, 56(r3)
lfd f0, 48(r3)
lfd f0, 40(r3)
lfd f1, 32(r3)
lfd f0, 24(r3)
lfd f0, 16(r3)
lfd f0, 8(r3)
lfd f0, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27296 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cef896e50cf58e6b3dc3cd431693d78b8ebfa079 |
|
29-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
When building a VVECTOR_SHUFFLE node from extract_element operations, make
sure to build it as SHUFFLE(X, undef, mask), not SHUFFLE(X, X, mask).
The later is not canonical form, and prevents the PPC splat pattern from
matching. For a particular splat, we go from generating this:
li r10, lo16(LCPI1_0)
lis r11, ha16(LCPI1_0)
lvx v3, r11, r10
vperm v3, v2, v2, v3
to generating:
vspltw v3, v2, 3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27236 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 66445d3e0a3c6d02585a3c18ec295451a80d427c |
|
29-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Canonicalize VECTOR_SHUFFLE(X, X, Y) -> VECTOR_SHUFFLE(X,undef,Y')
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27235 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d7648c89343c62e154a7d374485dc93a9dc49d54 |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Turn a series of extract_element's feeding a build_vector into a
vector_shuffle node. For this:
void test(__m128 *res, __m128 *A, __m128 *B) {
*res = _mm_unpacklo_ps(*A, *B);
}
we now produce this code:
_test:
movl 8(%esp), %eax
movaps (%eax), %xmm0
movl 12(%esp), %eax
unpcklps (%eax), %xmm0
movl 4(%esp), %eax
movaps %xmm0, (%eax)
ret
instead of this:
_test:
subl $76, %esp
movl 88(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, (%esp)
movaps %xmm0, 32(%esp)
movss 4(%esp), %xmm0
movss 32(%esp), %xmm1
unpcklps %xmm0, %xmm1
movl 84(%esp), %eax
movaps (%eax), %xmm0
movaps %xmm0, 16(%esp)
movaps %xmm0, 48(%esp)
movss 20(%esp), %xmm0
movss 48(%esp), %xmm2
unpcklps %xmm0, %xmm2
unpcklps %xmm1, %xmm2
movl 80(%esp), %eax
movaps %xmm2, (%eax)
addl $76, %esp
ret
GCC produces this (with -fomit-frame-pointer):
_test:
subl $12, %esp
movl 20(%esp), %eax
movaps (%eax), %xmm0
movl 24(%esp), %eax
unpcklps (%eax), %xmm0
movl 16(%esp), %eax
movaps %xmm0, (%eax)
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27233 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4fbdd59f4ff40122ddf5a7adb40e1344da4f5f2b |
|
28-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't crash on X^X if X is a vector. Instead, produce a vector of zeros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27229 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6ea2dee6f675bd5eb32de08b4eecfe21ebe107a0 |
|
25-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Don't call SimplifyDemandedBits on vectors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27128 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ca2424423416032dc95dae4c106a5cf99795e589 |
|
19-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fold insertelement(buildvector) -> buildvector if the inserted element # is
a constant. This implements test_constant_insert in CodeGen/Generic/vector.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26851 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 81e8097377529dc3b666f33bb525c49cfbac3f51 |
|
17-Mar-2006 |
Nate Begeman <natebegeman@mac.com> |
Remove BRTWOWAY*
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26814 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ac0f8f29290ff018d51ce58bd11be13ab148e698 |
|
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
make sure dead token factor nodes are removed by the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26731 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 947c28935d179f486c8137323361923ba4f23886 |
|
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fold X+Y -> X|Y when safe. This implements:
Regression/CodeGen/PowerPC/and_add.ll
a case that occurs with dynamic allocas of constant size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26727 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 79dbea5ab4c73243a4f6a09fa1637a618263493e |
|
13-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
add a couple of missing folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26724 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cac7059d0f8e6e1be5d4001eb942e23780af2300 |
|
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Reinstate this now that the offending opposite xform has been removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26548 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9176b0169c8650fa6fb1d0464256d7c3e8ecf115 |
|
05-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Back out fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2) for now.
It's causing an infinite loop compiling ldecod on x86 / Darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26544 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 12d830346b78b8e92dc0346e710f261cc680480f |
|
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add some simple copysign folds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26543 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a1deca3cd62963c1f5a7c48e7e5e67fec9beadaa |
|
05-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
fold (mul (add x, c1), c2) -> (add (mul x, c2), c1*c2)
fold (shl (add x, c1), c2) -> (add (shl x, c2), c1<<c2)
This allows us to compile CodeGen/PowerPC/addi-reassoc.ll into:
_test1:
slwi r2, r4, 4
add r2, r2, r3
lwz r3, 36(r2)
blr
_test2:
mulli r2, r4, 5
add r2, r2, r3
lbz r2, 11(r2)
extsb r3, r2
blr
instead of:
_test1:
addi r2, r4, 2
slwi r2, r2, 4
add r2, r3, r2
lwz r3, 4(r2)
blr
_test2:
addi r2, r4, 2
mulli r2, r2, 5
add r2, r3, r2
lbz r2, 1(r2)
extsb r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26535 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1ec05d1bb4e8903321caf29f57a805952f5b8b86 |
|
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix CodeGen/Generic/2006-03-01-dagcombineinfloop.ll, an infinite loop
in the dag combiner on 176.gcc on x86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26459 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b2742f4a2693510aa77d69f6e91fd8983e07680f |
|
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a typo evan noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26454 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2466472a2b6a2992a65efdc4634bcee08d23d8a8 |
|
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add support for target-specific dag combines
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26443 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5750df9d695bf5aea6d672d00fdfb4243984fd38 |
|
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Add a new AddToWorkList method, start using it
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26441 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 0b1a85f110c4ed50f7adf181490d9f6a1b4f55a5 |
|
01-Mar-2006 |
Chris Lattner <sabre@nondot.org> |
Pull shifts by a constant through multiplies (a form of reassociation),
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 860771d2d86243b65ec16fac6cc57b285078f138 |
|
01-Mar-2006 |
Evan Cheng <evan.cheng@apple.com> |
Vector ops lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 35a9f5a24114f65002504b2276ee1b553f282058 |
|
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Compile:
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }
to:
_foo4:
lbz r3,1(r3)
blr
_foo5:
lbz r3,1(r3)
blr
not:
_foo4:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
_foo5:
lhz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 15045b6973bfe7a5adda8c0fb53bb1b0cdc06b8d |
|
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fold "and (LOAD P), 255" -> zextload. This allows us to compile:
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
lbz r3, 3(r3)
blr
instead of:
_foo3:
lwz r2, 0(r3)
rlwinm r3, r2, 0, 24, 31
blr
and:
unsigned short foo2(float a) { return a; }
as:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lhz r3, -2(r1)
blr
instead of:
_foo2:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 71d9ebcbc1c74848372e11c96989ede974b2366d |
|
28-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
fold (sra (sra x, c1), c2) -> (sra x, c1+c2)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2d2536c9d7669c1ba809664dd164be50222183dd |
|
27-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
remove some completed notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7d20d39009f89e7c2ab905d0b5dc3af059e7e886 |
|
20-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a problem Nate and Duraid reported where simplifying nodes can cause
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26291 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b0d04a7deaf1ffc78f2eb85295af987a54223c00 |
|
18-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add checks to make sure we don't create bogus extend nodes, and fix a bug
where we were doing exactly that which was causing failures on x86 and
alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26284 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 012f241987a017ea74d34d4c126997f84902ef61 |
|
17-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
exactly the API we wanted to call into. This fixes the crash on crafty last
night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26269 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fb7217bea3fe0472850798a0554c9b45689c4fbd |
|
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Clean up DemandedBitsAreZero interface
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cd6a6ed0a9d4b63535b430bf4c5c4396cd9d4e86 |
|
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Don't expand sdiv by power of two before legalize, since it will likely
generate illegal nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26261 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 551bf3f80058a026b6a128dffd5530019e1df1b9 |
|
17-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 368e18d56a87308045d341e85584597bfe7426e9 |
|
16-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 8f4880be6675dbf1840446bc7a335f71ff557154 |
|
16-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
by Nate, I'm just committing it for him.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26230 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d0e58e36a9857c45ecdc910ec8db04c21e143db5 |
|
15-Feb-2006 |
Jim Laskey <jlaskey@mac.com> |
Should not combine ISD::LOCATIONs until we have scheme to remove from
MachineDebugInfo tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26216 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3391bcd434c644747f6340e8077b3dac858b9d5d |
|
08-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Compile this:
xori r6, r2, 1
rlwinm r6, r6, 0, 31, 31
cmpwi cr0, r6, 0
bne cr0, LBB1_3 ; endif
to this:
rlwinm r6, r2, 0, 31, 31
cmpwi cr0, r6, 0
beq cr0, LBB1_3 ; endif
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26047 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| be71442292e89b2e0cca61a8ecca9997df319d93 |
|
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Back out previous commit, it isn't safe.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26006 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bab9239d0572d35a08423782eb964e532c3c6524 |
|
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
fold c1 << (x + c2) into (c1 << c2) << x. fix a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26005 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c031e33b68168ee776b825b01eca83c56b2b2996 |
|
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Handle urem by shifted powers of 2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26001 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fb5e4bdded9c204c5f50c4770431544c074ef7bb |
|
05-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
handle combining A / (B << N) into A >>u (log2(B)+N) when B is a power of 2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26000 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| de99629e2ae8cd7cc731328d2ad6ed6b8e759f2c |
|
03-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add a framework for eliminating instructions that produces undemanded bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25945 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cd4d58cef1b932fe6ae66fdccdb2f69e80bbb734 |
|
03-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Add common code for reassociating ops in the dag combiner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25934 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3603cd62aed5cc54ec626848d0195eed2958312a |
|
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
Turn any_extend nodes into zero_extend nodes when it allows us to remove an
and instruction. This allows us to compile stuff like this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
to this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
ret
instead of this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
This occurs quite a bit with the X86 backend. For example, 25 times in
lambda, 30 times in 177.mesa, 14 times in galgel, 70 times in fma3d,
25 times in vpr, several hundred times in gcc, ~45 times in crafty,
~60 times in parser, ~140 times in eon, 110 times in perlbmk, 55 on gap,
16 times on bzip2, 14 times on twolf, and 1-2 times in many other SPEC2K
programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25901 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b3ddfc42af8d6f5c4b168797ccbcb6b55cb9397f |
|
02-Feb-2006 |
Chris Lattner <sabre@nondot.org> |
add two dag combines:
(C1-X) == C2 --> X == C1-C2
(X+C1) == C2 --> X == C2-C1
This allows us to compile this:
bool %X(int %X) {
%Y = add int %X, 14
%Z = setne int %Y, 12345
ret bool %Z
}
into this:
_X:
cmpl $12331, 4(%esp)
setne %al
movzbl %al, %eax
andl $1, %eax
ret
not this:
_X:
movl $14, %eax
addl 4(%esp), %eax
cmpl $12345, %eax
setne %al
movzbl %al, %eax
andl $1, %eax
ret
Testcase here: Regression/CodeGen/X86/compare-add.ll
nukage of the and coming up next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25898 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 750ac1bdfa6f09bddfd9efce1d6360dde8fa74c0 |
|
01-Feb-2006 |
Nate Begeman <natebegeman@mac.com> |
Fix some of the stuff in the PPC README file, and clean up legalization
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c6fd6cd65c88ef1f11da43c11be0152cb69013a7 |
|
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5c413bc451f6e889639864fda6157be6a5f4fd7c |
|
30-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode,
to permit recursion
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25799 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 03d5e877fd30d7f18546e6df8fd60837081ad8cc |
|
29-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
eliminate uses of SelectionDAG::getBR2Way_CC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25767 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 61af66e687561a821181f742677c38a933a6fea0 |
|
28-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Add a missing case to the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25723 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2c2c6c61f100bc7c3df873b11203fcea1b5e18fe |
|
23-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add explicit #includes of <iostream>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a148d9811a37a320adbf512276abcf42cc36d04c |
|
18-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Get rid of code in the DAGCombiner that is duplicated in SelectionDAG.cpp
Now all constant folding in the code generator is in one place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25426 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4090aee72e0f29976c9b1e7a0e0c7b4456f645b5 |
|
18-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Fix a backwards conditional that caused an inf loop in some cases. This
fixes: test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25419 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bf40c4bfe1607980ea570ac69bf134cc4e58d0ca |
|
15-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Disable two transformations that contribute to bus errors on SparcV8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25339 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4aafb4ff92ee6b5372aaaa51845445f2418a7fd1 |
|
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Add a simple missing fold to produce this:
subfic r3, r2, 33
instead of this:
subfic r2, r2, 32
addi r3, r2, 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25255 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| af551bcf6be6c2c44b1b5dac5573c58bdc3da972 |
|
12-Jan-2006 |
Chris Lattner <sabre@nondot.org> |
Don't create rotate instructions in unsupported types, because we don't have
promote/expand code yet. This fixes the 177.mesa failure on PPC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25250 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 35ef913ec21de0f4f1b39c811b4335438717a9b8 |
|
11-Jan-2006 |
Nate Begeman <natebegeman@mac.com> |
Add bswap, rotl, and rotr nodes
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25222 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6907708c23303703c6f89e055d1c204c5abb27a5 |
|
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
Revert the previous check-in. Leave shl x, 1 along for target to deal with.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25121 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| da95a84a11e684072ea25fbb9830e769039fd985 |
|
06-Jan-2006 |
Evan Cheng <evan.cheng@apple.com> |
fold (shl x, 1) -> (add x, x)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| abf6d1784b2d4bbcb7d20ab64881f77d755059f6 |
|
05-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Added initial support for DEBUG_LABEL allowing debug specific labels to be
inserted in the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25104 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5bf6f25b4a888afaf3e37acd18c43186d45cac2e |
|
04-Jan-2006 |
Jim Laskey <jlaskey@mac.com> |
Add unique id to debug location for debug label use (work in progress.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25096 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d6e8d4134022a3b451439a631b41744e9e07c034 |
|
23-Dec-2005 |
Jim Laskey <jlaskey@mac.com> |
Remove redundant debug locations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24995 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c33baaafb6fb59eb4077f7b2cadff6cf743ce605 |
|
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Simplify store(bitconv(x)) to store(x). This allows us to compile this:
void bar(double Y, double *X) {
*X = Y;
}
to this:
bar:
save -96, %o6, %o6
st %i1, [%i2+4]
st %i0, [%i2]
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i2]
restore %g0, %g0, %g0
retl
nop
on sparcv8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24983 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5710410deaceab136878e73dc48b6d468cff9701 |
|
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
fold (conv (load x)) -> (load (conv*)x).
This allows us to compile this:
void foo(double);
void bar(double *X) { foo(*X); }
To this:
bar:
save -96, %o6, %o6
ld [%i0+4], %o1
ld [%i0], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -104, %o6, %o6
ldd [%i0], %f0
std %f0, [%i6+-8]
ld [%i6+-4], %o1
ld [%i6+-8], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on SparcV8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24982 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c8547d856d3459a61ca9e35b5342288fe626c295 |
|
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fold bitconv(bitconv(x)) -> x. We now compile this:
void foo(double);
void bar(double X) { foo(X); }
to this:
bar:
save -96, %o6, %o6
or %g0, %i0, %o0
or %g0, %i1, %o1
call foo
nop
restore %g0, %g0, %g0
retl
nop
instead of this:
bar:
save -112, %o6, %o6
st %i1, [%i6+-4]
st %i0, [%i6+-8]
ldd [%i6+-8], %f0
std %f0, [%i6+-16]
ld [%i6+-12], %o1
ld [%i6+-16], %o0
call foo
nop
restore %g0, %g0, %g0
retl
nop
on V8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24981 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 94683777aee436a0e5f12e08a4b3827a11265fb2 |
|
23-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
constant fold bits_convert in getNode and in the dag combiner for fp<->int
conversions. This allows V8 to compiles this:
void %test() {
call float %test2( float 1.000000e+00, float 2.000000e+00, double 3.000000e+00, double* null )
ret void
}
into:
test:
save -96, %o6, %o6
sethi 0, %o3
sethi 1049088, %o2
sethi 1048576, %o1
sethi 1040384, %o0
or %g0, %o3, %o4
call test2
nop
restore %g0, %g0, %g0
retl
nop
instead of:
test:
save -112, %o6, %o6
sethi 0, %o4
sethi 1049088, %l0
st %o4, [%i6+-12]
st %l0, [%i6+-16]
ld [%i6+-12], %o3
ld [%i6+-16], %o2
sethi 1048576, %o1
sethi 1040384, %o0
call test2
nop
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3a03ebb37747c2b3fd9b4f8b44f1124f53727894 |
|
22-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
* Fix a GlobalAddress lowering bug.
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d0f6d18aa896a6c37f26e2d947d24d8ec95f1164 |
|
15-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support
if after legalize. This fixes IA64 failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24725 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d4771840fd59654becb989675fbc0d0dc54c6dd4 |
|
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
When folding loads into ops, immediately replace uses of the op with the
load. This reduces number of worklist iterations and avoid missing optimizations
depending on folding of things into sext_inreg nodes (which aren't supported by
all targets).
Tested by Regression/CodeGen/X86/extend.ll:test2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24712 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ad25d4e2df3fe01541d62ab0fd22c7de22ce3a42 |
|
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the (zext (zextload)) case to trigger, similarly for sign extends.
Allow (zext (truncate)) to apply after legalize if the target supports
AND (which all do).
This compiles
short %foo() {
%tmp.0 = load ubyte* %X ; <ubyte> [#uses=1]
%tmp.3 = cast ubyte %tmp.0 to short ; <short> [#uses=1]
ret short %tmp.3
}
to:
_foo:
movzbl _X, %eax
ret
instead of:
_foo:
movzbl _X, %eax
movzbl %al, %eax
ret
thanks to Evan for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24709 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 00cb95c9bef6b4d96994112422d9d66679dfe986 |
|
14-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a miscompilation in crafty due to a recent patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 110dec20008c94216a486f5c0d2eba30cbc2deef |
|
14-Dec-2005 |
Evan Cheng <evan.cheng@apple.com> |
Fold (zext (load x) to (zextload x).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24702 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| cc2210b4fa9debfaafa2d385549b0c30448e9c12 |
|
07-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Only transform (sext (truncate x)) -> (sextinreg x) if before legalize or
if the target supports the resultant sextinreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| b14ab8a10d7955501ec80b247b2510bbd2511b12 |
|
07-Dec-2005 |
Chris Lattner <sabre@nondot.org> |
Teach the dag combiner to turn a truncate/sign_extend pair into a sextinreg
when the types match up. This allows the X86 backend to compile:
sbyte %toggle_value(sbyte* %tmp.1) {
%tmp.2 = load sbyte* %tmp.1
ret sbyte %tmp.2
}
to this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
ret
instead of this:
_toggle_value:
mov %EAX, DWORD PTR [%ESP + 4]
movsx %EAX, BYTE PTR [%EAX]
movsx %EAX, %AL
ret
noticed in Shootout/objinst.
-Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 06d9b4ab24d1a6aa94fd0c6f24ab8381e1771f93 |
|
12-Nov-2005 |
Jeff Cohen <jeffc@jolt-lang.org> |
Fix operator precedence bug caught by VC++.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24318 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| de202b3cda00f17ba2c047be7270b51f9585a413 |
|
10-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Switch the allnodes list from a vector of pointers to an ilist of nodes.This eliminates the vector, allows constant time removal of a node froma graph, and makes iteration over the all nodes list stable when adding
nodes to the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24263 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5dc7e861f8c58301886b54f4ec1a1077b1e5281e |
|
02-Nov-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a crash that Andrew noticed, and add a pair of braces to unfconfuse
XCode's indenting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24159 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 7c22575e3292a80b42ec6189d618976a464f7406 |
|
02-Nov-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a source of undefined behavior when dealing with 64-bit types. This
may fix PR652. Thanks to Andrew for tracking down the problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24145 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3e6099b05fa85d9e5d82f04f73722f2af301c772 |
|
30-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Codegen mul by negative power of two with a shift and negate.
This implements test/Regression/CodeGen/PowerPC/mul-neg-power-2.ll,
producing:
_foo:
slwi r2, r3, 1
subfic r3, r2, 63
blr
instead of:
_foo:
mulli r2, r3, -2
addi r3, r2, 63
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24106 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| fe7f046de875e41dd338163a719a32571da7ec06 |
|
27-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix DSE to not nuke dead stores unless they redundant store is the same
VT as the killing one. Fix fixes PR491
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24034 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 731d348166792bb9846022a82f7712c7bcec8f30 |
|
27-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a simple xform that is useful for bitfield operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24029 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a158eee3130b93717d9b53b6a128fe193238aea3 |
|
25-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Clear a bit in this file that was causing a miscompilation of 178.galgel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23980 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e9936d14b899cc17572bfd6165dd6a9aa0ff89b8 |
|
22-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
BuildSDIV and BuildUDIV only work for i32/i64, but they don't check that
the input is that type, this caused a failure on gs on X86 last night.
Move the hard checks into Build[US]Div since that is where decisions like
this should be made.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23881 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c8597ca6985f8de7ab4398f60b0be1e1bea3a5b9 |
|
21-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a case missing from the dag combiner that exposed the failure on
2005-10-21-longlonggtu.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23875 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4d3856768934ee748f754cc134ba88180ce42d1c |
|
21-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a typo in the dag combiner, so that this can work on i64 targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 405e3ecb563f21e7b4ee30f0de57821f3eb91219 |
|
21-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c6a454e8d57acd47e9769516b36ce0810e9dc4f4 |
|
20-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU
for types that aren't legal, and fail a divisor is less than zero
comparison, which would cause us to drop a subtract.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23846 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f75f2a0a026621430f412d903c489b3fc951dbb3 |
|
20-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
don't use llabs with apparently VC++ doesn't have
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23845 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 6957523b9ddc6e85aede47a107502043fd1a3b2d |
|
20-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend. Alpha will probably want this too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23835 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 40c62d50697a8515abdaf83655c031968d06a900 |
|
18-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fold (select C, load A, load B) -> load (select C, A, B). This happens quite
a lot throughout many programs. In particular, specfp triggers it a bunch for
constant FP nodes when you have code like cond ? 1.0 : -1.0.
If the PPC ISel exposed the loads implicit in pic references to external globals,
we would be able to eliminate a load in cases like this as well:
%X = external global int
%Y = external global int
int* %test4(bool %C) {
%G = select bool %C, int* %X, int* %Y
ret int* %G
}
Note that this breaks things that use SrcValue's (see the fixme), but since nothing
uses them yet, this is ok.
Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23781 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a0e221dc75ee1f2d8830eec9569116386a56a936 |
|
18-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement some feedback from Chris re: constant canonicalization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23777 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 11af4eaa6d061befe341420b0ff7762b51e920ce |
|
17-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
fold fmul X, +2.0 -> fadd X, X;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23774 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 854077d3a5a42c3286f22fd5f72ee98797ed3d71 |
|
17-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a trivial fold
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23764 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 750dbd5950ab5a6689f189adbea900eee9e6884d |
|
16-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix this logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23756 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 85d63bbff740d23fae631ec1ecf5c7603e4b321d |
|
16-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23755 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 216def8ecfb8d2b03520a4fe004d498ad7b8b1c9 |
|
14-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
fold sext_in_reg, sext_in_reg where both have the same VT. This was
popping up in Fourinarow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23722 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5054f162127f19ad43bc4d0b8ab232f0fee32953 |
|
14-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Relax the checking on zextload generation a bit, since as sabre pointed out
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.
Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants. Woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23720 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 24edbb7a6cdf8adcd80086700448d59c59a810b9 |
|
14-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix the trunc(load) case, finally allowing crafty and povray to pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23718 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f98840531a8da37e481a838971abd9ab4ee69eb9 |
|
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix some bugs in (sext (load x))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23717 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bfd65a05c96988d175dec57b0b59e7dca2be04c1 |
|
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix the remaining DAGCombiner issues pointed out by sabre. This should fix
the remainder of the failures introduced by my patch last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23714 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 67a44cd3aa26003a6bc2cd755516c9cc12c36ca0 |
|
13-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a minor bug in the dag combiner that broke pcompress2 and some other
tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23713 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ded4963ab98c424a8e83f4dc0e63203754ca353b |
|
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Move some Legalize functionality over to the DAGCombiner where it belongs.
Kill some dead code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23706 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 765784ad760ee6cc504d79e4966c272387c313f8 |
|
13-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Fix a potential bug with two combine-to's back to back that chris pointed
out, where after the first CombineTo() call, the node the second CombineTo
wishes to replace may no longer exist.
Fix a very real bug with the truncated load optimization on little endian
targets, which do not need a byte offset added to the load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23704 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3df4d525c58d5db878eaadcfdcffbbfca96dd6a2 |
|
12-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
More cool stuff for the dag combiner. We can now finally handle things
like turning:
_foo:
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
into
_foo:
fctiwz f0,f1
stfd f0,-8(r1)
lhz r3,-2(r1)
blr
Also removed an unncessary constraint from sra -> srl conversion, which
should take care of hte only reason we would ever need to handle sra in
MaskedValueIsZero, AFAIK.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23703 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a179ab3016a08051c34ba82d7feaeb4198702a60 |
|
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a powerpc crash on CodeGen/Generic/llvm-ct-intrinsics.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23694 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 05b57433e68de3ba0f6eb01f4a0271fee3abeb09 |
|
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a canonicalization that got lost, fixing PowerPC/fold-li.ll:SUB
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23693 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 04ecf6d65fb5c8703eff8a3dcd5a8208e91318fe |
|
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
clean up some corner cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23692 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 87514ca04cb069310d29fd77e0501601c1e22c11 |
|
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement trivial DSE. If two stores are neighbors and store to the same
location, replace them with a new store of the last value. This occurs
in the same neighborhood in 197.parser, speeding it up about 1.5%
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23691 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 01a220213852223f2503f05c8bbb8b72e3c71290 |
|
11-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add support for CombineTo, allowing the dag combiner to replace nodes with
multiple results.
Use this support to implement trivial store->load forwarding, implementing
CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and
can be extended in the future, it is still useful. For example, it speeds
up 197.parser by 6.2% by avoiding an LSU reject in xalloc:
stw r6, lo16(l5_end_of_array)(r2)
addi r2, r5, -4
stwx r5, r4, r2
- lwzx r5, r4, r2
- rlwinm r5, r5, 0, 0, 30
stwx r5, r4, r2
lwz r2, -4(r4)
ori r2, r2, 1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23690 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 07ed417df21269c51e61746176caf73d8aef43e8 |
|
10-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Teach the DAGCombiner several new tricks, teaching it how to turn
sext_inreg into zext_inreg based on the signbit (fires a lot), srem into
urem, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23688 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| d739075cbb88463dd83d212426cfe13ad17e00da |
|
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| bba9aa3475e307be7bd60eecc733cd46eeaf107a |
|
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add ISD::ADD to MaskedValueIsZero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23685 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a19cea061e661277489655f5d0777360fb9fe736 |
|
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
add a todo for something I noticed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23679 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| ee899e6bfc854adefdbfd6631e206d18fd43ab81 |
|
10-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
(X & Y) & C == 0 if either X&C or Y&C are zero
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23678 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f845b4563a960047b1092618093a79dc0bf998a8 |
|
08-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Lo and behold, the last bits of SelectionDAG.cpp have been moved over.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23665 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| c4ced268d8d35942eb57aac2ce8d5dc7580cae94 |
|
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits through
C-X's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23662 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 094c8fcd14a04a3bac12eb17e7e04276ce594e11 |
|
07-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Turn sdivs into udivs when we can prove the sign bits are clear. This
implements CodeGen/PowerPC/div-2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23659 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| e17daebb30195ad5e95c1dc0ade89aa1eca9fd51 |
|
05-Oct-2005 |
Nate Begeman <natebegeman@mac.com> |
Check in some more DAGCombiner pieces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23639 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 3ea0b47f81caeb53f9594dd3f7702ae01c4f2cc6 |
|
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
implement visitBR_CC so that PowerPC/inverted-bool-compares.ll passes
with the dag combiner. This speeds up espresso by 8%, reaching performance
parity with the dag-combiner-disabled llc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23636 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 9503859c545496838165a340b1e1730dc1b83736 |
|
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Add a new HandleNode class, which is used to handle (haha) cases in the
dead node elim and dag combiner passes where the root is potentially updated.
This fixes a fixme in the dag combiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23634 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 5c46f74ec78e73bc91785299a6877f45a7b2f1df |
|
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Implement the code for PowerPC/inverted-bool-compares.ll, even though it
that testcase still does not pass with the dag combiner. This is because
not all forms of br* are folded yet.
Also, when we combine a node into another one, delete the node immediately
instead of waiting for the node to potentially come up in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23632 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 91559026d346747886bb4a5a686b29d64efdd640 |
|
05-Oct-2005 |
Chris Lattner <sabre@nondot.org> |
Fix a crash compiling Olden/tsp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23630 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 01b3d73c20f5afb8265ae943a8ba23c2238c5eea |
|
29-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add FP versions of the binary operators, keeping the int and fp worlds seperate.
Though I have done extensive testing, it is possible that this will break
things in configs I can't test. Please let me know if this causes a problem
and I'll fix it ASAP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23504 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 44728a7bb65f5228fff631da807ed7ed3c791a8d |
|
20-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Stub out the rest of the DAG Combiner. Just need to fill in the
select_cc bits and then wrap it in a convenience function for use with
regular select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23389 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 452d7bebaab3990ed16efa5f21b1031894a99caf |
|
16-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
More DAG combining. Still need the branch instructions, and select_cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23371 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| a500fc681de6329194e9755e051422d621387aa3 |
|
10-Sep-2005 |
Chris Lattner <sabre@nondot.org> |
Add a missing #include, patch courtesy of Baptiste Lepilleur.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23302 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 39ee1ac7e58a66aff7f6986c04878bb7e1bc5b5d |
|
09-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Last round of 2-node folds from SD.cpp. Will move on to 3 node ops such
as setcc and select next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23295 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 223df2269da508eadc160e34e0dc03c9e02e7d0b |
|
08-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Move yet more folds over to the dag combiner from sd.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23278 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 998011927000c8150499bb887ca0d68bb1ff38c2 |
|
08-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Another round of dag combiner changes. This fixes some missing XOR folds
as well as fixing how we replace old values with new values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23260 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| f89d78d7c7c93e83c0f19ecabc16cef4ba748d61 |
|
07-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement a common missing fold, (add (add x, c1), c2) -> (add x, c1+c2).
This restores all of stanford to being identical with and without the dag
combiner with the add folding turned off in sd.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23258 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 2300f5504643eaddc307d3db8a3ccd224c4fa251 |
|
07-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Add an option to the DAG Combiner to enable it for beta runs, and turn on
that option for PowerPC's beta.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23253 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 83e75ecd2725aed3ace0bd52945f2b5266696d00 |
|
06-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Next round of DAGCombiner changes. This version now passes all the tests
I have run so far when run before Legalize. It still needs to pick up the
SetCC folds, and nodes that use SetCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23243 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 646d7e2727950b7729b9b1604a7c84246e81550f |
|
02-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Next round of DAG Combiner changes. Just need to support multiple return
values, and then we should be able to hook it up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23231 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4ebd805c6af9db5099214b463003387691df50e8 |
|
02-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Implement first round of feedback from chris (there's still a couple things
left to do).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23195 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 4942a9687dc6c3322dd135cab005c1dd7345df23 |
|
01-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
Add the rest of the currently implemented visit routines to the switch
statement in visit().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23185 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|
| 1d4d41411190dd9e62764e56713753d4155764dd |
|
01-Sep-2005 |
Nate Begeman <natebegeman@mac.com> |
First pass at the DAG Combiner. It isn't used anywhere yet, but it should
be mostly functional. It currently has all folds from SelectionDAG.cpp
that do not involve a condition code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23184 91177308-0d34-0410-b5e6-96231b3b80d8
/external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
|