Searched refs:RegisterVT (Results 1 - 5 of 5) sorted by relevance

/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp869 MVT &RegisterVT,
905 RegisterVT = DestVT;
1145 MVT RegisterVT; local
1148 NumIntermediates, RegisterVT, this);
1149 RegisterTypeForVT[i] = RegisterVT;
1205 MVT &RegisterVT) const {
1218 RegisterVT = RegisterEVT.getSimpleVT();
1252 RegisterVT = DestVT;
867 getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT, TargetLoweringBase *TLI) argument
/external/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp268 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT); local
272 unsigned R = CreateReg(RegisterVT);
H A DSelectionDAGBuilder.cpp248 MVT RegisterVT; local
252 NumIntermediates, RegisterVT);
255 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
256 assert(RegisterVT == Parts[0].getSimpleValueType() &&
532 MVT RegisterVT; local
536 NumIntermediates, RegisterVT);
541 assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
620 MVT RegisterVT = tli.getRegisterType(Context, ValueVT); local
623 RegVTs.push_back(RegisterVT);
683 MVT RegisterVT local
774 MVT RegisterVT = RegVTs[Value]; local
843 MVT RegisterVT = RegVTs[Value]; local
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/external/llvm/include/llvm/Target/
H A DTargetLowering.h422 MVT &RegisterVT) const;
683 MVT RegisterVT; local
686 NumIntermediates, RegisterVT);
687 return RegisterVT;
/external/llvm/lib/Target/X86/
H A DX86FastISel.cpp3039 MVT RegisterVT = TLI.getRegisterType(I->getParent()->getContext(), VT); local
3043 MyFlags.VT = RegisterVT;

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