Searched refs:addPred (Results 1 - 9 of 9) sorted by relevance

/external/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp287 UseSU->addPred(Dep);
318 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias));
323 DefSU->addPred(Dep);
402 DefSU->addPred(Dep);
450 SU->addPred(dep);
457 DefI->SU->addPred(SDep(SU, SDep::Anti, Reg));
604 SUb->addPred(SDep(SUa, SDep::MayAliasMem));
637 (*I)->addPred(Dep);
662 SUb->addPred(Dep);
842 ExitSU.addPred(De
[all...]
H A DScheduleDAG.cpp63 /// addPred - This adds the specified edge as a pred of the current node if
66 bool SUnit::addPred(const SDep &D, bool Required) { function in class:SUnit
75 // Extend the latency if needed. Equivalent to removePred(I) + addPred(D).
H A DMachineScheduler.cpp511 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial());
/external/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h405 /// addPred - This adds the specified edge as a pred of the current node if
408 bool addPred(const SDep &D, bool Required = true);
725 /// WillCreateCycle - Return true if addPred(TargetSU, SU) creates a cycle.
/external/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Barrier));
/external/llvm/lib/Transforms/ObjCARC/
H A DObjCARCOpts.cpp682 void addPred(BasicBlock *Pred) { Preds.push_back(Pred); } function in class:__anon26266::BBState
2207 SuccStates.addPred(CurrBB);
2214 BBStates[SuccBB].addPred(CurrBB);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp89 SU->addPred(D);
H A DScheduleDAGSDNodes.cpp502 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) {
H A DScheduleDAGRRList.cpp202 SU->addPred(D);

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