Searched refs:isSEXTLoad (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp616 bool isSEXTLoad, SDValue &Base,
661 bool isSEXTLoad = false; local
665 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
676 bool isLegal = getIndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset,
615 getIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5662 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N))
10020 bool isSEXTLoad, SDValue &Base,
10026 if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) {
10079 bool isSEXTLoad, SDValue &Base,
10116 bool isSEXTLoad = false; local
10120 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
10130 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base,
10133 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base,
10155 bool isSEXTLoad = false; local
10159 isSEXTLoad
10019 getARMIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
10078 getT2IndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
[all...]
/external/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2025 /// isSEXTLoad - Returns true if the specified node is a SEXTLOAD.
2027 inline bool isSEXTLoad(const SDNode *N) { function in namespace:ISD
/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp2852 if (ISD::isSEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) &&
5033 if ((ISD::isSEXTLoad(N0.getNode()) || ISD::isEXTLoad(N0.getNode())) &&

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