/external/llvm/test/MC/Mips/ |
H A D | micromips-shift-instructions.s | 13 # CHECK-EL: srav $2, $3, $5 # encoding: [0x65,0x00,0x90,0x10] 24 # CHECK-EB: srav $2, $3, $5 # encoding: [0x00,0x65,0x10,0x90] 32 srav $2, $3, $5
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H A D | mips-alu-instructions.s | 29 # CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00] 60 srav $2, $3, $5
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H A D | mips64-alu-instructions.s | 27 # CHECK: srav $2, $3, $5 # encoding: [0x07,0x10,0xa3,0x00] 55 srav $2, $3, $5
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/external/llvm/test/MC/Mips/mips1/ |
H A D | valid.s | 92 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 93 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/chromium_org/v8/test/cctest/ |
H A D | test-disasm-mips.cc | 346 COMPARE(srav(a0, a1, a2), 347 "00c52007 srav a0, a1, a2"); 348 COMPARE(srav(s0, s1, s2), 349 "02518007 srav s0, s1, s2"); 350 COMPARE(srav(t2, t3, t4), 351 "018b5007 srav t2, t3, t4"); 352 COMPARE(srav(v0, v1, fp), 353 "03c31007 srav v0, v1, fp");
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H A D | test-disasm-mips64.cc | 475 COMPARE(srav(a0, a1, a2), 476 "00c52007 srav a0, a1, a2"); 477 COMPARE(srav(s0, s1, s2), 478 "02518007 srav s0, s1, s2"); 479 COMPARE(srav(a6, a7, t0), 480 "018b5007 srav a6, a7, t0"); 481 COMPARE(srav(v0, v1, fp), 482 "03c31007 srav v0, v1, fp");
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H A D | test-assembler-mips.cc | 145 __ srav(v0, v0, t0); // 0xff234560
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H A D | test-assembler-mips64.cc | 147 __ srav(v0, v0, a4); // 0xff234560
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/external/llvm/test/MC/Mips/mips2/ |
H A D | valid.s | 108 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 109 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips32/ |
H A D | valid.s | 136 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 137 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips32r2/ |
H A D | valid.s | 164 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 165 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips3/ |
H A D | valid.s | 166 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 167 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips4/ |
H A D | valid.s | 184 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 185 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips5/ |
H A D | valid.s | 185 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 186 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips64/ |
H A D | valid.s | 201 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 202 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/llvm/test/MC/Mips/mips64r2/ |
H A D | valid.s | 228 sra $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07] 229 srav $s1,$s7,$sp # CHECK: srav $17, $23, $sp # encoding: [0x03,0xb7,0x88,0x07]
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/external/chromium_org/v8/src/mips/ |
H A D | disasm-mips.cc | 673 Format(instr, "srav 'rd, 'rt, 'rs");
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H A D | assembler-mips.h | 788 void srav(Register rt, Register rd, Register rs);
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H A D | assembler-mips.cc | 1630 void Assembler::srav(Register rd, Register rt, Register rs) { function in class:v8::Assembler
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H A D | full-codegen-mips.cc | 2379 __ srav(right, left, scratch1);
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H A D | lithium-codegen-mips.cc | 1626 __ srav(result, left, ToRegister(right_op));
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/external/chromium_org/v8/src/mips64/ |
H A D | disasm-mips64.cc | 752 Format(instr, "srav 'rd, 'rt, 'rs");
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H A D | assembler-mips64.h | 800 void srav(Register rt, Register rd, Register rs);
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H A D | assembler-mips64.cc | 1694 void Assembler::srav(Register rd, Register rt, Register rs) { function in class:v8::Assembler
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H A D | lithium-codegen-mips64.cc | 1590 __ srav(result, left, ToRegister(right_op));
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