| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 279 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); local
280 assert((ShiftVal == 0 || ShiftVal == 12) &&
283 return MO.getImm() | (ShiftVal == 0 ? 0 : (1 << 12));
565 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); local
566 assert((ShiftVal == 8 || ShiftVal == 16) && "Invalid shift amount!");
567 return ShiftVal == 8 ? 0 : 1;
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| H A D | AArch64InstPrinter.cpp | 1009 unsigned ShiftVal = AArch64_AM::getArithShiftValue(Val); local
1021 if (ShiftVal != 0)
1022 O << ", lsl #" << ShiftVal; local
1027 if (ShiftVal != 0)
1028 O << " #" << ShiftVal; local
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 542 unsigned ShiftVal = 0; local
549 ShiftVal = CSD->getZExtValue();
550 if (ShiftVal > 4)
573 Shift = CurDAG->getTargetConstant(getArithExtendImm(Ext, ShiftVal), MVT::i32);
724 unsigned ShiftVal = CSD->getZExtValue(); local
726 if (ShiftVal != 0 && ShiftVal != LegalShiftVal)
|
| H A D | AArch64FastISel.cpp | 1186 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); local
1192 AArch64_AM::LSL, ShiftVal, SetFlags, WantResult);
1206 uint64_t ShiftVal = C->getZExtValue(); local
1213 RHSIsKill, ShiftType, ShiftVal, SetFlags,
1550 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); local
1557 RHSIsKill, ShiftVal);
1564 uint64_t ShiftVal = C->getZExtValue(); local
1570 RHSIsKill, ShiftVal);
4504 uint64_t ShiftVal = C->getValue().logBase2(); local
4533 emitLSL_ri(VT, SrcVT, Src0Reg, Src0IsKill, ShiftVal, IsZEx
4570 uint64_t ShiftVal = C->getZExtValue(); local
[all...] |
| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 1202 uint32_t ShiftVal = Shift->getZExtValue(); local
1209 ShiftVal, WidthVal);
1223 uint32_t ShiftVal = Shift->getZExtValue(); local
1224 uint32_t MaskVal = Mask->getZExtValue() >> ShiftVal;
1230 ShiftVal, WidthVal);
|
| H A D | AMDGPUISelLowering.cpp | 2501 SDValue ShiftVal = DAG.getConstant(OffsetVal, MVT::i32); local
2503 BitsFrom, ShiftVal);
|
| /external/llvm/lib/Transforms/Scalar/ |
| H A D | ScalarReplAggregates.cpp | 2385 Value *ShiftVal = ConstantInt::get(EltVal->getType(), Shift); local
2386 EltVal = Builder.CreateLShr(EltVal, ShiftVal, "sroa.store.elt");
2431 Value *ShiftVal = ConstantInt::get(EltVal->getType(), Shift); local
2432 EltVal = Builder.CreateLShr(EltVal, ShiftVal, "sroa.store.elt");
2533 Value *ShiftVal = ConstantInt::get(SrcField->getType(), Shift); local
2534 SrcField = BinaryOperator::CreateShl(SrcField, ShiftVal, "", LI);
|
| /external/clang/lib/CodeGen/ |
| H A D | CGBuiltin.cpp | 5964 unsigned ShiftVal = cast<llvm::ConstantInt>(Ops[2])->getZExtValue(); local
5974 if (ShiftVal >= (2 * NumLaneElts))
5979 if (ShiftVal > NumLaneElts) {
5980 ShiftVal -= NumLaneElts;
5988 unsigned Idx = ShiftVal + i;
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 1447 // Store it in ShiftVal if so.
1448 static bool isSimpleShift(SDValue N, unsigned &ShiftVal) { argument
1457 ShiftVal = Amount;
1605 unsigned NewCCMask, ShiftVal; local
1608 isSimpleShift(NewC.Op0, ShiftVal) &&
1610 MaskVal >> ShiftVal,
1611 CmpVal >> ShiftVal,
1614 MaskVal >>= ShiftVal; local
1617 isSimpleShift(NewC.Op0, ShiftVal) &&
1619 MaskVal << ShiftVal,
1623 MaskVal <<= ShiftVal; local
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 4674 SDValue ShiftVal = DAG.getConstant(NumBits/8, ScalarShiftTy); local
4676 DAG.getNode(Opc, dl, ShVT, SrcOp, ShiftVal));
|