| /external/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 275 EVT HalfVT = EVT((MVT::SimpleValueType)IntVT); local
276 if (HalfVT.getSizeInBits() * 2 >= EVTSize)
277 return HalfVT;
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| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.cpp | 1646 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); local
1648 SDValue one = DAG.getConstant(1, HalfVT);
1649 SDValue zero = DAG.getConstant(0, HalfVT);
1653 SDValue LHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, zero);
1654 SDValue LHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, LHS, one);
1657 SDValue RHS_Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, zero);
1658 SDValue RHS_Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, HalfVT, RHS, one);
1664 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT),
1675 SDValue DIV_Part = DAG.getNode(ISD::UDIV, DL, HalfVT, LHS_H
1853 EVT HalfVT = VT.getHalfSizedIntegerVT(*DAG.getContext()); local
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.cpp | 1126 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), local
1128 SplitInteger(Op, HalfVT, HalfVT, Lo, Hi);
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| H A D | LegalizeVectorTypes.cpp | 1642 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, local
1644 SDValue HalfLo = DAG.getNode(N->getOpcode(), DL, HalfVT, InLoVec);
1645 SDValue HalfHi = DAG.getNode(N->getOpcode(), DL, HalfVT, InHiVec);
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| H A D | TargetLowering.cpp | 865 EVT HalfVT = Op.getOperand(0).getValueType(); local
866 unsigned HalfBitWidth = HalfVT.getScalarSizeInBits();
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| H A D | SelectionDAGBuilder.cpp | 134 EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), RoundBits/2); local
138 PartVT, HalfVT, V);
140 RoundParts / 2, PartVT, HalfVT, V);
142 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]);
143 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]);
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5963 MVT HalfVT = MVT::getVectorVT(ResVT.getScalarType(), local
5967 return Concat256BitVectors(Concat128BitVectors(V1, V2, HalfVT, NumElems/2, DAG, dl),
5968 Concat128BitVectors(V3, V4, HalfVT, NumElems/2, DAG, dl), ResVT, NumElems, DAG, dl);
5984 MVT HalfVT = MVT::getVectorVT(ResVT.getScalarType(), local
5989 SDValue Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, Ops);
5993 SDValue Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HalfVT, Ops);
13752 MVT HalfVT = MVT::getVectorVT(VT.getScalarType(), local
13755 OpLo = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpLo);
13756 OpHi = DAG.getNode(X86ISD::VSEXT, dl, HalfVT, OpHi);
22541 EVT HalfVT
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 8050 EVT HalfVT = local
8052 SDValue SubVector0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal,
8054 SDValue SubVector1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, HalfVT, StVal,
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