/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCInstrInfo.h | 30 unsigned getBitCount(MCInstrInfo const &MCII, MCInst const &MCI); 33 unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI); 35 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI); 41 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI); 45 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI); 48 MCOperand const &getNewValue(MCInstrInfo const &MCII, MCInst const &MCI); 51 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI); 54 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI); 57 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI); 60 bool isConstExtended(MCInstrInfo const &MCII, MCIns [all...] |
H A D | HexagonMCInstrInfo.cpp | 23 unsigned HexagonMCInstrInfo::getBitCount(MCInstrInfo const &MCII, argument 25 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; 30 unsigned short HexagonMCInstrInfo::getCExtOpNum(MCInstrInfo const &MCII, argument 32 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; 36 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII, argument 38 return (MCII.get(MCI.getOpcode())); 49 int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII, argument 51 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags; 64 int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII, argument 66 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MC 78 getNewValue(MCInstrInfo const &MCII, MCInst const &MCI) argument 92 getType(MCInstrInfo const &MCII, MCInst const &MCI) argument 100 hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI) argument 107 isCanon(MCInstrInfo const &MCII, MCInst const &MCI) argument 121 isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI) argument 152 isExtendable(MCInstrInfo const &MCII, MCInst const &MCI) argument 159 isExtended(MCInstrInfo const &MCII, MCInst const &MCI) argument 166 isNewValue(MCInstrInfo const &MCII, MCInst const &MCI) argument 173 isOperandExtended(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short OperandNum) argument 192 isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) argument 197 isSolo(MCInstrInfo const &MCII, MCInst const &MCI) argument [all...] |
H A D | HexagonMCCodeEmitter.cpp | 53 : MCT(aMCT), MCII(aMII) {} 59 assert(HexagonMCInstrInfo::getDesc(MCII, MI).getSize() == 4 && 61 (void)&MCII;
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H A D | HexagonMCCodeEmitter.h | 30 MCInstrInfo const &MCII; member in class:llvm::HexagonMCCodeEmitter
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H A D | HexagonMCTargetDesc.h | 36 MCCodeEmitter *createHexagonMCCodeEmitter(MCInstrInfo const &MCII,
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.h | 31 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 35 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
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H A D | AMDGPUMCTargetDesc.cpp | 73 static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, argument 77 return createSIMCCodeEmitter(MCII, STI, Ctx); 79 return createR600MCCodeEmitter(MCII, STI, Ctx);
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H A D | SIMCCodeEmitter.cpp | 62 const MCInstrInfo &MCII; member in class:__anon12161::SIMCCodeEmitter 69 : MCII(mcii), STI(sti), Ctx(ctx) { } 125 MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII, argument 128 return new SIMCCodeEmitter(MCII, STI, Ctx); 260 return MCII.get(MI.getOpcode()).TSFlags & SI_INSTR_FLAGS_ENCODING_MASK;
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H A D | R600MCCodeEmitter.cpp | 42 const MCInstrInfo &MCII; member in class:__anon12159::R600MCCodeEmitter 50 : MCII(mcii), STI(sti), Ctx(ctx) { } 144 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, argument 147 return new R600MCCodeEmitter(MCII, STI, Ctx); 195 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 333 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 676 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode());
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.h | 37 MCCodeEmitter *createR600MCCodeEmitter(const MCInstrInfo &MCII, 41 MCCodeEmitter *createSIMCCodeEmitter(const MCInstrInfo &MCII,
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H A D | R600MCCodeEmitter.cpp | 35 const MCInstrInfo &MCII; member in class:__anon10839::R600MCCodeEmitter 41 : MCII(mcii), MRI(mri) { } 83 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, argument 86 return new R600MCCodeEmitter(MCII, MRI); 92 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 175 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags))
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H A D | SIMCCodeEmitter.cpp | 37 const MCInstrInfo &MCII; member in class:__anon10840::SIMCCodeEmitter 50 : MCII(mcii), MRI(mri), Ctx(ctx) { } 73 MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII, argument 76 return new SIMCCodeEmitter(MCII, MRI, Ctx); 187 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 274 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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/external/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCTargetDesc.h | 35 MCCodeEmitter *createBPFMCCodeEmitter(const MCInstrInfo &MCII,
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCTargetDesc.h | 37 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, 40 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
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H A D | MipsMCCodeEmitter.h | 36 const MCInstrInfo &MCII; member in class:llvm::MipsMCCodeEmitter 44 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCTargetDesc.h | 35 MCCodeEmitter *createSparcMCCodeEmitter(const MCInstrInfo &MCII,
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCTargetDesc.h | 59 MCCodeEmitter *createARMLEMCCodeEmitter(const MCInstrInfo &MCII, 63 MCCodeEmitter *createARMBEMCCodeEmitter(const MCInstrInfo &MCII,
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.h | 42 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCTargetDesc.h | 40 MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII,
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H A D | PPCMCCodeEmitter.cpp | 38 const MCInstrInfo &MCII; member in class:__anon10799::PPCMCCodeEmitter 44 : MCII(mcii), CTX(ctx), 107 const MCInstrDesc &Desc = MCII.get(Opcode); 163 MCCodeEmitter *llvm::createPPCMCCodeEmitter(const MCInstrInfo &MCII, argument 166 return new PPCMCCodeEmitter(MCII, Ctx);
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCTargetDesc.h | 73 MCCodeEmitter *createSystemZMCCodeEmitter(const MCInstrInfo &MCII,
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H A D | SystemZMCCodeEmitter.cpp | 27 const MCInstrInfo &MCII; member in class:__anon10881::SystemZMCCodeEmitter 32 : MCII(mcii), Ctx(ctx) { 111 MCCodeEmitter *llvm::createSystemZMCCodeEmitter(const MCInstrInfo &MCII, argument 114 return new SystemZMCCodeEmitter(MCII, Ctx); 122 unsigned Size = MCII.get(MI.getOpcode()).getSize();
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/external/llvm/tools/llvm-mc/ |
H A D | llvm-mc.cpp | 322 MCInstrInfo &MCII, MCTargetOptions &MCOptions) { 326 TheTarget->createMCAsmParser(STI, *Parser, MCII, MCOptions)); 446 std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo()); 453 *MAI, *MCII, *MRI); 462 CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx); 480 MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, Ctx); 497 *MCII, MCOptions); 319 AssembleInput(const char *ProgName, const Target *TheTarget, SourceMgr &SrcMgr, MCContext &Ctx, MCStreamer &Str, MCAsmInfo &MAI, MCSubtargetInfo &STI, MCInstrInfo &MCII, MCTargetOptions &MCOptions) argument
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCTargetDesc.h | 67 MCCodeEmitter *createX86MCCodeEmitter(const MCInstrInfo &MCII,
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/external/llvm/lib/Object/ |
H A D | IRObjectFile.cpp | 66 std::unique_ptr<MCInstrInfo> MCII(T->createMCInstrInfo()); 67 if (!MCII) 84 T->createMCAsmParser(*STI, *Parser, *MCII, MCOptions));
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