| /external/llvm/lib/Target/R600/ |
| H A D | SIISelLowering.cpp | 336 EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, argument
346 if (Size >= 16 && DstAlign >= 4) // XXX: Should only do for global
349 if (Size >= 8 && DstAlign >= 4)
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| /external/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCalls.cpp | 63 unsigned DstAlign = getKnownAlignment(MI->getArgOperand(0), DL, MI, AC, DT); local
65 unsigned MinAlign = std::min(DstAlign, SrcAlign);
139 DstAlign = std::max(DstAlign, CopyAlign);
148 S->setAlignment(DstAlign);
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 3541 EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, argument
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 3903 unsigned DstAlign, unsigned SrcAlign,
3910 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3914 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3919 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3925 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3926 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
3929 switch (DstAlign & 7) {
3986 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
3901 FindOptimalMemOpLowering(std::vector<EVT> &MemOps, unsigned Limit, uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, bool AllowOverlap, SelectionDAG &DAG, const TargetLowering &TLI) argument
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 6698 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument
6701 (DstAlign == 0 || DstAlign % AlignCheck == 0));
6704 EVT AArch64TargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign, argument
6716 (memOpAlign(SrcAlign, DstAlign, 16) ||
6721 (memOpAlign(SrcAlign, DstAlign, 8) ||
6726 (memOpAlign(SrcAlign, DstAlign, 4) ||
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9898 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument
9901 (DstAlign == 0 || DstAlign % AlignCheck == 0));
9905 unsigned DstAlign, unsigned SrcAlign,
9916 (memOpAlign(SrcAlign, DstAlign, 16) ||
9920 (memOpAlign(SrcAlign, DstAlign, 8) ||
9904 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 11060 /// lowering. If DstAlign is zero that means it's safe to destination
11070 unsigned DstAlign, unsigned SrcAlign,
11079 (!SrcAlign || SrcAlign >= 32) && (!DstAlign || DstAlign >= 32) &&
11087 (((!SrcAlign || SrcAlign >= 16) && (!DstAlign || DstAlign >= 16)) ||
11069 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1686 /// lowering. If DstAlign is zero that means it's safe to destination
1697 unsigned DstAlign, unsigned SrcAlign,
1706 ((DstAlign == 0 || DstAlign >= 16) &&
1696 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
|