Searched defs:Ins (Results 1 - 25 of 37) sorted by relevance

12

/external/llvm/lib/Target/Mips/
H A DMipsCCState.cpp81 const SmallVectorImpl<ISD::InputArg> &Ins,
83 for (unsigned i = 0; i < Ins.size(); ++i) {
121 const SmallVectorImpl<ISD::InputArg> &Ins) {
123 for (unsigned i = 0; i < Ins.size(); ++i) {
129 if (Ins[i].Flags.isSRet()) {
135 assert(Ins[i].getOrigArgIndex() < MF.getFunction()->arg_size());
136 std::advance(FuncArg, Ins[i].getOrigArgIndex());
80 PreAnalyzeCallResultForF128( const SmallVectorImpl<ISD::InputArg> &Ins, const TargetLowering::CallLoweringInfo &CLI) argument
120 PreAnalyzeFormalArgumentsForF128( const SmallVectorImpl<ISD::InputArg> &Ins) argument
H A DMipsCCState.h33 void PreAnalyzeCallResultForF128(const SmallVectorImpl<ISD::InputArg> &Ins,
50 PreAnalyzeFormalArgumentsForF128(const SmallVectorImpl<ISD::InputArg> &Ins);
93 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
95 PreAnalyzeFormalArgumentsForF128(Ins);
96 CCState::AnalyzeFormalArguments(Ins, Fn);
101 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
104 PreAnalyzeCallResultForF128(Ins, CLI);
105 CCState::AnalyzeCallResult(Ins, Fn);
H A DMipsISelLowering.h105 Ins, enumerator in enum:llvm::MipsISD::NodeType
392 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl,
456 const SmallVectorImpl<ISD::InputArg> &Ins,
/external/llvm/lib/Transforms/IPO/
H A DIPConstantPropagation.cpp250 Instruction *Ins = cast<Instruction>(*I); local
257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins))
270 Ins->replaceAllUsesWith(New);
271 Ins->eraseFromParent();
H A DPartialInlining.cpp94 BasicBlock::iterator Ins = newReturnBlock->begin(); local
99 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
101 Ins = newReturnBlock->getFirstNonPHI();
H A DLowerBitSets.cpp595 bool> Ins = local
598 Ins.first->second.push_back(CI);
599 if (!Ins.second)
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument
71 unsigned NumArgs = Ins.size();
74 MVT ArgVT = Ins[i].VT;
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
160 MVT VT = Ins[i].VT;
161 ISD::ArgFlagsTy Flags = Ins[i].Flags;
H A DRegAllocGreedy.cpp921 unsigned Ins = 0; local
926 BC.Entry = SpillPlacement::MustSpill, ++Ins; local
928 BC.Entry = SpillPlacement::PrefSpill, ++Ins; local
930 ++Ins;
936 BC.Exit = SpillPlacement::MustSpill, ++Ins; local
938 BC.Exit = SpillPlacement::PrefSpill, ++Ins; local
940 ++Ins;
944 while (Ins--)
1130 unsigned Ins = 0; local
1133 Ins
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/external/llvm/include/llvm/Transforms/Utils/
H A DSSAUpdaterImpl.h73 SmallVectorImpl<PhiT*> *Ins) :
74 Updater(U), AvailableVals(A), InsertedPHIs(Ins) { }
72 SSAUpdaterImpl(UpdaterT *U, AvailableValsTy *A, SmallVectorImpl<PhiT*> *Ins) argument
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp334 MachineBasicBlock::iterator Ins = MBB->begin(); local
336 if (Ins != MBB->end())
337 DL = Ins->getDebugLoc();
346 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.cpp52 const SmallVectorImpl<ISD::InputArg> &Ins,
58 for (unsigned i = 0, e = Ins.size(); i < e; ++i) {
48 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
/external/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp192 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
208 CCInfo.AnalyzeFormalArguments(Ins, CC_BPF64);
262 auto &Ins = CLI.Ins; local
383 return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, Ins, CLI.DL, DAG,
438 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
446 if (Ins.size() >= 2) {
452 CCInfo.AnalyzeCallResult(Ins, RetCC_BPF64);
190 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
436 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
/external/llvm/lib/Transforms/Instrumentation/
H A DSanitizerCoverage.cpp380 Instruction *Ins = SplitBlockAndInsertIfThen( local
382 IRB.SetInsertPoint(Ins);
/external/llvm/include/llvm/CodeGen/
H A DFastISel.h84 SmallVector<ISD::InputArg, 4> Ins; member in struct:llvm::FastISel::CallLoweringInfo
181 Ins.clear();
/external/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp574 MachineBasicBlock::iterator Ins = MBB->begin(); local
576 if (Ins != MBB->end())
577 DL = Ins->getDebugLoc();
585 MachineInstrBuilder MIB = BuildMI(*MBB, Ins, DL, MCID, BaseReg)
/external/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp976 MachineBasicBlock::iterator Ins = MBB->begin(); local
978 if (Ins != MBB->end())
979 DL = Ins->getDebugLoc();
988 BuildMI(*MBB, Ins, DL, MCID, BaseReg)
/external/llvm/lib/Transforms/Scalar/
H A DStraightLineStrengthReduce.cpp91 Stride(nullptr), Ins(nullptr), Basis(nullptr) {}
94 : CandidateKind(CT), Base(B), Index(Idx), Stride(S), Ins(I),
117 Instruction *Ins; member in struct:__anon11093::StraightLineStrengthReduce::Candidate
224 return (Basis.Ins != C.Ins && // skip the same instruction
226 DT->dominates(Basis.Ins->getParent(), C.Ins->getParent()) &&
283 return isGEPFoldable(cast<GetElementPtrInst>(C.Ins), TTI, DL);
310 hasOnlyOneNonZeroIndex(cast<GetElementPtrInst>(C.Ins)));
543 cast<GetElementPtrInst>(Basis.Ins)
[all...]
H A DLoopInterchange.cpp90 Instruction *Ins = dyn_cast<Instruction>(I); local
91 if (!Ins)
739 const Instruction &Ins = *I; local
742 if (!Ins.isIdenticalTo(InnerIndexVarInc))
808 const Instruction &Ins = *I; local
809 if (const GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(&Ins)) {
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp275 const SmallVectorImpl<ISD::InputArg> &Ins) {
276 State.AnalyzeFormalArguments(Ins, CC_MSP430_AssignStack);
350 const SmallVectorImpl<ISD::InputArg> &Ins) {
351 State.AnalyzeCallResult(Ins, RetCC_MSP430);
375 &Ins,
386 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
388 if (Ins.empty())
401 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; local
417 Outs, OutVals, Ins, d
274 AnalyzeVarArgs(CCState &State, const SmallVectorImpl<ISD::InputArg> &Ins) argument
349 AnalyzeRetResult(CCState &State, const SmallVectorImpl<ISD::InputArg> &Ins) argument
371 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
427 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
578 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
718 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
/external/llvm/utils/TableGen/
H A DCodeGenRegisters.h93 std::pair<CompMap::iterator, bool> Ins = local
104 return (Ins.second || Ins.first->second == B) ? nullptr
105 : Ins.first->second;
H A DCodeGenRegisters.cpp322 DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins = local
324 if (Ins->second == SI->first)
332 SI->first->getName() + " and " + Ins->second->getName());
/external/llvm/include/llvm/TableGen/
H A DRecord.h1690 bool Ins = Classes.insert(std::make_pair(R->getName(), local
1692 (void)Ins;
1693 assert(Ins && "Class already exists");
1696 bool Ins = Defs.insert(std::make_pair(R->getName(), local
1698 (void)Ins;
1699 assert(Ins && "Record already exists");
/external/llvm/lib/Target/R600/
H A DR600ISelLowering.cpp1645 const SmallVectorImpl<ISD::InputArg> &Ins,
1656 getOriginalFunctionArgs(DAG, MF.getFunction(), Ins, LocalIns);
1660 for (unsigned i = 0, e = Ins.size(); i < e; ++i) {
1662 const ISD::InputArg &In = Ins[i];
1641 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
H A DSIISelLowering.cpp401 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG,
413 BitVector Skipped(Ins.size());
415 for (unsigned i = 0, e = Ins.size(), PSInputNum = 0; i != e; ++i) {
416 const ISD::InputArg &Arg = Ins[i];
499 getOriginalFunctionArgs(DAG, DAG.getMachineFunction().getFunction(), Ins,
505 for (unsigned i = 0, e = Ins.size(), ArgIdx = 0; i != e; ++i) {
507 const ISD::InputArg &Arg = Ins[i];
517 VT = Ins[i].VT;
523 Offset, Ins[i].Flags.isSExt());
526 dyn_cast<PointerType>(FType->getParamType(Ins[
399 LowerFormalArguments( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
[all...]
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp1046 SmallVectorImpl<ISD::InputArg> &Ins = CLI.Ins; local
1064 Outs, OutVals, Ins, dl, DAG, InVals);
1123 const SmallVectorImpl<ISD::InputArg> &Ins,
1143 RetCCInfo.AnalyzeCallResult(Ins, RetCC_XCore);
1259 const SmallVectorImpl<ISD::InputArg> &Ins,
1271 Ins, dl, DAG, InVals);
1284 &Ins,
1298 CCInfo.AnalyzeFormalArguments(Ins, CC_XCore);
1364 const ArgDataPair ADP = { ArgIn, Ins[
1118 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1256 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1280 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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