Searched refs:ATOMIC_LOAD (Results 1 - 16 of 16) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 651 /// Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) 653 ATOMIC_LOAD, enumerator in enum:llvm::ISD::NodeType
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H A D | SelectionDAGNodes.h | 1150 N->getOpcode() == ISD::ATOMIC_LOAD || 1267 N->getOpcode() == ISD::ATOMIC_LOAD ||
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 71 case ISD::ATOMIC_LOAD: return "AtomicLoad";
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H A D | LegalizeIntegerTypes.cpp | 125 case ISD::ATOMIC_LOAD: 1262 case ISD::ATOMIC_LOAD: ExpandIntRes_ATOMIC_LOAD(N, Lo, Hi); break;
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H A D | SelectionDAG.cpp | 535 case ISD::ATOMIC_LOAD: 4586 if (Opcode != ISD::ATOMIC_LOAD) 4631 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
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H A D | LegalizeDAG.cpp | 2896 case ISD::ATOMIC_LOAD: {
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H A D | SelectionDAGBuilder.cpp | 3801 DAG.getAtomic(ISD::ATOMIC_LOAD, dl, VT, VT, InChain,
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 165 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); 232 case ISD::ATOMIC_LOAD: return LowerATOMIC_LOAD(Op, DAG); 970 assert(N->getOpcode() == ISD::ATOMIC_LOAD && "Bad Atomic OP");
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/external/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 224 setTargetDAGCombine(ISD::ATOMIC_LOAD); 1738 case ISD::ATOMIC_LOAD:
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1498 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); 1504 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Custom); 2835 case ISD::ATOMIC_LOAD:
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 373 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Expand); 374 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 158 // Lower ATOMIC_LOAD and ATOMIC_STORE into normal volatile loads and 160 setOperationAction(ISD::ATOMIC_LOAD, VT, Custom); 2738 case ISD::ATOMIC_LOAD: 3020 // Implement EmitInstrWithCustomInserter for pseudo ATOMIC_LOAD{,W}_* 3142 // ATOMIC_LOAD{,W}_{,U}{MIN,MAX} instruction MI. CompareOpcode is the
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 585 Use->getOpcode() != ISD::ATOMIC_LOAD &&
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 808 // Mark ATOMIC_LOAD and ATOMIC_STORE custom so we can handle the 810 setOperationAction(ISD::ATOMIC_LOAD, MVT::i32, Custom); 6325 case ISD::ATOMIC_LOAD:
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 789 setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 17454 case ISD::ATOMIC_LOAD: {
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