Searched refs:LShr (Results 1 - 25 of 60) sorted by relevance

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/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp142 case Instruction::LShr: {
260 case Instruction::LShr: {
399 assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
586 if (I.getOpcode() == Instruction::LShr &&
601 assert(ShiftOp->getOpcode() == Instruction::LShr ||
612 if (I.getOpcode() == Instruction::LShr &&
617 BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
660 if (I.getOpcode() == Instruction::LShr &&
H A DInstCombineMulDivRem.cpp60 if (I->getOpcode() == Instruction::LShr && !I->isExact()) {
953 BinaryOperator *LShr = BinaryOperator::CreateLShr( local
956 LShr->setIsExact();
957 return LShr;
983 BinaryOperator *LShr = BinaryOperator::CreateLShr(Op0, N); local
985 LShr->setIsExact();
986 return LShr;
H A DInstCombineVectorOps.cpp623 case Instruction::LShr:
686 case Instruction::LShr:
786 case Instruction::LShr:
H A DInstCombineCompares.cpp1004 if (Shr->getOpcode() == Instruction::LShr)
1302 } else if (ShiftOpcode == Instruction::LShr) {
1361 if (Shift->getOpcode() == Instruction::LShr) {
1381 Value *X, *Y, *LShr; local
1386 if (match(Or, m_Or(m_Value(LShr), m_Value(X))) &&
1387 match(LShr, m_LShr(m_Specific(X), m_Value(Y)))) {
1393 if (LShr->hasOneUse())
1404 LShr->getName(),
1644 case Instruction::LShr: // (icmp pred (shr X, ShAmt), CI)
3470 case Instruction::LShr
[all...]
H A DInstCombineSelect.cpp118 case Instruction::LShr:
136 case Instruction::LShr:
H A DInstCombineSimplifyDemanded.cpp672 case Instruction::LShr:
912 bool isLshr = (Shr->getOpcode() == Instruction::LShr);
/external/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp157 case Instruction::LShr:
/external/llvm/include/llvm/IR/
H A DOperator.h150 OpC == Instruction::LShr;
357 : public ConcreteOperator<PossiblyExactOperator, Instruction::LShr> {
H A DInstruction.h137 return getOpcode() == Shl || getOpcode() == LShr;
H A DPatternMatch.h530 inline BinaryOp_match<LHS, RHS, Instruction::LShr> m_LShr(const LHS &L,
532 return BinaryOp_match<LHS, RHS, Instruction::LShr>(L, R);
655 /// \brief Matches LShr or AShr.
657 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>
659 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::AShr>(L, R);
662 /// \brief Matches LShr or Shl.
664 inline BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::Shl>
666 return BinOp2_match<LHS, RHS, Instruction::LShr, Instruction::Shl>(L, R);
/external/llvm/lib/Target/XCore/
H A DXCoreLowerThreadLocal.cpp99 case Instruction::LShr:
/external/llvm/lib/Transforms/Utils/
H A DSimplifyIndVar.cpp99 case Instruction::LShr:
117 if (UseInst->getOpcode() == Instruction::LShr) {
/external/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp136 case Instruction::LShr:
H A DPPCCTRLoops.cpp393 J->getOpcode() == Instruction::LShr)) {
/external/llvm/lib/Transforms/Scalar/
H A DBDCE.cpp170 case Instruction::LShr:
H A DLoopRotation.cpp233 case Instruction::LShr:
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILPeepholeOptimizer.cpp602 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset,
605 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset,
624 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset,
627 LHSSrc = BinaryOperator::Create(Instruction::LShr, LHSSrc, offset,
/external/lldb/source/Expression/
H A DIRInterpreter.cpp510 case Instruction::LShr:
625 case Instruction::LShr:
703 case Instruction::LShr:
/external/llvm/lib/Analysis/
H A DCostModel.cpp409 case Instruction::LShr:
/external/llvm/lib/IR/
H A DInstruction.cpp245 case LShr: return "lshr";
H A DConstantFold.cpp266 case Instruction::LShr: {
967 case Instruction::LShr:
1139 case Instruction::LShr:
1155 case Instruction::LShr:
1232 case Instruction::LShr:
/external/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.cpp101 case Instruction::LShr:
/external/llvm/lib/Transforms/ObjCARC/
H A DARCInstKind.cpp278 case Instruction::LShr:
/external/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.cpp102 Cost += getArithmeticInstrCost(Instruction::LShr, Ty, Op1Info, Op2Info,
1047 case Instruction::LShr:
H A DX86FastISel.cpp1511 case Instruction::LShr: OpReg = X86::SHR8rCL; break;
1520 case Instruction::LShr: OpReg = X86::SHR16rCL; break;
1529 case Instruction::LShr: OpReg = X86::SHR32rCL; break;
1538 case Instruction::LShr: OpReg = X86::SHR64rCL; break;
3201 case Instruction::LShr:

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