/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | TargetLowering.cpp | 607 unsigned ShAmt = SA->getZExtValue(); local 611 if (ShAmt >= BitWidth) 614 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a 619 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { 622 int Diff = ShAmt-C1; 636 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), 646 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && 649 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 653 TLO.DAG.getConstant(ShAmt, ShT 695 unsigned ShAmt = SA->getZExtValue(); local 748 unsigned ShAmt = SA->getZExtValue(); local 800 unsigned ShAmt = ExVT.getScalarType().getSizeInBits(); local 990 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); local 1055 SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType()); local 1252 const APInt &ShAmt local 2649 unsigned ShAmt = d.countTrailingZeros(); local [all...] |
H A D | LegalizeVectorOps.cpp | 554 SDValue Lo, Hi, ShAmt; local 557 ShAmt = DAG.getConstant(BitOffset, TLI.getShiftAmountTy(WideVT)); 558 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt); 567 ShAmt = DAG.getConstant(SrcEltBits - BitOffset, 569 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); 586 ShAmt = DAG.getConstant(WideBits - SrcEltBits, 588 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt); 589 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt);
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H A D | DAGCombiner.cpp | 3358 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); local 3360 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, BSwap, ShAmt); 3362 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, BSwap, ShAmt); 3364 DAG.getNode(ISD::SHL, SDLoc(N), VT, BSwap, ShAmt), 3365 DAG.getNode(ISD::SRL, SDLoc(N), VT, BSwap, ShAmt)); 4536 uint64_t ShAmt = N1C->getZExtValue() + 64 - BitSize; local 4538 DAG.getConstant(~0ULL >> ShAmt, VT)); 4591 unsigned ShAmt = UnknownBits.countTrailingZeros(); local 4594 if (ShAmt) { 4596 DAG.getConstant(ShAmt, getShiftAmountT 5325 unsigned ShAmt = VTBits - EVTBits; local 6040 SDValue ShAmt = N0.getOperand(1); local 6301 unsigned ShAmt = 0; local 6539 unsigned ShAmt = VTBits - EVTBits; local 9845 unsigned ShAmt = Imm.countTrailingZeros(); local [all...] |
H A D | SelectionDAG.cpp | 2092 unsigned ShAmt = SA->getZExtValue(); local 2095 if (ShAmt >= BitWidth) 2099 KnownZero <<= ShAmt; local 2100 KnownOne <<= ShAmt; local 2102 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); 2108 unsigned ShAmt = SA->getZExtValue(); local 2111 if (ShAmt >= BitWidth) 2115 KnownZero = KnownZero.lshr(ShAmt); 2116 KnownOne = KnownOne.lshr(ShAmt); 2118 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); 2124 unsigned ShAmt = SA->getZExtValue(); local [all...] |
H A D | SelectionDAGBuilder.cpp | 4875 SDValue ShAmt = getValue(I.getArgOperand(1)); 4876 if (isa<ConstantSDNode>(ShAmt)) { 4915 ShOps[0] = ShAmt; 4917 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, ShOps); 4919 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt); 4922 getValue(I.getArgOperand(0)), ShAmt);
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineShifts.cpp | 380 Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType()); local 382 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); 708 unsigned ShAmt = Op1C->getZExtValue(); local 713 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt), 721 ComputeNumSignBits(I.getOperand(0), 0, &I) > ShAmt) { 751 unsigned ShAmt = Op1C->getZExtValue(); local 761 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { 771 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt), 795 unsigned ShAmt = Op1C->getZExtValue(); local 816 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt), [all...] |
H A D | InstCombineCompares.cpp | 948 ConstantInt *ShAmt) { 955 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); 1281 ConstantInt *ShAmt; local 1282 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : nullptr; 1287 if (ShAmt) { 1312 cast<ConstantInt>(ConstantExpr::getShl(AndCst, ShAmt)); 1314 cast<ConstantInt>(ConstantExpr::getShl(RHS, ShAmt)); 1324 NewCst = ConstantExpr::getLShr(RHS, ShAmt); 1326 NewCst = ConstantExpr::getShl(RHS, ShAmt); 1330 if (ConstantExpr::get(ShiftOpcode, NewCst, ShAmt) ! 947 FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, ConstantInt *ShAmt) argument 1492 ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1)); local 3621 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits); local 3636 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits); local 3649 uint64_t ShAmt = 0; local 3662 MaskV <<= ShAmt; local 3665 CmpV <<= ShAmt; local [all...] |
H A D | InstCombineCasts.cpp | 1091 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); 1092 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), 1093 ShAmt); 1104 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); local 1105 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); 1106 return BinaryOperator::CreateAShr(Res, ShAmt); 1133 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; local 1134 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); 1720 ConstantInt *ShAmt = nullptr; local 1722 m_ConstantInt(ShAmt)))) [all...] |
H A D | InstCombineAddSub.cpp | 1102 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); local 1103 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); 1104 return BinaryOperator::CreateAShr(NewShl, ShAmt);
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H A D | InstCombineMulDivRem.cpp | 1126 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), local 1128 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName());
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H A D | InstCombineAndOrXor.cpp | 1548 unsigned ShAmt = local 1551 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size())) 1554 unsigned ByteShift = ShAmt >> 3;
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/external/llvm/lib/Transforms/Scalar/ |
H A D | ScalarReplAggregates.cpp | 844 int ShAmt = 0; local 849 ShAmt = DL.getTypeStoreSizeInBits(NTy) - 852 ShAmt = Offset; 858 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) 860 ConstantInt::get(FromVal->getType(), ShAmt)); 861 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) 863 ConstantInt::get(FromVal->getType(), -ShAmt)); 993 int ShAmt local 1009 Mask <<= ShAmt; local [all...] |
H A D | SROA.cpp | 2239 uint64_t ShAmt = 8 * Offset; 2241 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); 2242 if (ShAmt) { 2243 V = IRB.CreateLShr(V, ShAmt, Name + ".shift"); 2268 uint64_t ShAmt = 8 * Offset; 2270 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); 2271 if (ShAmt) { 2272 V = IRB.CreateShl(V, ShAmt, Name + ".shift"); 2276 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) { 2277 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt); [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 95 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt); 457 unsigned ShAmt) { 464 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); 582 unsigned ShAmt = Log2_32(RHSC); local 584 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, 610 unsigned ShAmt = 0; local 620 ShAmt = Sh->getZExtValue(); 621 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) 624 ShAmt 455 isShifterOpProfitable(const SDValue &Shift, ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt) argument 681 unsigned ShAmt = Log2_32(RHSC); local 748 unsigned ShAmt = 0; local 813 unsigned ShAmt = 0; local 1377 unsigned ShAmt = 0; local [all...] |
H A D | ARMBaseInstrInfo.cpp | 3455 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3456 if (ShAmt == 0 || ShAmt == 2) 3486 unsigned ShAmt = DefMI->getOperand(3).getImm(); local 3487 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3) 3756 unsigned ShAmt = local 3758 if (ShAmt [all...] |
H A D | ARMISelLowering.cpp | 4075 SDValue ShAmt = Op.getOperand(2); local 4082 DAG.getConstant(VTBits, MVT::i32), ShAmt); 4083 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 4084 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 4093 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 4111 SDValue ShAmt = Op.getOperand(2); local 4116 DAG.getConstant(VTBits, MVT::i32), ShAmt); 4118 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 4120 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); 4127 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); 8405 SDValue ShAmt = N00.getOperand(1); local [all...] |
/external/llvm/lib/IR/ |
H A D | ConstantFold.cpp | 270 unsigned ShAmt = Amt->getZExtValue(); local 272 if ((ShAmt & 7) != 0) 274 ShAmt >>= 3; 277 if (ByteStart >= CSize-ShAmt) 281 if (ByteStart+ByteSize+ShAmt <= CSize) 282 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); 292 unsigned ShAmt = Amt->getZExtValue(); local 294 if ((ShAmt & 7) != 0) 296 ShAmt >>= 3; 299 if (ByteStart+ByteSize <= ShAmt) [all...] |
/external/clang/lib/Lex/ |
H A D | PPExpressions.cpp | 613 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); local 614 if (ShAmt >= LHS.getBitWidth()) 615 Overflow = true, ShAmt = LHS.getBitWidth()-1; 616 Res = LHS.Val >> ShAmt;
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/external/llvm/lib/Support/ |
H A D | APInt.cpp | 2067 APInt APInt::sshl_ov(const APInt &ShAmt, bool &Overflow) const { 2068 Overflow = ShAmt.uge(getBitWidth()); 2073 Overflow = ShAmt.uge(countLeadingZeros()); 2075 Overflow = ShAmt.uge(countLeadingOnes()); 2077 return *this << ShAmt; 2080 APInt APInt::ushl_ov(const APInt &ShAmt, bool &Overflow) const { 2081 Overflow = ShAmt.uge(getBitWidth()); 2085 Overflow = ShAmt.ugt(countLeadingZeros()); 2087 return *this << ShAmt;
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1666 SDValue ShAmt = Op.getOperand(2); local 1676 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 1678 ShAmt); 1694 DAG.getConstant(VTBits, MVT::i32), ShAmt); 1695 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); 1696 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, 1702 SDValue Cmp = DAG.getSetCC(dl, MVT::i1, ShAmt, 1704 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); 1727 SDValue ShAmt = Op.getOperand(2); local 1737 ShAmt); [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 1342 unsigned ShAmt = MO3.getImm(); 1343 if (ShAmt) { 1344 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); 1345 O << ", lsl " << markup("<imm:") << "#" << ShAmt << markup(">");
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/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 2470 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { argument 2476 return ShAmt < 4 && ShAmt > 0; 2593 unsigned ShAmt = MI->getOperand(2).getImm(); local 2594 MIB.addReg(0).addImm(1 << ShAmt) 2698 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 2699 if (!isTruncatedShiftCountForLEA(ShAmt)) return nullptr; 2709 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0); 2714 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 2715 if (!isTruncatedShiftCountForLEA(ShAmt)) retur 2740 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local 4181 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local [all...] |
H A D | X86ISelLowering.cpp | 11348 SDValue ShAmt = Op.getOperand(2); local 11352 SDValue SafeShAmt = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt, 11360 Tmp2 = DAG.getNode(X86ISD::SHLD, dl, VT, ShOpHi, ShOpLo, ShAmt); 11363 Tmp2 = DAG.getNode(X86ISD::SHRD, dl, VT, ShOpLo, ShOpHi, ShAmt); 11370 SDValue AndNode = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt, 12601 unsigned ShAmt = Op->getConstantOperandVal(1); local 12602 if (ShAmt >= BitWidth) // Avoid undefined shifts. 12605 ? APInt::getHighBitsSet(BitWidth, BitWidth - ShAmt) 12606 : APInt::getLowBitsSet(BitWidth, BitWidth - ShAmt); 14596 SDValue SrcOp, SDValue ShAmt, 14595 getTargetVShiftNode(unsigned Opc, SDLoc dl, MVT VT, SDValue SrcOp, SDValue ShAmt, SelectionDAG &DAG) argument 16066 SDValue ShAmt = local 16177 uint64_t ShAmt = 0; local 16405 uint64_t ShAmt = C.getZExtValue(); local [all...] |
/external/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 1599 uint64_t ShAmt = 8 * Offset; local 1602 ShAmt = 8 * (DL.getTypeStoreSize(IntTy) - 1604 if (ShAmt) { 1605 V = CreateLShr(V, ShAmt, Name + ".shift");
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/external/llvm/lib/Analysis/ |
H A D | ValueTracking.cpp | 1952 const APInt *ShAmt; local 1953 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1954 Tmp += ShAmt->getZExtValue(); 1960 const APInt *ShAmt; local 1961 if (match(U->getOperand(1), m_APInt(ShAmt))) { 1964 Tmp2 = ShAmt->getZExtValue();
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