/external/llvm/lib/Target/BPF/ |
H A D | BPFISelLowering.h | 77 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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/external/llvm/lib/Target/R600/ |
H A D | SIISelLowering.h | 73 unsigned SrcAlign, bool IsMemset,
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H A D | SIISelLowering.cpp | 337 unsigned SrcAlign, bool IsMemset, 336 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCalls.cpp | 64 unsigned SrcAlign = getKnownAlignment(MI->getArgOperand(1), DL, MI, AC, DT); local 65 unsigned MinAlign = std::min(DstAlign, SrcAlign); 138 SrcAlign = std::max(SrcAlign, CopyAlign); 144 L->setAlignment(SrcAlign);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 311 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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H A D | AArch64ISelLowering.cpp | 6698 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument 6700 return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) && 6705 unsigned SrcAlign, bool IsMemset, 6716 (memOpAlign(SrcAlign, DstAlign, 16) || 6721 (memOpAlign(SrcAlign, DstAlign, 8) || 6726 (memOpAlign(SrcAlign, DstAlign, 4) || 6704 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 273 unsigned DstAlign, unsigned SrcAlign,
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H A D | ARMISelLowering.cpp | 9898 static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign, argument 9900 return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) && 9905 unsigned DstAlign, unsigned SrcAlign, 9916 (memOpAlign(SrcAlign, DstAlign, 16) || 9920 (memOpAlign(SrcAlign, DstAlign, 8) || 9904 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 522 unsigned SrcAlign,
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H A D | MipsISelLowering.cpp | 3542 unsigned SrcAlign, 3541 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 582 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 591 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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H A D | PPCISelLowering.cpp | 11061 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 11070 unsigned DstAlign, unsigned SrcAlign, 11079 (!SrcAlign || SrcAlign >= 32) && (!DstAlign || DstAlign >= 32) && 11087 (((!SrcAlign || SrcAlign >= 16) && (!DstAlign || DstAlign >= 16)) || 11069 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 593 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 601 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
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H A D | X86ISelLowering.cpp | 1687 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 1697 unsigned DstAlign, unsigned SrcAlign, 1707 (SrcAlign == 0 || SrcAlign >= 16)))) { 1696 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, MachineFunction &MF) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 3903 unsigned DstAlign, unsigned SrcAlign, 3910 assert((SrcAlign == 0 || SrcAlign >= DstAlign) && 3912 // If 'SrcAlign' is zero, that means the memory operation does not need to 3919 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, 4028 unsigned SrcAlign = DAG.InferPtrAlignment(Src); local 4029 if (Align > SrcAlign) 4030 SrcAlign = Align; 4038 (isZeroStr ? 0 : SrcAlign), 4104 false, MinAlign(SrcAlign, SrcOf 3901 FindOptimalMemOpLowering(std::vector<EVT> &MemOps, unsigned Limit, uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, bool AllowOverlap, SelectionDAG &DAG, const TargetLowering &TLI) argument 4141 unsigned SrcAlign = DAG.InferPtrAlignment(Src); local [all...] |
H A D | LegalizeDAG.cpp | 1780 unsigned SrcAlign = 1783 SDValue FIPtr = DAG.CreateStackTemporary(SlotVT, SrcAlign); 1801 PtrInfo, SlotVT, false, false, SrcAlign); 1805 PtrInfo, false, false, SrcAlign);
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/external/llvm/lib/Transforms/Scalar/ |
H A D | SROA.cpp | 3001 unsigned SrcAlign = OtherAlign; 3006 std::swap(SrcAlign, DstAlign); 3020 IRB.CreateAlignedLoad(SrcPtr, SrcAlign, II.isVolatile(), "copyload");
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