| 6b56140b4bafcef8bea5ca67cb31023a533c3bd4 |
|
27-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
i965: Mark needed downsamples for msaa winsys buffers
Add function intel_renderbuffer_set_needs_downsample. It is a no-op
except on multisample winsys buffers shared with DRI2.
Mark the needed downsamples with the new function at two locations:
- Immediately after drawing is complete.
- After blitting.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| e2f2376e884225705e2369caee4a8c4e90e938f3 |
|
12-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Set num samples for winsys renderbuffers
Add a new param, num_samples, to intel_create_renderbuffer and
intel_create_private_renderbuffer.
No multisample GL config is yet advertised, so the value of num_samples is
currently 0. For server-owned winsys buffers, gl_renderbuffer::NumSamples
is not yet used.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 53fa28f7b1f21251a3807abf1f234f52beff0256 |
|
11-Jul-2012 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Refactor quantize_num_samples
Rename quantize_num_samples to intel_quantize_num_samples and change the
first param from struct intel_context* to struct intel_screen*. The
function will later be used by intelCreateBuffer, which is not bound to
any context but is bound to a screen.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 9bbf7c139bb02fe9fc3822bf2ca9ac5963d0d5af |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Remove dead intel_framebuffer_has_hiz().
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 433ff3e16e8e090fd3a1bf427e61f3e5971a5740 |
|
04-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Add a function for creating a private window system buffer.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 434fc8bde41f07687ad8941ceba03c4b3e0e75bb |
|
27-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Add extern "C" declarations to headers
These declarations are necessary to allow C++ code to call C code
without causing unresolved symbols (which would make the driver fail
to load).
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 3ec0e55b63db3c1067f3bbf4563beb3b98a19288 |
|
15-Apr-2012 |
Paul Berry <stereotype441@gmail.com> |
i965: Fix mipmap offsets for HiZ and separate stencil buffers.
When rendering to a miplevel other than 0 within a color, depth,
stencil, or HiZ buffer, we need to tell the GPU to render to an offset
within the buffer, so that the data is written into the correct
miplevel. We do this using a coarse offset (in pages), and a fine
adjustment (the so-called "tile_x" and "tile_y" values, which are
measured in pixels).
We have always computed the coarse offset and fine adjustment using
intel_renderbuffer_tile_offsets() function. This worked fine for
color and combined depth/stencil buffers, but failed to work properly
when HiZ and separate stencil were in use. It failed to work because
there is only one set of fine adjustment controls shared by the HiZ,
depth, and stencil buffers, so we need to choose tile_x and tile_y
values that are compatible with the tiling of all three buffers, and
then compute separate coarse offsets for each buffer.
This patch fixes the HiZ and separate stencil case by replacing the
call to intel_renderbuffer_tile_offsets() with calls to two functions:
intel_region_get_tile_masks(), which determines how much of the
adjustment can be performed using offsets and how much can be
performed using tile_x and tile_y, and
intel_region_get_aligned_offset(), which computes the coarse offset.
intel_region_get_tile_offsets() is still used for color renderbuffers,
so to avoid code duplication, I've re-worked it to use
intel_region_get_tile_masks() and intel_region_get_aligned_offset().
On i965 Gen6, fixes piglit tests
"texturing/depthstencil-render-miplevels 1024 X" where X is one of
(depth, depth_and_stencil, depth_stencil_single_binding, depth_x,
depth_x_and_stencil, stencil, stencil_and_depth, stencil_and_depth_x).
On i965 Gen7, the variants of
"texturing/depthstencil-render-miplevels" that contain a stencil
buffer still fail, due to another problem: Gen7 seems to ignore the 3
LSB's of the tile_y adjustment (and possibly also tile_x).
v2: Removed spurious comments. Added assertions to check
preconditions of intel_region_get_aligned_offset().
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| e2dce7f7ee3e7da9cbb0bb33307ecd79e824426d |
|
10-Feb-2012 |
Eric Anholt <eric@anholt.net> |
intel: Fix rendering from textures after RenderTexture().
There's a serious trap for drivers: RenderTexture() does not indicate
that the texture is currently bound to the draw buffer, despite
FinishRenderTexture() signaling that the texture is just now being
unbound from the draw buffer.
We were acting as if RenderTexture() *was* the start of rendering and
that we could make texturing incoherent with the current contents of
the renderbuffer. This caused intel oglconform sRGB
Mipmap.1D_textures to fail, because we got a call to TexImage() and
thus RenderTexture() on a texture bound to a framebuffer that wasn't
the draw buffer, so we skipped validating the new image into the
texture object used for rendering.
We can't (easily) make RenderTexture() indicate the start of drawing,
because both our driver and gallium are using it as the moment to set
up the renderbuffer wrapper used for things like MapRenderbuffer().
Instead, postpone the setup of the workaround render target miptree
until update_renderbuffer time, so that we no longer need to skip
validation of miptrees used as render targets. As a bonus, this
should make GL_NV_texture_barrier possible.
(This also fixes a regression in the gen4 small-mipmap rendering since
3b38b33c1648b07e75dc4d8340758171e109c598, which switched
set_draw_offset from image->mt to irb->mt but didn't move the irb->mt
replacement up before set_draw_offset).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44961
NOTE: This is a candidate for the 8.0 branch.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 9f8ed9d66298e2dc5dff508e3ea723469fe06d93 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: derive intel_renderbuffer from swrast_renderbuffer
Drivers that rely on swrast need to do this, as with swrast_texture_image.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0 |
|
16-Jan-2012 |
Brian Paul <brianp@vmware.com> |
intel: use intel_rb_format() to get renderbuffer format
This will make future changes cleaner and less invasive.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 0c498467104e361e50bbb95adf2b2c0e799591dc |
|
08-Dec-2011 |
Eric Anholt <eric@anholt.net> |
intel: Stop creating the wrapped depth irb.
All the operations were just trying to get at irb->wrapped_depth->mt,
which is the same as irb->mt now.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 0b8b6c7e974930daf12e97fb8f0b2a2cc29396d9 |
|
08-Dec-2011 |
Eric Anholt <eric@anholt.net> |
intel: Stop creating the wrapped stencil irb.
There were only two places it was really used at this point, which was
in the batchbuffer emit of the separate stencil packets for gen6/7.
Just write in the ->stencil_mt reference in those two places and ditch
all this flailing around with allocation and refcounts.
v2: Fix separate stencil on gen7.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 96159c37e3e8c966dba7cf7fe70875372dd12293 |
|
30-Nov-2011 |
Eric Anholt <eric@anholt.net> |
intel: Rely on miptree mapping for all renderbuffer maps.
Now that all RBs have miptrees, and miptree mapping covered these last
two code paths, consistently use them.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 1383e56bd916f9fc4357a6224aac4e8c691303cb |
|
17-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Add resolve functions for renderbuffers
Add the following functions:
intel_renderbuffer_resolve_hiz
intel_renderbuffer_resolve_depth
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 3b38b33c1648b07e75dc4d8340758171e109c598 |
|
15-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Remove unneeded params from intel_renderbuffer_set_draw_offset()
Since the renderbuffer tracks the miptree level and layer that it wraps,
the 'tex_image' and 'zoffset' params are no longer needed to calculate the draw
offsets.
Not only are they no longer needed, but their presence would prevent
calculating the renderbuffer draw offsets in situations where there were
no texture image. Such situations will occur during the HiZ meta-op and
during scatter/gather of separate stencil textures.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 24da7335b22432ef4c2d57cab86e4b8fbe8733d5 |
|
15-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Track the miptree layer wrapped by a renderbuffer [v2]
TODO: Make v2 for kwg.
Add two fields to intel_renderbuffer:
mt_level
mt_layer
Multiple renderbuffers may simultaneously wrap a single texture and each
provide a different view into that texture. [Consider
glFramebufferTextureLayer()]. The new fields indicate which slice of the
miptree is wrapped by the renderbuffer.
The buffer resolve operations, to be introduced in the future, require
these fields in order to resolve the correct slice in the miptree.
To add the fields, it was necessary to replace the type of some function
parameters from gl_texture_image to gl_renderbuffer_attachment.
v2: [kwg] Replace confusing condition `CubeMapFace > 0` with the more
sensible `Target == GL_TEXTURE_CUBE_MAP`.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| da2816a45e6e3a33246a341fee72e6f893f315d9 |
|
16-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Replace intel_renderbuffer::region with a miptree [v3]
Essentially, this patch just globally substitutes `irb->region` with
`irb->mt->region` and then does some minor cleanups to avoid segfaults
and other problems.
This is in preparation for
1. Fixing scatter/gather for mipmapped separate stencil textures.
2. Supporting HiZ for mipmapped depth textures.
As a nice benefit, this lays down some preliminary groundwork for easily
texturing from any renderbuffer, even those of the window system.
A future commit will replace intel_mipmap_tree::hiz_region with a miptree.
v2:
- Return early in intel_process_dri2_buffer_*() if region allocation
fails.
- Fix double semicolon.
- Fix miptree reference leaks in the following functions:
intel_process_dri2_buffer_with_separate_stencil()
intel_image_target_renderbuffer_storage()
v3:
- [anholt] Fix check for hiz allocation failure. Replace
``if (!irb->mt)` with ``if(!irb->mt->hiz_region)``.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| c3c7cbd15418293208034e8970d626b5998abd4b |
|
14-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Move inline functions from intel_fbo.h to .c
Move the following inline functions:
intel_get_rb_region
intel_framebuffer_has_hiz
A future commit will replace the renderbuffer's region with a miptree.
This small refactor will eliminate the need for intel_fbo.h to include
intel_mipmap_tree.h on that commit. I'd like to avoid the situation where
each header transitively includes every other header.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 19faa12bb751eabc1590d042adbd345b89542de0 |
|
14-Nov-2011 |
Chad Versace <chad.versace@linux.intel.com> |
intel: Kill intel_framebuffer_get_hiz_region()
The only user of intel_framebuffer_get_hiz_region() was
intel_framebuffer_has_hiz(). So I folded the body of the former into the
latter.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 87ac3ae50e925f31677579737d6d97cb3cb15259 |
|
05-Nov-2011 |
Brian Paul <brianp@vmware.com> |
mesa: fix comment typo in intel_renderbuffer
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| eab201bad4d4f250ca9318a228d1c71561daee1a |
|
19-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i965/gen6: Improve glReadPixels() performance by blitting to a linear temp.
The readpixels microbenchmark in mesa-demos goes from 47Mpix/sec at
1000x1000 to 450Mpix/sec. The 10x10 sizes stay about the same.
Reviewed-by: Brian Paul <brianp@vmware.com>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 92054cd94e2188c9f4d56ddf9377c5aeb8a4e64e |
|
11-Oct-2011 |
Eric Anholt <eric@anholt.net> |
intel: Add an implementation of MapRenderbuffer.
v2: Add separate stencil S8 W-tile swizzling/deswizzling. Tested for
the swizzling case with env INTEL_SEPARATE_STENCIL=1 INTEL_HIZ=1
./bin/hiz-depth-stencil-test-fbo-d24-s8
v3: Apply Chad's fix for S8 window system buffers.
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 1a8111aea43b714609a20c1cb841ca58ae10dd83 |
|
26-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Silence "intel/intel_fbo.h:105:4: warning: comparison of unsigned expression < 0 is always false"
The test was of an enum, attIndex, which should be unsigned. The
explicit check for < 0 was replaced with a cast to unsigned in an
assertion that attIndex is less than the size of the array it will be
used to index.
Reviewed-by: Eric Anholt <eric@anholt.net>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| f73caddd3339d284556036d031ab30ce8057a510 |
|
26-Jul-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
i965: Remove the now unused intel_renderbuffer::draw_offset field.
The previous commit removed the last use of this field.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| c7ef5e8498550e6ed4d609641ca6deb932882485 |
|
29-Jun-2011 |
Eric Anholt <eric@anholt.net> |
intel: Remove now trivial intel_renderbuffer_set_{hiz_,}region().
As a result of this cleanup, a bug in
intel_process_dri2_buffer_no_separate_stencil() became quite apparent.
We were associating the NULL pointer after an unreference with the
STENCIL attachment -- clarify the logic and attach the right region.
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 5cd4d8551778e1b371397ad4a1144a1c0b9f436f |
|
22-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Declare some functions in intel_fbo.c as non-static
... because they will be needed by intel_tex_image_s8z24_create_renderbuffers.
Redeclared functions are:
intel_alloc_renderbuffer_storage
intel_renderbuffer_set_draw_offsets
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 8869a2623775a4879ac310d7073f184b7d45eed1 |
|
21-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Change signature of intel_create_wrapped_renderbuffer
Redeclare as non-static because
intel_tex_image_s8z24_create_renderbuffers will use it.
Remove the 'wrapper' parameter, because there is no wrapper for
intel_texture_image.depth_rb and stencil_rb.
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 39d0e3632a4ccb10f2ce6578151e854ba52d3c0e |
|
16-Jun-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add fields to intel_renderbuffer for unwrapping packed depth/stencil buffers
Add the following fields:
intel_renderbuffer.wrapped_depth;
intel_renderbuffer.wrapped_stencil
If the intel_context is using separate stencil and the renderbuffer has
a packed depth/stencil format, then wrapped_depth and wrapped_stencil are
the real renderbuffers.
Alter the following functions to accomodate the wrapped buffers:
intel_delete_renderbuffer
intel_draw_buffer
intel_get_renderbuffer
intel_renderbuffer_map
intel_renderbuffer_unmap
Subsequent commits allocate renderbuffer storage for wrapped_depth and
wrapped_stencil.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| b17aab5753a6d14c9e757bedb186963b2dae8823 |
|
31-May-2011 |
Eric Anholt <eric@anholt.net> |
intel: Move the draw_x/draw_y to the renderbuffer where it belongs.
It was originally located in the region because the tracking of
depth/color buffers was on the regions, and getting back to the irb
would have been tricky. Now, we're keying off of the renderbuffer in
more places, which means we can move these fields where they belong.
This could fix potential rendering failure with a single texture
having multiple images attached to different renderbuffers across
shareCtx (as far as I can tell, this was the only failure we could
cause, since anything else should trigger intel_render_texture in
between, for example a BindFramebuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 84294fe26ca5860c34e6541f633be4d093ab57f2 |
|
31-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add function intel_renderbuffer_set_hiz_region()
It's the analog of intel_renderbuffer_set_region(), but for the hiz region
of course.
CC: Ian Romanick <idr@freedesktop.org>
CC: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 7c0e6d9bbc11f7802c81df048eb721b5e15e8ece |
|
23-May-2011 |
Chad Versace <chad@chad-versace.us> |
intel: Add hiz_region to intel_renderbuffer
A hiz surface must be supplied to the hardware when rendering to a depth
buffer with hiz. There are three potential places to store that surface:
1. Allocate a larger intel_region for the depthbuffer, and let the
region's tail be the hiz surface.
2. Allocate a separate intel_region for hiz, and store it as
brw_context state.
3. Allocate a separate intel_region for hiz, and store it in
intel_renderbuffer.
We choose method 3.
Method 1 has not been chosen due to future complications it might cause
when requesting a DRI drawable's depth buffer attachment from X.
Method 2 has not been chosen because storing the hiz region apart from
the depth region makes lazy hiz/depth resolves difficult to implement.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| ce914fff0817cb3c25a2d715f8435c6b6d6fbcdd |
|
05-May-2010 |
Eric Anholt <eric@anholt.net> |
i965: When an RB gets a new region, clear the old from the state cache.
This prevents memory usage explosion in blender due to the state cache
hanging on to old fake frontbuffer regions. Sigh at blender still
using frontbuffer rendering.
Bug #24119.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| bb35000b4b6dfe60048b2f5d60bc102c4a7fd791 |
|
05-Mar-2010 |
Eric Anholt <eric@anholt.net> |
intel: Remove non-kernel-exec-fencing support.
Shaves 60k off the driver from removing the broken spans code. This
means we now require 2.6.29, which seems fair given that it's a year
old and we've removed support for non-KMS already in the last release
of 2D.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| d282128ff68cc58bc3f5b808031c5fe7325bd69b |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove struct intel_framebuffer
With the vsync fields no longer relevant and by refactoring the code
to no longer use color_rb[0-1] we can just use struct gl_framebuffer
directly.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| a6e1d3edac90016ca9662ca0a9707a2d4fba1726 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove client-side vblank code
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|
| 3078bd136d6ee1d9ad16b4c834cad23b005304a4 |
|
08-Dec-2009 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Axe intel_renderbuffer::texformat
Since the texformat branch merge, the value of intel_renderbuffer::texformat
is just a copy of gl_renderbuffer::Format.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 4a253431abf43a0638afb43605b44a8742b72a60 |
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30-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: update intel_create_renderbuffer(format), add XRGB support
Pass a gl_format to intel_create_renderbuffer() instead of GLenum.
Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers.
However, we don't yet create any renderbuffers or textures with that
format. It seems the default alpha value is zero instead of one.
Need to investigate that first.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 1f7c914ad0beea8a29c1a171c7cd1a12f2efe0fa |
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01-Oct-2009 |
Brian Paul <brianp@vmware.com> |
mesa: replace gl_texture_format with gl_format
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum.
ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x.
gl_texture_format will go away next.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 2c30fd84dfa052949a117c78d932b58c1f88b446 |
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10-Apr-2009 |
Eric Anholt <eric@anholt.net> |
intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.
Also enable them all regardless of screen bpp, as 32 bpp what I've been
testing against, and haven't been able to detect any screen bpp-specific
troubles with them.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| bd944ef78397fd96dc2b239f542066643b06274a |
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29-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove unused RenderToTexture field
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 818bda3d7428469d7c29ebc08c31c30a877747e1 |
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29-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove unused intel_rendering_to_texture()
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 65d39a9eed9ae60944dd3c5db392a382c5946cbc |
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27-Jan-2009 |
Eric Anholt <eric@anholt.net> |
intel: clean up more pf mess.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| f8a7e497acf17cfdefe401815c7063aaf39d4200 |
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22-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: remove/disable the "paired depth/stencil" code
We only allow combined depth+stencil renderbuffers so the complicated code
for splitting and combining separate depth and stencil buffers is no longer
needed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| f8b00806d8263f2ff09f175e0801379c0b9e9b2c |
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22-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: inline some renderbuffer functions
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| b5da7feee03abd7ca52312476bd75d28d1afddf4 |
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14-Jan-2009 |
Owain G. Ainsworth <oga@openbsd.org> |
Remove intel pageflipping support in its entirety.
It's been broken and deprecated for a while, so it's time to die. This has the
wonderful benefit of cleaning up the code a fair amount; making it marginally
less twisty.
I'm unsure if the for loops in IntelWindowMoved are still needed.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 345a08a77fa16f58ef956c896f1bf5f4cf118243 |
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16-Jan-2009 |
Brian Paul <brianp@vmware.com> |
intel: added intel_rendering_to_texture() helper function.
When we're rendering to textures we have to invert the viewport transformation.
This helper cleans up that test and can be used elsewhere...
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| f75843a517bd188639e6866db2a7b04de3524e16 |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
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24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 2e3714380027252ba17a11f23eae851d3f77ab02 |
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23-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel: Add a little span cache to spead up readpixels by cutting syscalls.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| d2d5abfaeb46fc7b4d4267a6c9e92420fc9b5334 |
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23-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Use pread/pwrite for span access.
This will avoid clflushing entire buffers for small acesses, such as those
commonly used by regression tests.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 2e841880cfc1006a2818d4a8bfefd21136dc39a9 |
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11-Jul-2008 |
Eric Anholt <eric@anholt.net> |
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 19f585a3cf65887e249d630fe43e83e7e7618dfa |
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02-Jul-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Fix Y-tiling span setup.
The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode. Instead, guess the correct
tiling in screen setup.
Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is
32 scanlines, not 8.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 537bbe6dec780f6f85838fe7e6036579c509f8a6 |
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06-May-2008 |
Keith Packard <keithp@keithp.com> |
[intel-GEM] Add tiling support to swrast.
Accessing tiled surfaces without using the fence registers requires that
software deal with the address swizzling itself.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| c741d287ecce1bd95d4e024d60e274abfcfbe22f |
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15-Feb-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Allow attIndex to be negative to avoid defeating the >= 0 check.
Otherwise, we would go wildly out of bounds if passed -1 (no renderbuffer), such
as while doing LOCK_HARDWARE with glDrawBuffer(GL_NONE).
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| e131c46b20241737ceba4856dbe01dcca6dd2c03 |
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09-Jan-2008 |
Kristian Høgsberg <krh@temari.boston.redhat.com> |
[intel] Simplify intelCreateBuffer() a bit.
Drop a bunch of unused arguments from intel_create_renderbuffer() and
introduce intel_renderbuffer_set_region() to set the region for
a renderbuffer.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 5ef6803b7a902e7faa0e77408a43eabc408ff547 |
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17-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move additional code to be shared from intel_context.h to intel/.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
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| 77a5bcaff43df8d54e0e0ef833726e4b41d7eb36 |
|
07-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[intel] Move over files that will be shared with 965-fbo work.
/external/mesa3d/src/mesa/drivers/dri/intel/intel_fbo.h
|