Searched defs:OpInfo (Results 1 - 25 of 28) sorted by relevance

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/external/llvm/utils/TableGen/
H A DAsmWriterInst.cpp169 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; local
171 unsigned MIOp = OpInfo.MIOperandNo;
172 Operands.emplace_back(OpInfo.PrinterMethodName, MIOp, Modifier);
H A DInstrInfoEmitter.cpp58 const OperandInfoMapTy &OpInfo,
463 const OperandInfoMapTy &OpInfo,
544 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second;
460 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
H A DCodeGenDAGPatterns.cpp2779 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); local
2780 if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1)
2782 return OpInfo.getEnumName() == "ISD::BITCAST";
/external/swiftshader/third_party/LLVM/utils/TableGen/
H A DAsmWriterInst.cpp202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; local
204 unsigned MIOp = OpInfo.MIOperandNo;
205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
H A DInstrInfoEmitter.cpp255 const OperandInfoMapTy &OpInfo,
331 OS << "OperandInfo" << OpInfo.find(OperandInfo)->second;
252 emitRecord(const CodeGenInstruction &Inst, unsigned Num, Record *InstrInfo, std::map<std::vector<Record*>, unsigned> &EmittedLists, const OperandInfoMapTy &OpInfo, raw_ostream &OS) argument
H A DAsmMatcherEmitter.cpp1396 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i]; local
1399 int TiedOp = OpInfo.getTiedRegister();
1406 int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
1407 if (OpInfo.Name.empty() || SrcOperand == -1)
1409 TheDef->getName() + "' has operand '" + OpInfo.Name +
1413 unsigned NumOperands = OpInfo.MINumOperands;
1422 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name &&
1438 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i]; local
1441 int TiedOp = OpInfo->getTiedRegister();
1448 const std::string &OpName = OpInfo
1544 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i]; local
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H A DFixedLenDecoderEmitter.cpp345 OperandInfo &OpInfo);
739 OperandInfo &OpInfo) {
740 std::string &Decoder = OpInfo.Decoder;
742 if (OpInfo.numFields() == 1) {
743 OperandInfo::iterator OI = OpInfo.begin();
749 for (OperandInfo::iterator OI = OpInfo.begin(), OE = OpInfo.end();
1319 OperandInfo OpInfo(Decoder);
1334 OpInfo.addField(Base, Width, Offset);
1345 OpInfo
738 emitBinaryParser(raw_ostream &o, unsigned &Indentation, OperandInfo &OpInfo) argument
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H A DCodeGenDAGPatterns.cpp2414 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator()); local
2415 if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1)
2417 return OpInfo.getEnumName() == "ISD::BITCAST";
2446 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N->getOperator()); local
2449 if (OpInfo.hasProperty(SDNPMayStore)) mayStore = true;
2450 if (OpInfo.hasProperty(SDNPMayLoad)) mayLoad = true;
2451 if (OpInfo.hasProperty(SDNPSideEffect)) HasSideEffects = true;
2452 if (OpInfo.hasProperty(SDNPVariadic)) IsVariadic = true;
/external/llvm/include/llvm/Bitcode/
H A DBitCodes.h175 void Add(const BitCodeAbbrevOp &OpInfo) { argument
176 OperandList.push_back(OpInfo);
/external/skia/include/private/
H A DGrAuditTrail.h105 struct OpInfo { struct in class:GrAuditTrail
116 void getBoundsByClientID(SkTArray<OpInfo>* outInfo, int clientID);
117 void getBoundsByOpListID(OpInfo* outInfo, int opListID);
147 void copyOutFromOpList(OpInfo* outOpInfo, int opListID);
/external/swiftshader/third_party/LLVM/include/llvm/Bitcode/
H A DBitCodes.h179 void Add(const BitCodeAbbrevOp &OpInfo) { argument
180 OperandList.push_back(OpInfo);
/external/swiftshader/third_party/LLVM/lib/Transforms/Utils/
H A DAddrModeMatcher.cpp385 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; local
388 TLI.ComputeConstraintToUse(OpInfo, SDValue());
392 if (OpInfo.CallOperandVal == OpVal &&
393 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
394 !OpInfo.isIndirect))
/external/llvm/lib/Analysis/
H A DCostModel.cpp125 TargetTransformInfo::OperandValueKind OpInfo = local
130 OpInfo = TargetTransformInfo::OK_NonUniformConstantValue;
132 OpInfo = TargetTransformInfo::OK_UniformConstantValue;
135 return OpInfo;
/external/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.h416 const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo]; local
418 if (OpInfo.RegClass == -1) {
420 assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE);
424 return RI.getRegClass(OpInfo.RegClass)->getSize();
454 /// definition \p OpInfo. Note this does not attempt to validate constant bus
457 const MCOperandInfo &OpInfo,
463 const MCOperandInfo &OpInfo,
/external/skia/src/gpu/instanced/
H A DInstancedRenderingTypes.h118 struct OpInfo { struct in namespace:gr_instanced
119 OpInfo() : fData(0) {} function in struct:gr_instanced::OpInfo
120 explicit OpInfo(uint32_t data) : fData(data) {} function in struct:gr_instanced::OpInfo
122 static bool CanCombine(const OpInfo& a, const OpInfo& b);
148 inline bool OpInfo::CanCombine(const OpInfo& a, const OpInfo& b) {
163 inline OpInfo operator|(const OpInfo
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/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_target.h139 struct OpInfo struct in class:nv50_ir::Target
141 OpInfo *variants;
161 inline const OpInfo& getOpInfo(const Instruction *) const;
162 inline const OpInfo& getOpInfo(const operation) const;
210 OpInfo opInfo[OP_LAST + 1];
213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const
218 const Target::OpInfo& Target::getOpInfo(const operation op) const
/external/swiftshader/third_party/LLVM/include/llvm/MC/
H A DMCInstrDesc.h145 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands member in class:llvm::MCInstrDesc
152 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
154 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
307 if (OpInfo[i].isPredicate())
/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/
H A DCodeGenPrepare.cpp929 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i]; local
932 TLI->ComputeConstraintToUse(OpInfo, SDValue());
934 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
935 OpInfo.isIndirect) {
938 } else if (OpInfo.Type == InlineAsm::isInput)
/external/llvm/include/llvm/MC/
H A DMCInstrDesc.h149 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands member in class:llvm::MCInstrDesc
165 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
167 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
540 if (OpInfo[i].isPredicate())
/external/clang/lib/CodeGen/
H A DCGExprComplex.cpp833 BinOpInfo OpInfo; local
838 OpInfo.Ty = E->getComputationResultType();
839 QualType ComplexElementTy = cast<ComplexType>(OpInfo.Ty)->getElementType();
846 OpInfo.RHS = ComplexPairTy(CGF.EmitScalarExpr(E->getRHS()), nullptr);
849 .hasSameUnqualifiedType(OpInfo.Ty, E->getRHS()->getType()));
850 OpInfo.RHS = Visit(E->getRHS());
859 OpInfo.LHS = EmitComplexToComplexCast(LHSVal, LHSTy, OpInfo.Ty, Loc);
867 OpInfo.LHS = ComplexPairTy(LHSVal, nullptr);
869 OpInfo
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H A DCGExprScalar.cpp2097 BinOpInfo OpInfo; local
2104 OpInfo.RHS = Visit(E->getRHS());
2105 OpInfo.Ty = E->getComputationResultType();
2106 OpInfo.Opcode = E->getOpcode();
2107 OpInfo.FPContractable = E->isFPContractable();
2108 OpInfo.E = E;
2121 switch (OpInfo.Opcode) {
2148 EmitScalarConversion(OpInfo.RHS, E->getRHS()->getType(), LHSTy,
2160 OpInfo.LHS = EmitLoadOfLValue(LHSLV, E->getExprLoc());
2161 OpInfo
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp566 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
571 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {
572 if (i > 0 && OpInfo[i-1].isPredicate()) continue;
633 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
638 if (OpInfo[i].isPredicate()) {
672 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
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/external/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp574 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
579 if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {
580 if (i > 0 && OpInfo[i-1].isPredicate()) continue;
645 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
650 if (OpInfo[i].isPredicate()) {
682 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo; local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2816 AsmOperandInfo &OpInfo = ConstraintOperands.back(); local
2819 if (OpInfo.multipleAlternatives.size() > maCount)
2820 maCount = OpInfo.multipleAlternatives.size();
2822 OpInfo.ConstraintVT = MVT::Other;
2825 switch (OpInfo.Type) {
2828 if (OpInfo.isIndirect) {
2829 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
2838 OpInfo.ConstraintVT = getValueType(STy->getElementType(ResNo));
2841 OpInfo.ConstraintVT = getValueType(CS.getType());
2846 OpInfo
2905 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local
2953 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local
3093 ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, const TargetLowering &TLI, SDValue Op, SelectionDAG *DAG) argument
3144 ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2424 AsmOperandInfo &OpInfo = ConstraintOperands.back(); local
2427 if (OpInfo.multipleAlternatives.size() > maCount)
2428 maCount = OpInfo.multipleAlternatives.size();
2430 OpInfo.ConstraintVT = MVT::Other;
2433 switch (OpInfo.Type) {
2436 if (OpInfo.isIndirect) {
2437 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
2446 OpInfo.ConstraintVT =
2450 OpInfo.ConstraintVT = getSimpleValueType(DL, CS.getType());
2455 OpInfo
2515 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local
2563 AsmOperandInfo& OpInfo = ConstraintOperands[cIndex]; local
2702 ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo, const TargetLowering &TLI, SDValue Op, SelectionDAG *DAG) argument
2752 ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG) const argument
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