/external/compiler-rt/lib/esan/ |
H A D | esan_circular_buffer.h | 41 StartIdx = 0; 50 uptr ArrayIdx = (StartIdx + Idx) % Capacity; 55 uptr ArrayIdx = (StartIdx + Idx) % Capacity; 60 uptr ArrayIdx = (StartIdx + Count) % Capacity; 65 StartIdx = (StartIdx + 1) % Capacity; 69 uptr ArrayIdx = (StartIdx + Count - 1) % Capacity; 80 StartIdx = 0; 92 uptr StartIdx; member in class:__esan::CircularBuffer
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/external/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.cpp | 395 assert((StartIdx < getHighBitIdx()) && "Overflow, switch to APInt?"); 402 OS << "[" << StartIdx << ", " << getHighBitIdx() << "], RegBank = "; 427 APInt PartMapMask = APInt::getBitsSet(OrigValueBitWidth, PartMap.StartIdx, 529 int StartIdx = OpToNewVRegIdx[OpIdx]; 531 if (StartIdx == OperandsMapper::DontKnowIdx) { 535 StartIdx = NewVRegs.size(); 536 OpToNewVRegIdx[OpIdx] = StartIdx; 541 getNewVRegsEnd(StartIdx, NumPartialVal); 543 return make_range(&NewVRegs[StartIdx], End); 547 RegisterBankInfo::OperandsMapper::getNewVRegsEnd(unsigned StartIdx, [all...] |
/external/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.h | 39 /// The StartIdx and Length represent what region of the orginal 42 /// at StartIdx bit and spanning Length bits. 43 /// StartIdx is the number of bits from the less significant bits. 48 unsigned StartIdx; member in struct:llvm::RegisterBankInfo::PartialMapping 51 /// from StartIdx to StartIdx + Length -1. 59 PartialMapping(unsigned StartIdx, unsigned Length, argument 61 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {} 65 unsigned getHighBitIdx() const { return StartIdx [all...] |
/external/clang/include/clang/Lex/ |
H A D | HeaderSearch.h | 185 unsigned StartIdx; member in struct:clang::HeaderSearch::LookupFileCacheInfo 193 LookupFileCacheInfo(): StartIdx(0), HitIdx(0), MappedName(nullptr) {} 195 void reset(unsigned StartIdx) { argument 196 this->StartIdx = StartIdx;
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/external/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 377 for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired; 378 ++StartIdx) { 382 if (isAllocated(Regs[StartIdx + BlockIdx])) { 390 MarkAllocated(Regs[StartIdx + BlockIdx]); 392 return Regs[StartIdx];
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H A D | StackMaps.h | 82 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
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H A D | FastISel.h | 575 const CallInst *CI, unsigned StartIdx);
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H A D | LiveInterval.h | 455 /// @p StartIdx, extend it to be live up to @p Use, and return the value. If 457 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Use);
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/external/llvm/lib/CodeGen/ |
H A D | StackMaps.cpp | 55 unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const { 56 if (!StartIdx) 57 StartIdx = getVarIdx(); 60 unsigned ScratchIdx = StartIdx, e = MI->getNumOperands(); 379 const unsigned StartIdx = opers.getVarIdx(); local 380 recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
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H A D | TargetInstrInfo.cpp | 438 unsigned StartIdx = 0; local 441 StartIdx = 2; // Skip ID, nShadowBytes. 446 StartIdx = opers.getVarIdx(); 456 if (Op < StartIdx) 465 for (unsigned i = 0; i < StartIdx; ++i) 468 for (unsigned i = StartIdx; i < MI.getNumOperands(); ++i) {
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H A D | LiveInterval.cpp | 92 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Use) { argument 100 if (I->end <= StartIdx) 511 /// block that starts at StartIdx, extend it to be live up to Kill and return 513 VNInfo *LiveRange::extendInBlock(SlotIndex StartIdx, SlotIndex Kill) { 516 return CalcLiveRangeUtilSet(this).extendInBlock(StartIdx, Kill); 518 return CalcLiveRangeUtilVector(this).extendInBlock(StartIdx, Kill);
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H A D | RegAllocGreedy.cpp | 1655 SlotIndex StartIdx = local 1673 // StartIdx and after StopIdx. 1676 Matrix->getLiveUnions()[*Units] .find(StartIdx); 1700 LiveRange::const_iterator I = LR.find(StartIdx);
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandPseudoInsts.cpp | 301 int StartIdx = NotSet; 310 StartIdx = Idx; 316 if (StartIdx == NotSet || EndIdx == NotSet) 327 if (StartIdx > EndIdx) { 328 std::swap(StartIdx, EndIdx); 343 if ((Idx < StartIdx || EndIdx < Idx) && Chunk != Outside) { 354 } else if (Idx > StartIdx && Idx < EndIdx && Chunk != Inside) {
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 862 unsigned StartIdx, EndIdx; member in struct:__anon13125::BitPermutationSelector::BitGroup 875 : V(V), RLAmt(R), StartIdx(S), EndIdx(E), Repl32(false), Repl32CR(false), 1080 if (BitGroups[0].StartIdx == 0 && 1104 VRI.FirstGroupStartIdx = std::min(VRI.FirstGroupStartIdx, BG.StartIdx); 1136 if (BG.StartIdx <= BG.EndIdx) { 1137 for (unsigned i = BG.StartIdx; i <= BG.EndIdx; ++i) { 1144 for (unsigned i = BG.StartIdx; i < Bits.size(); ++i) { 1162 if (BG.StartIdx < 32 && BG.EndIdx < 32) { 1173 " [" << BG.StartIdx << ", " << BG.EndIdx << "]\n"); 1185 I->StartIdx [all...] |
/external/llvm/utils/TableGen/ |
H A D | DAGISelMatcherEmitter.cpp | 60 unsigned StartIdx, formatted_raw_ostream &OS); 165 unsigned StartIdx = CurrentIdx; local 220 return CurrentIdx - StartIdx + 1; 300 unsigned StartIdx = CurrentIdx; local 384 return CurrentIdx-StartIdx;
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H A D | CodeGenSchedule.cpp | 957 bool IsRead, unsigned StartIdx); 1214 // operand. StartIdx is an index into TransVec where partial results 1215 // starts. RWSeq must be applied to all transitions between StartIdx and the end 1218 const SmallVectorImpl<unsigned> &RWSeq, bool IsRead, unsigned StartIdx) { 1227 for (unsigned TransIdx = StartIdx, TransEnd = TransVec.size(); 1261 unsigned StartIdx = TransVec.size(); 1272 TransVec.begin() + StartIdx, E = TransVec.end(); I != E; ++I) { 1275 substituteVariantOperand(*WSI, /*IsRead=*/false, StartIdx); 1283 TransVec.begin() + StartIdx, E = TransVec.end(); I != E; ++I) { 1286 substituteVariantOperand(*RSI, /*IsRead=*/true, StartIdx); [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
H A D | DAGISelMatcherEmitter.cpp | 55 unsigned StartIdx, formatted_raw_ostream &OS); 147 unsigned StartIdx = CurrentIdx; local 202 return CurrentIdx - StartIdx + 1; 269 unsigned StartIdx = CurrentIdx; local 350 return CurrentIdx-StartIdx;
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/external/swiftshader/third_party/LLVM/lib/Analysis/ |
H A D | ValueTracking.cpp | 1571 uint64_t StartIdx = 0; 1573 StartIdx = CI->getZExtValue(); 1576 return GetConstantStringInfo(GEP->getOperand(0), Str, StartIdx+Offset, 1698 uint64_t StartIdx = 0; 1700 StartIdx = CI->getZExtValue(); 1726 // Traverse the constant array from StartIdx (derived above) which is 1728 for (unsigned i = StartIdx; i != NumElts; ++i) { 1734 return i-StartIdx+1; // We found end of string, success!
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 620 unsigned StartIdx = SimpVect.size(); local 641 if (StartIdx + 1 != SimpVect.size()) { 643 R = *SimpVect[StartIdx]; 644 for (unsigned Idx = StartIdx + 1; Idx < SimpVect.size(); Idx++) 648 SimpVect.resize(StartIdx);
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
H A D | LiveInterval.h | 464 /// that starts at StartIdx, extend it to be live up to Kill, and return 466 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | LiveInterval.cpp | 277 /// block that starts at StartIdx, extend it to be live up to Kill and return 279 VNInfo *LiveInterval::extendInBlock(SlotIndex StartIdx, SlotIndex Kill) { 286 if (I->end <= StartIdx)
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H A D | RegAllocGreedy.cpp | 1275 SlotIndex StartIdx = 1293 // StartIdx and after StopIdx. 1295 LiveIntervalUnion::SegmentIter IntI = PhysReg2LiveUnion[*AI].find(StartIdx);
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H A D | LiveIntervalAnalysis.cpp | 2145 SlotIndex StartIdx = Index.getLoadIndex(); local 2147 if (!pli.isInOneLiveRange(StartIdx, EndIdx)) { 2158 pli.removeRange(StartIdx, EndIdx);
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/external/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 402 /// This function adds (StartIdx, StartIdx + Step, StartIdx + 2*Step, ...) 404 virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step); 625 Value *getStepVector(Value *Val, int StartIdx, Value *Step) override; 1978 Value *InnerLoopVectorizer::getStepVector(Value *Val, int StartIdx, argument 1993 Indices.push_back(ConstantInt::get(ITy, StartIdx + i)); 2020 auto *StartIdx = ConstantInt::get(ScalarIVTy, VF * Part + I); local 2021 auto *Mul = Builder.CreateMul(StartIdx, Step); 3024 Value *StartIdx local 6324 getStepVector(Value *Val, int StartIdx, Value *Step) argument [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.cpp | 2885 int StartIdx[2]; // StartIdx to extract from local 2889 StartIdx[Input] = 0; 2895 StartIdx[Input] = 0; 2897 StartIdx[Input] = (MinRange[Input]/MaskNumElts)*MaskNumElts; 2898 if (MaxRange[Input] - StartIdx[Input] < (int)MaskNumElts && 2899 StartIdx[Input] + MaskNumElts <= SrcNumElts) 2917 Src, DAG.getIntPtrConstant(StartIdx[Input])); 2927 MappedOps.push_back(Idx - StartIdx[0]); 2929 MappedOps.push_back(Idx - SrcNumElts - StartIdx[ [all...] |