| /external/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterInfo.cpp | 40 static const unsigned SubRegs[] = { local
47 assert(Channel < array_lengthof(SubRegs));
48 return SubRegs[Channel];
|
| /external/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 77 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
78 SubRegs.isValid(); ++SubRegs)
79 LiveRegs.insert(*SubRegs);
|
| /external/llvm/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 197 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
198 unsigned SubReg = *SubRegs;
220 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true);
221 SubRegs.isValid(); ++SubRegs)
222 PartDefRegs.insert(*SubRegs);
251 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs
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| H A D | CriticalAntiDepBreaker.cpp | 216 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
217 SubRegs.isValid(); ++SubRegs) {
218 KeepRegs.set(*SubRegs);
228 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
229 SubRegs.isValid(); ++SubRegs)
230 KeepRegs.set(*SubRegs);
|
| H A D | MachineInstrBundle.cpp | 187 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
188 unsigned SubReg = *SubRegs;
|
| H A D | ScheduleDAGInstrs.cpp | 1207 for (MCSubRegIterator SubRegs(LI.PhysReg, TRI, /*IncludeSelf=*/true);
1208 SubRegs.isValid(); ++SubRegs)
1209 LiveRegs.set(*SubRegs);
1260 for (MCSubRegIterator SubRegs(SuperReg, TRI); SubRegs.isValid(); ++SubRegs) {
1261 if (LiveRegs.test(*SubRegs)) {
1262 MIB.addReg(*SubRegs, RegState::ImplicitDefine);
1306 for (MCSubRegIterator SubRegs(Re
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| H A D | MachineVerifier.cpp | 94 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
95 RV.push_back(*SubRegs);
530 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
532 // assert(regsReserved.test(*SubRegs) && "Non-reserved sub-register");
533 regsReserved.set(*SubRegs);
754 for (MCSubRegIterator SubRegs(L
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| H A D | RegisterScavenging.cpp | 211 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
212 if (isRegUsed(*SubRegs)) {
|
| H A D | AggressiveAntiDepBreaker.cpp | 243 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
244 SubRegs.isValid(); ++SubRegs)
245 PassthruRegs.insert(*SubRegs);
319 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
320 unsigned SubregReg = *SubRegs;
|
| H A D | BranchFolding.cpp | 161 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
162 SubRegs.isValid(); ++SubRegs)
163 ImpDefRegs.insert(*SubRegs);
1749 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs)
1750 Uses.erase(*SubRegs); // Use sub-registers to be conservative
|
| H A D | IfConversion.cpp | 1503 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1504 SubRegs.isValid(); ++SubRegs)
1505 ExtUses.insert(*SubRegs);
1512 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1513 SubRegs.isValid(); ++SubRegs)
1514 RedefsByFalse.insert(*SubRegs);
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| H A D | LiveVariables.cpp | 193 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
194 unsigned SubReg = *SubRegs; ++SubRegs) {
217 for (const unsigned *SubRegs = TRI->getSubRegisters(DefReg);
218 unsigned SubReg = *SubRegs; ++SubRegs)
248 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
249 unsigned SubReg = *SubRegs; ++SubRegs) {
273 for (const unsigned *SubRegs
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| H A D | DeadMachineInstructionElim.cpp | 172 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
173 *SubRegs; ++SubRegs)
174 LivePhysRegs.reset(*SubRegs);
|
| H A D | RegisterScavenging.cpp | 40 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
41 unsigned SubReg = *SubRegs; ++SubRegs)
202 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
203 unsigned SubReg = *SubRegs; ++SubRegs)
|
| H A D | BranchFolding.cpp | 135 for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
136 unsigned SubReg = *SubRegs; ++SubRegs)
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 111 /// alias EAX. The SubRegs field is a zero terminated array of registers that
120 const unsigned *SubRegs; // Sub-register set, described above member in struct:llvm::MCRegisterDesc
235 return get(RegNo).SubRegs;
|
| /external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 119 std::vector<Record*> SRs = TheDef->getValueAsListOfDefs("SubRegs");
123 "SubRegs and SubRegIndices must have the same size");
204 for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
218 return SubRegs;
227 if (!SubRegs.insert(std::make_pair(Idx, SR)).second)
247 if (!SubRegs.insert(*SI).second)
260 CodeGenRegister *SR = SubRegs[Idx];
272 if (SubRegs.count(I->second) || !Orphans.erase(SRI->second))
275 SubRegs
545 ListInit *SubRegs = Def->getValueAsListInit("SubRegs"); variable
1787 const SubRegMap &SubRegs = Register.getSubRegs(); local
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| H A D | CodeGenRegisters.h | 158 return SubRegs;
251 SubRegMap SubRegs; member in struct:llvm::CodeGenRegister
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 52 return SubRegs;
55 std::vector<Record*> SubList = TheDef->getValueAsListOfDefs("SubRegs");
59 " SubRegIndices doesn't match SubRegs");
64 if (!SubRegs.insert(std::make_pair(Indices[i], SR)).second)
85 if (!SubRegs.insert(*SI).second)
124 SubRegs[BaseIdxInit->getDef()] = R2;
138 SubRegs[RegBank.getCompositeSubRegIndex(O.First, O.Second, true)] =
141 return SubRegs;
149 CodeGenRegister *SR = SubRegs.find(Indices[i])->second;
167 ListInit *SubRegs local
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| H A D | CodeGenRegisters.h | 53 return SubRegs;
83 SubRegMap SubRegs; member in struct:llvm::CodeGenRegister
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 220 const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); local
223 MachineLocation SrcML0(*SubRegs);
224 MachineLocation SrcML1(*(SubRegs + 1));
|
| /external/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 99 /// register. The SubRegs field is a zero terminated array of registers that
107 uint32_t SubRegs; // Sub-register set, described above member in struct:llvm::MCRegisterDesc
111 // sub-register in SubRegs.
472 init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
|
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCopyToCombine.cpp | 433 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
434 LastDef[*SubRegs] = &MI;
|
| H A D | HexagonFrameLowering.cpp | 210 for (MCSubRegIterator SubRegs(Reg, &TRI); SubRegs.isValid(); ++SubRegs) {
212 if (*SubRegs > RegNo)
213 RegNo = *SubRegs;
215 if (!RegNo || *SubRegs < RegNo)
216 RegNo = *SubRegs;
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 759 unsigned SubRegs = 0; local
766 SubRegs = 2;
770 SubRegs = 4;
775 SubRegs = 2;
779 SubRegs = 3;
783 SubRegs = 4;
787 SubRegs = 2;
791 SubRegs = 2;
796 SubRegs = 3;
801 SubRegs
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