Searched refs:addLiveIn (Results 1 - 25 of 103) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp102 MRI.addLiveIn(FlatScratchInitReg);
103 MBB.addLiveIn(FlatScratchInitReg);
136 MRI.addLiveIn(PreloadedScratchWaveOffsetReg);
137 MBB.addLiveIn(PreloadedScratchWaveOffsetReg);
140 MRI.addLiveIn(PreloadedPrivateBufferReg);
141 MBB.addLiveIn(PreloadedPrivateBufferReg);
269 OtherBB.addLiveIn(ScratchRsrcReg);
270 OtherBB.addLiveIn(ScratchWaveOffsetReg);
314 MF.getRegInfo().addLiveIn(WorkGroupIDSGPR);
315 MBB.addLiveIn(WorkGroupIDSGP
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H A DSIISelLowering.cpp701 MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SReg_128RegClass);
707 MF.addLiveIn(DispatchPtrReg, &AMDGPU::SReg_64RegClass);
713 MF.addLiveIn(QueuePtrReg, &AMDGPU::SReg_64RegClass);
719 MF.addLiveIn(InputPtrReg, &AMDGPU::SReg_64RegClass);
725 MF.addLiveIn(FlatScratchInitReg, &AMDGPU::SReg_64RegClass);
778 Reg = MF.addLiveIn(Reg, &AMDGPU::SReg_64RegClass);
786 Reg = MF.addLiveIn(Reg, RC);
799 Reg = MF.addLiveIn(Reg, RC);
822 MF.addLiveIn(Reg, &AMDGPU::SReg_32RegClass);
828 MF.addLiveIn(Re
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H A DSILowerControlFlow.cpp426 LoopBB.addLiveIn(Val->getReg());
432 RemainderBB.addLiveIn(Reg);
437 LoopBB.addLiveIn(Src->getReg());
440 LoopBB.addLiveIn(IdxReg.getReg());
H A DSIMachineFunctionInfo.cpp218 BI->addLiveIn(LaneVGPR);
/external/llvm/lib/Target/AArch64/
H A DAArch64ExpandPseudoInsts.cpp594 MBB->addLiveIn(*I);
627 LoadCmpBB->addLiveIn(Addr.getReg());
628 LoadCmpBB->addLiveIn(Dest.getReg());
629 LoadCmpBB->addLiveIn(Desired.getReg());
648 StoreBB->addLiveIn(Addr.getReg());
649 StoreBB->addLiveIn(New.getReg());
706 LoadCmpBB->addLiveIn(Addr.getReg());
707 LoadCmpBB->addLiveIn(DestLo.getReg());
708 LoadCmpBB->addLiveIn(DestHi.getReg());
709 LoadCmpBB->addLiveIn(DesiredL
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H A DAArch64CallLowering.cpp84 MIRBuilder.getMBB().addLiveIn(VA.getLocReg());
H A DAArch64RedundantCopyElimination.cpp158 MBB->addLiveIn(TargetReg);
/external/swiftshader/third_party/LLVM/lib/Target/XCore/
H A DXCoreFrameLowering.cpp130 MBB.addLiveIn(XCore::LR);
158 MBB.addLiveIn(XCore::LR);
175 MBB.addLiveIn(XCore::R10);
293 MBB.addLiveIn(it->getReg());
/external/swiftshader/third_party/LLVM/lib/CodeGen/
H A DMachineRegisterInfo.cpp237 EntryMBB->addLiveIn(LiveIns[i].first);
241 EntryMBB->addLiveIn(LiveIns[i].first);
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp76 I->addLiveIn(MSP430::FPW);
198 MBB.addLiveIn(Reg);
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp136 I->addLiveIn(SystemZ::R11D);
280 MBB.addLiveIn(Reg);
290 MBB.addLiveIn(Reg);
/external/llvm/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp224 LayoutSucc->addLiveIn(NewLI);
/external/llvm/lib/Target/Mips/
H A DMips16FrameLowering.cpp130 EntryBlock->addLiveIn(Reg);
H A DMipsSEISelDAGToDAG.cpp150 MF.getRegInfo().addLiveIn(Mips::T9_64);
151 MBB.addLiveIn(Mips::T9_64);
178 MF.getRegInfo().addLiveIn(Mips::T9);
179 MBB.addLiveIn(Mips::T9);
213 MF.getRegInfo().addLiveIn(Mips::V0);
214 MBB.addLiveIn(Mips::V0);
/external/llvm/lib/Target/MSP430/
H A DMSP430FrameLowering.cpp77 I->addLiveIn(MSP430::FP);
199 MBB.addLiveIn(Reg);
/external/llvm/include/llvm/CodeGen/
H A DMachineBasicBlock.h288 void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask = ~0u) { function in class:llvm::MachineBasicBlock
291 void addLiveIn(const RegisterMaskPair &RegMaskPair) { function in class:llvm::MachineBasicBlock
296 /// this than repeatedly calling isLiveIn before calling addLiveIn for every
303 unsigned addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC);
/external/llvm/lib/Target/SystemZ/
H A DSystemZFrameLowering.cpp127 MBB.addLiveIn(GPR64);
211 MBB.addLiveIn(Reg);
404 I->addLiveIn(SystemZ::R11D);
/external/llvm/lib/CodeGen/
H A DImplicitNullChecks.cpp547 MBB->addLiveIn(Reg);
555 NC.getNotNullSucc()->addLiveIn(MO.getReg());
H A DMachineRegisterInfo.cpp419 EntryMBB->addLiveIn(LiveIns[i].first);
423 EntryMBB->addLiveIn(LiveIns[i].first);
H A DVirtRegMap.cpp283 MBB->addLiveIn(PhysReg, LaneMask);
313 MBB->addLiveIn(PhysReg);
320 // each MBB's LiveIns set before calling addLiveIn on them.
/external/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp342 MBB->addLiveIn(reg - SP::I0_I1 + SP::O0_O1);
348 MBB->addLiveIn(reg - SP::I0 + SP::O0);
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
H A DAlphaInstrInfo.cpp353 RegInfo.addLiveIn(Alpha::R29);
378 RegInfo.addLiveIn(Alpha::R26);
/external/swiftshader/third_party/LLVM/lib/Target/X86/
H A DX86FrameLowering.cpp745 I->addLiveIn(FramePtr);
1175 MBB.addLiveIn(Reg);
1195 MBB.addLiveIn(Reg);
1357 allocMBB->addLiveIn(*i);
1358 checkMBB->addLiveIn(*i);
1361 restoreR10MBB->addLiveIn(*i);
1365 allocMBB->addLiveIn(X86::R10);
1366 restoreR10MBB->addLiveIn(X86::RAX);
/external/llvm/lib/Target/ARM/
H A DARMExpandPseudoInsts.cpp757 MBB->addLiveIn(*I);
804 LoadCmpBB->addLiveIn(Addr.getReg());
805 LoadCmpBB->addLiveIn(Dest.getReg());
806 LoadCmpBB->addLiveIn(Desired.getReg());
832 StoreBB->addLiveIn(Addr.getReg());
833 StoreBB->addLiveIn(New.getReg());
918 LoadCmpBB->addLiveIn(Addr.getReg());
919 LoadCmpBB->addLiveIn(Dest.getReg());
920 LoadCmpBB->addLiveIn(Desired.getReg());
955 StoreBB->addLiveIn(Add
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DMachineRegisterInfo.h299 /// addLiveIn/Out - Add the specified register as a live in/out. Note that it
301 void addLiveIn(unsigned Reg, unsigned vreg = 0) { function in class:llvm::MachineRegisterInfo

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