Searched defs:MUL (Results 1 - 25 of 36) sorted by relevance

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/external/tensorflow/tensorflow/core/kernels/
H A Dscatter_functor.h36 enum class UpdateOp { ASSIGN, ADD, SUB, MUL, DIV }; member in class:tensorflow::scatter_op::UpdateOp
64 struct Assign<scatter_op::UpdateOp::MUL> {
106 struct AssignSYCL<scatter_op::UpdateOp::MUL> {
/external/smali/dexlib2/src/main/java/org/jf/dexlib2/util/
H A DSyntheticAccessorFSM.java197 public static final int MUL = SyntheticAccessorResolver.MUL_ASSIGNMENT; field in class:SyntheticAccessorFSM
394 mathOp = MUL;
/external/toybox/toys/pending/
H A Dexpr.c132 enum { OR = 1, AND, EQ, NE, GT, GTE, LT, LTE, ADD, SUB, MUL, DIVI, MOD, RE }; enumerator in enum:__anon26956
148 {"*", 5, I_TO_I, MUL }, {"/", 5, I_TO_I, DIVI }, {"%", 5, I_TO_I, MOD },
194 case MUL: x = a * b; break;
/external/valgrind/none/tests/mips64/
H A Darithmetic_instruction.c12 MUL, MULT, MULTU, MOVN, enumerator in enum:__anon29705
236 case MUL:
/external/deqp/framework/randomshaders/
H A DrsgToken.hpp66 MUL, enumerator in enum:rsg::Token::Type
/external/tensorflow/tensorflow/contrib/tensorrt/convert/
H A Dconvert_nodes.cc443 enum class OP_CATEGORY : int { RSQRT = 0, NEG, ADD, MUL, SUB }; member in class:tensorflow::tensorrt::convert::__anon26121::LambdaFactory::OP_CATEGORY
468 case OP_CATEGORY::MUL:
494 case OP_CATEGORY::MUL:
522 case OP_CATEGORY::MUL:
686 binary_op.op = LambdaFactory::OP_CATEGORY::MUL;
/external/webp/src/dsp/
H A Ddec_mips_dsp_r2.c24 #define MUL(a, b) (((a) * (b)) >> 16) macro
52 int c4 = MUL(in[4], kC2);
53 const int d4 = MUL(in[4], kC1);
54 const int c1 = MUL(in[1], kC2);
55 const int d1 = MUL(in[1], kC1);
482 #undef MUL macro
H A Denc.c114 #define MUL(a, b) (((a) * (b)) >> 16) macro
124 const int c = MUL(in[4], kC2) - MUL(in[12], kC1);
125 const int d = MUL(in[4], kC1) + MUL(in[12], kC2);
139 const int c = MUL(tmp[4], kC2) - MUL(tmp[12], kC1);
140 const int d = MUL(tmp[4], kC1) + MUL(tmp[12], kC2);
225 #undef MUL macro
[all...]
H A Ddec_neon.c1258 #define MUL(a, b) (((a) * (b)) >> 16) macro
1263 const int16x4_t c4 = vdup_n_s16(MUL(in[4], kC2_full));
1264 const int16x4_t d4 = vdup_n_s16(MUL(in[4], kC1_full));
1265 const int c1 = MUL(in[1], kC2_full);
1266 const int d1 = MUL(in[1], kC1_full);
1277 #undef MUL macro
H A Ddec_sse2.c89 // c = MUL(in1, K2) - MUL(in3, K1) = MUL(in1, k2) - MUL(in3, k1) + in1 - in3
95 // d = MUL(in1, K1) + MUL(in3, K2) = MUL(in1, k1) + MUL(in3, k2) + in1 + in3
120 // c = MUL(T1, K2) - MUL(T
199 #define MUL macro
241 #undef MUL macro
[all...]
/external/annotation-tools/asmx/src/org/objectweb/asm/commons/
H A DGeneratorAdapter.java129 public final static int MUL = Opcodes.IMUL; field in class:GeneratorAdapter
720 * MUL, DIV, REM, NEG, SHL, SHR, USHR, AND, OR, XOR.
/external/pcre/dist2/src/sljit/
H A DsljitNativeARM_32.c90 #define MUL 0xe0000090 macro
1086 mul_inst = MUL | (reg_map[dst] << 16);
H A DsljitNativeARM_T2_32.c132 #define MUL 0xfb00f000 macro
749 return push_inst32(compiler, MUL | RD4(dst) | RN4(arg1) | RM4(arg2));
H A DsljitNativeMIPS_common.c181 #define MUL (HI(28) | LO(2)) macro
H A DsljitNativeTILEGX_64.c397 #define MUL(dst, srca, srcb) \ macro
1883 FAIL_IF(MUL(reg_map[dst], reg_map[src1], reg_map[src2]));
H A DsljitNativeX86_common.c204 #define MUL (/* GROUP_F7 */ 4 << 3) macro
862 *inst |= MUL;
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DISDOpcodes.h189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator in enum:llvm::ISD::NodeType
/external/libavc/decoder/
H A Dih264d_defs.h56 #define MUL(x,y) ((x)*(y)) macro
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h195 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator in enum:llvm::ISD::NodeType
/external/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp2784 // 32b Opcodes that can be combined with a MUL
2803 // 64b Opcodes that can be combined with a MUL
2842 // Opcodes that can be combined with a MUL
3270 /// F|MUL I=A,B,0
3277 /// the F|MUL. In the example above IdxMulOpd is 1.
3288 MachineInstr *MUL = MRI.getUniqueVRegDef(Root.getOperand(IdxMulOpd).getReg()); local
3290 unsigned SrcReg0 = MUL->getOperand(1).getReg();
3291 bool Src0IsKill = MUL->getOperand(1).isKill();
3292 unsigned SrcReg1 = MUL->getOperand(2).getReg();
3293 bool Src1IsKill = MUL
3352 MachineInstr *MUL = MRI.getUniqueVRegDef(Root.getOperand(IdxMulOpd).getReg()); local
3391 MachineInstr *MUL; local
[all...]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp106 case ISD::MUL: Res = PromoteIntRes_SimpleIntBinOp(N); break;
654 SDValue Mul = DAG.getNode(ISD::MUL, DL, LHS.getValueType(), LHS, RHS);
1107 case ISD::MUL: ExpandIntRes_MUL(N, Lo, Hi); break;
1919 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1934 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1945 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
1946 LH = DAG.getNode(ISD::MUL, dl, NVT, LH, RL);
1952 Lo = DAG.getNode(ISD::MUL, dl, NVT, LL, RL);
1954 RH = DAG.getNode(ISD::MUL, dl, NVT, LL, RH);
1955 LH = DAG.getNode(ISD::MUL, d
2254 SDValue MUL = DAG.getNode(ISD::MUL, DL, LHS.getValueType(), LHS, RHS); local
[all...]
/external/compiler-rt/lib/msan/tests/
H A Dmsan_test.cc4086 template<class T> INLINE T MUL(const T &a, const T&b) { return a * b; } function
4095 BinaryOpOriginTest<S4>(MUL<S4>);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp124 case ISD::MUL: Res = PromoteIntRes_SimpleIntBinOp(N); break;
1325 case ISD::MUL: ExpandIntRes_MUL(N, Lo, Hi); break;
2206 SDValue T = DAG.getNode(ISD::MUL, dl, NVT, LLL, RLL);
2217 DAG.getNode(ISD::MUL, dl, NVT, LLH, RLL), TL);
2222 DAG.getNode(ISD::MUL, dl, NVT, LLL, RLH), UL);
2226 DAG.getNode(ISD::MUL, dl, NVT, LL, RL),
2233 DAG.getNode(ISD::MUL, dl, NVT, RH, LL),
2234 DAG.getNode(ISD::MUL, dl, NVT, RL, LH)));
2551 SDValue MUL = DAG.getNode(ISD::MUL, d local
[all...]
/external/jarjar/lib/
H A Dasm-commons-4.0.jarMETA-INF/MANIFEST.MF org/objectweb/asm/commons/AdviceAdapter.class " package org.objectweb.asm ...
/external/owasp/sanitizer/tools/findbugs/lib/
H A Dasm-commons-3.3.jarMETA-INF/MANIFEST.MF org/objectweb/asm/commons/AdviceAdapter.class " package org.objectweb.asm ...

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