Searched defs:SRL (Results 1 - 17 of 17) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
H A DMSP430ISelLowering.h64 /// SHL, SRA, SRL - Non-constant shifts.
65 SHL, SRA, SRL enumerator in enum:llvm::MSP430ISD::__anon22884
/external/valgrind/none/tests/mips64/
H A Dshift_instructions.c10 SRA, SRAV, SRL, SRLV enumerator in enum:__anon29714
189 case SRL:
/external/llvm/lib/Target/Lanai/
H A DLanaiAluCode.h37 SRL = 0x27, enumerator in enum:llvm::LPAC::AluCode
95 case SRL:
114 .Case("srl", SRL)
137 case ISD::SRL:
138 return AluCode::SRL;
/external/llvm/lib/Target/SystemZ/
H A DSystemZSelectionDAGInfo.cpp176 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i32, IPM, local
178 SDValue ROTL = DAG.getNode(ISD::ROTL, DL, MVT::i32, SRL,
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
H A DPPCISelLowering.h91 SRL, SRA, SHL, enumerator in enum:llvm::PPCISD::NodeType
/external/libffi/src/mips/
H A Dffitarget.h152 # define SRL srl macro
159 # define SRL dsrl macro
/external/python/cpython2/Modules/_ctypes/libffi/src/mips/
H A Dffitarget.h152 # define SRL srl macro
159 # define SRL dsrl macro
/external/python/cpython3/Modules/_ctypes/libffi/src/mips/
H A Dffitarget.h152 # define SRL srl macro
159 # define SRL dsrl macro
/external/swiftshader/third_party/LLVM/include/llvm/TableGen/
H A DRecord.h954 enum BinaryOp { SHL, SRA, SRL, STRCONCAT, CONCAT, EQ }; enumerator in enum:llvm::BinOpInit::BinaryOp
/external/pcre/dist2/src/sljit/
H A DsljitNativeSPARC_common.c158 #define SRL (OPC1(0x2) | OPC3(0x26)) macro
H A DsljitNativeMIPS_common.c167 #define SRL (HI(0) | LO(2)) macro
1385 FAIL_IF(push_inst(compiler, SRL | TA(EQUAL_FLAG) | DA(EQUAL_FLAG) | SH_IMM(23), EQUAL_FLAG));
1393 FAIL_IF(push_inst(compiler, SRL | TA(ULESS_FLAG) | DA(ULESS_FLAG) | SH_IMM(23), ULESS_FLAG));
1396 FAIL_IF(push_inst(compiler, SRL | TA(UGREATER_FLAG) | DA(UGREATER_FLAG) | SH_IMM(23), UGREATER_FLAG));
2084 FAIL_IF(push_inst(compiler, SRL | TA(sugg_dst_ar) | DA(sugg_dst_ar) | SH_IMM(23), sugg_dst_ar));
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
H A DISDOpcodes.h317 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h339 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp695 if (ShiftRightOpc != ISD::SRA && ShiftRightOpc != ISD::SRL)
2027 SDValue SrlX = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1);
2028 SDValue SrlY = DAG.getNode(ISD::SRL, DL, MVT::i32, Y, Const31);
2077 SDValue SrlX = DAG.getNode(ISD::SRL, DL, TyX, SllX, Const1);
2078 SDValue SrlY = DAG.getNode(ISD::SRL, DL, TyY, Y,
2188 SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, VT, Lo,
2190 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, ShiftRight1Lo, Not);
2229 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt);
2231 SDValue ShiftRightHi = DAG.getNode(IsSRA ? ISD::SRA : ISD::SRL,
2322 SDValue SRL local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp839 else if (Opc == ISD::SRL)
1072 case ISD::SRL: return visitSRL(N);
1149 case ISD::SRL:
1792 SDValue SRL = DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, SGN, local
1795 SDValue ADD = DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, SRL);
1796 AddToWorkList(SRL.getNode());
1847 return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0,
1861 return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0, Add);
2005 N1 = DAG.getNode(ISD::SRL, D
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp1109 else if (Opc == ISD::SRL)
1380 case ISD::SRL: return visitSRL(N);
1481 case ISD::SRL:
2276 SDValue SRL = local
2277 DAG.getNode(ISD::SRL, DL, VT, SGN,
2280 SDValue ADD = DAG.getNode(ISD::ADD, DL, VT, N0, SRL);
2281 AddToWorklist(SRL.getNode());
2342 return DAG.getNode(ISD::SRL, DL, VT, N0,
2357 return DAG.getNode(ISD::SRL, DL, VT, N0, Add);
2498 N1 = DAG.getNode(ISD::SRL, D
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/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp857 setOperationAction(ISD::SRL, VT, Custom);
865 setOperationAction(ISD::SRL, VT, Custom);
983 setOperationAction(ISD::SRL, VT, Custom);
1084 setOperationAction(ISD::SRL, VT, Custom);
1331 setOperationAction(ISD::SRL, VT, Custom);
1500 setOperationAction(ISD::SRL, VT, Custom);
1639 setTargetDAGCombine(ISD::SRL);
8523 Scalar = DAG.getNode(ISD::SRL, DL, Scalar.getValueType(), Scalar,
13307 Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, dl, VT, ShOpHi, SafeShAmt);
13615 SDValue HighShift = DAG.getNode(ISD::SRL, D
19845 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, local
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