/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
H A D | nv50_ir_peephole.cpp | 99 Instruction *mov, *si, *next; local 101 for (mov = bb->getEntry(); mov; mov = next) { 102 next = mov->next; 103 if (mov->op != OP_MOV || mov->fixed || !mov->getSrc(0)->asLValue()) 105 if (mov->getPredicate()) 107 if (mov [all...] |
H A D | nv50_ir_ra.cpp | 459 Instruction *phi, *mov; local 472 mov = new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size)); 474 mov->setSrc(0, phi->getSrc(j)); 475 mov->setDef(0, tmp); 478 pb->insertBefore(pb->getExit(), mov); 506 Instruction *mov = local 508 mov->setDef(0, tmp); 509 mov->setSrc(0, cal->getSrc(s)); 512 bb->insertBefore(cal, mov); 520 Instruction *mov local 2302 Instruction *mov; local [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
H A D | brw_vec4.cpp | 428 vec4_instruction *mov = MOV(imm_inst[0]->dst, brw_imm_vf(vf)); local 429 mov->dst.type = dest_type; 430 mov->dst.writemask = writemask; 431 inst->insert_before(block, mov); 483 * mov vgrf4.yz, vgrf5.wxzy 487 * mov vgrf4.yz, vgrf5.xxzx 1215 * But if scan_inst is a non type-converting 'mov', we can fix 1324 * type-converting 'mov' and we can modify its register types 1866 vec4_instruction *mov = emit(MOV(dst, ts)); local 1870 mov 2221 vec4_instruction *mov = local [all...] |
/external/swiftshader/third_party/subzero/src/ |
H A D | IceAssemblerX86BaseImpl.h | 230 void AssemblerX86Base<TraitsType>::mov(Type Ty, GPRRegister dst, function in class:Ice::X86NAMESPACE::AssemblerX86Base 249 void AssemblerX86Base<TraitsType>::mov(Type Ty, GPRRegister dst, function in class:Ice::X86NAMESPACE::AssemblerX86Base 264 void AssemblerX86Base<TraitsType>::mov(Type Ty, GPRRegister dst, function in class:Ice::X86NAMESPACE::AssemblerX86Base 280 void AssemblerX86Base<TraitsType>::mov(Type Ty, const Address &dst, function in class:Ice::X86NAMESPACE::AssemblerX86Base 296 void AssemblerX86Base<TraitsType>::mov(Type Ty, const Address &dst, function in class:Ice::X86NAMESPACE::AssemblerX86Base 337 // 32-bit mov clears the upper 32 bits, hence zero-extending the 32-bit 339 mov(IceType_i32, dst, src); 356 // 32-bit mov clears the upper 32 bits, hence zero-extending the 32-bit 358 mov(IceType_i32, dst, src); 1749 mov(IceType_i3 [all...] |
/external/v8/src/mips/ |
H A D | macro-assembler-mips.h | 253 // less efficient form using xor instead of mov is emitted. 263 mov(dst, src); 659 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } function in class:v8::internal::MacroAssembler 1495 mov(dst, at);
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/external/v8/src/mips64/ |
H A D | macro-assembler-mips64.h | 282 // less efficient form using xor instead of mov is emitted. 292 mov(dst, src); 695 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); } function in class:v8::internal::MacroAssembler 1603 mov(dst, at);
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/external/v8/src/x87/ |
H A D | assembler-x87.cc | 442 void Assembler::mov(Register dst, int32_t imm32) { function in class:v8::internal::Assembler 449 void Assembler::mov(Register dst, const Immediate& x) { function in class:v8::internal::Assembler 456 void Assembler::mov(Register dst, Handle<Object> handle) { function in class:v8::internal::Assembler 463 void Assembler::mov(Register dst, const Operand& src) { function in class:v8::internal::Assembler 470 void Assembler::mov(Register dst, Register src) { function in class:v8::internal::Assembler 477 void Assembler::mov(const Operand& dst, const Immediate& x) { function in class:v8::internal::Assembler 485 void Assembler::mov(const Operand& dst, Handle<Object> handle) { function in class:v8::internal::Assembler 493 void Assembler::mov(const Operand& dst, Register src) { function in class:v8::internal::Assembler
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/external/mesa3d/src/gallium/drivers/vc4/ |
H A D | vc4_qir.h | 855 struct qinst *mov = qir_MOV_dest(c, dest, src); local 856 mov->cond = cond; 857 return mov;
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/external/swiftshader/src/OpenGL/compiler/ |
H A D | OutputASM.cpp | 815 Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, left); local 816 mov->src[0].swizzle = swizzle; 998 Instruction *mov = emit(op, result, outCol, arg, isMov ? 1 - row : row); local 999 mov->src[0].swizzle = 0x55 * (isMov ? 1 - col : col); 1000 mov->dst.mask = 1 << outRow; 1197 Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, j, arg, i); local 1198 mov->src[0].swizzle = 0x55 * j; 1199 mov->dst.mask = 1 << i; 1388 Instruction *mov = emit(sw::Shader::OPCODE_MOV, &coord, &coord); local 1389 mov 1394 Instruction *mov = emit(sw::Shader::OPCODE_MOV, &coord, arg[1]); local 1505 Instruction *mov = emitCast(result, arrayIndex, argi, 0); local 1513 Instruction *mov = emitCast(result, arrayIndex, argi, 0); local 1520 Instruction *mov = emitCast(result, arrayIndex, argi, 1); local 1534 Instruction *mov = emitCast(result, arrayIndex, argi, column); local 1565 Instruction *mov = emitCast(result, i, arg0, 0); local 1591 Instruction *mov = emitCast(result, i + n * outCols, argi, i); local 1610 Instruction *mov = emitCast(result, column, argi, 0); local 1634 Instruction *mov = emit(sw::Shader::OPCODE_MOV, result, index + offset, argi, index); local 2469 Instruction *mov = emit(sw::Shader::OPCODE_MOV, dst, index, src, offset + index); local 2523 Instruction *mov = new Instruction(sw::Shader::OPCODE_MOV); local 2578 Instruction *mov = emit(sw::Shader::OPCODE_MOV, node, i, root, offset + i); local [all...] |
/external/swiftshader/src/Shader/ |
H A D | ShaderCore.cpp | 564 void ShaderCore::mov(Vector4f &dst, const Vector4f &src, bool integerDestination) function in class:sw::ShaderCore
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/external/v8/src/arm64/ |
H A D | assembler-arm64.cc | 1775 void Assembler::mov(const Register& rd, const Register& rm) { function in class:v8::internal::Assembler
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/external/v8/src/ia32/ |
H A D | assembler-ia32.cc | 562 void Assembler::mov(Register dst, int32_t imm32) { function in class:v8::internal::Assembler 569 void Assembler::mov(Register dst, const Immediate& x) { function in class:v8::internal::Assembler 576 void Assembler::mov(Register dst, Handle<Object> handle) { function in class:v8::internal::Assembler 583 void Assembler::mov(Register dst, const Operand& src) { function in class:v8::internal::Assembler 590 void Assembler::mov(Register dst, Register src) { function in class:v8::internal::Assembler 597 void Assembler::mov(const Operand& dst, const Immediate& x) { function in class:v8::internal::Assembler 605 void Assembler::mov(const Operand& dst, Handle<Object> handle) { function in class:v8::internal::Assembler 613 void Assembler::mov(const Operand& dst, Register src) { function in class:v8::internal::Assembler
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/external/v8/src/ppc/ |
H A D | assembler-ppc.cc | 416 // Dummy opcodes for unbound label mov instructions or jump table entries. 1612 // If there is no constant pool available, we must use a mov 1659 // Todo - break this dependency so we can optimize mov() in general 1661 void Assembler::mov(Register dst, const Operand& src) { function in class:v8::internal::Assembler 1787 mov(dst, Operand(position + Code::kHeaderSize - kHeapObjectTag)); 1798 // with a 2 instruction mov sequence that will load the 1851 // with a multi-instruction mov sequence that will load the 2524 // mov sequence
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/external/v8/src/arm/ |
H A D | assembler-arm.cc | 933 // mov dst, #target8_0 940 // If the target fits in a byte then only patch with a mov 944 patcher.masm()->mov(dst, Operand(target24)); 963 // Patch with a sequence of mov/orr/orr instructions. 970 patcher.masm()->mov(dst, Operand(target8_0)); 975 patcher.masm()->mov(dst, Operand(target8_0)); 1196 // A movw / movt or mov / orr immediate load. 1206 if ((instr & ~kCondMask) != 13 * B21) { // mov, S not set 1207 // For a mov or mvn instruction which doesn't set the condition 1242 mov(targe 1590 void Assembler::mov(Register dst, const Operand& src, SBit s, Condition cond) { function in class:v8::internal::Assembler [all...] |
/external/v8/src/s390/ |
H A D | macro-assembler-s390.cc | 49 mov(ip, Operand(target, rmode)); 121 mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode)); 168 mov(r0, Operand(handle)); 173 mov(dst, Operand(value)); 292 mov(value, Operand(bit_cast<intptr_t>(kZapValue + 4))); 293 mov(dst, Operand(bit_cast<intptr_t>(kZapValue + 8))); 357 mov(dst, Operand(bit_cast<intptr_t>(kZapValue + 12))); 358 mov(map, Operand(bit_cast<intptr_t>(kZapValue + 16))); 418 mov(address, Operand(bit_cast<intptr_t>(kZapValue + 12))); 419 mov(valu 1866 STATIC_ASSERT(Map::kInstanceTypeOffset < 4096); STATIC_ASSERT(LAST_TYPE < 256); LoadlB(type_reg, FieldMemOperand(map, Map::kInstanceTypeOffset)); CmpP(type_reg, Operand(type)); } void MacroAssembler::CompareRoot(Register obj, Heap::RootListIndex index) { CmpP(obj, MemOperand(kRootRegister, index << kPointerSizeLog2)); } void MacroAssembler::SmiToDouble(DoubleRegister value, Register smi) { SmiUntag(ip, smi); ConvertIntToDouble(ip, value); } void MacroAssembler::CompareMap(Register obj, Register scratch, Handle<Map> map, Label* early_success) { LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); CompareMap(obj, map, early_success); } void MacroAssembler::CompareMap(Register obj_map, Handle<Map> map, Label* early_success) { mov(r0, Operand(map)); CmpP(r0, FieldMemOperand(obj_map, HeapObject::kMapOffset)); } void MacroAssembler::CheckMap(Register obj, Register scratch, Handle<Map> map, Label* fail, SmiCheckType smi_check_type) { if (smi_check_type == DO_SMI_CHECK) { JumpIfSmi(obj, fail); } Label success; CompareMap(obj, scratch, map, &success); bne(fail); bind(&success); } void MacroAssembler::CheckMap(Register obj, Register scratch, Heap::RootListIndex index, Label* fail, SmiCheckType smi_check_type) { if (smi_check_type == DO_SMI_CHECK) { JumpIfSmi(obj, fail); } LoadP(scratch, FieldMemOperand(obj, HeapObject::kMapOffset)); CompareRoot(scratch, index); bne(fail); } void MacroAssembler::DispatchWeakMap(Register obj, Register scratch1, Register scratch2, Handle<WeakCell> cell, Handle<Code> success, SmiCheckType smi_check_type) { Label fail; if (smi_check_type == DO_SMI_CHECK) { JumpIfSmi(obj, &fail); } LoadP(scratch1, FieldMemOperand(obj, HeapObject::kMapOffset)); CmpWeakValue(scratch1, cell, scratch2); Jump(success, RelocInfo::CODE_TARGET, eq); bind(&fail); } void MacroAssembler::CmpWeakValue(Register value, Handle<WeakCell> cell, Register scratch, CRegister) { mov(scratch, Operand(cell)); CmpP(value, FieldMemOperand(scratch, WeakCell::kValueOffset)); } void MacroAssembler::GetWeakValue(Register value, Handle<WeakCell> cell) { mov(value, Operand(cell)); LoadP(value, FieldMemOperand(value, WeakCell::kValueOffset)); } void MacroAssembler::LoadWeakValue(Register value, Handle<WeakCell> cell, Label* miss) { GetWeakValue(value, cell); JumpIfSmi(value, miss); } void MacroAssembler::GetMapConstructor(Register result, Register map, Register temp, Register temp2) { Label done, loop; LoadP(result, FieldMemOperand(map, Map::kConstructorOrBackPointerOffset)); bind(&loop); JumpIfSmi(result, &done); CompareObjectType(result, temp, temp2, MAP_TYPE); bne(&done); LoadP(result, FieldMemOperand(result, Map::kConstructorOrBackPointerOffset)); b(&loop); bind(&done); } void MacroAssembler::CallStub(CodeStub* stub, TypeFeedbackId ast_id, Condition cond) { DCHECK(AllowThisStubCall(stub)); Call(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond); } void MacroAssembler::TailCallStub(CodeStub* stub, Condition cond) { Jump(stub->GetCode(), RelocInfo::CODE_TARGET, cond); } bool MacroAssembler::AllowThisStubCall(CodeStub* stub) { return has_frame_ || !stub->SometimesSetsUpAFrame(); } void MacroAssembler::TestDoubleIsInt32(DoubleRegister double_input, Register scratch1, Register scratch2, DoubleRegister double_scratch) { TryDoubleToInt32Exact(scratch1, double_input, scratch2, double_scratch); } void MacroAssembler::TestDoubleIsMinusZero(DoubleRegister input, Register scratch1, Register scratch2) { lgdr(scratch1, input); llihf(scratch2, Operand(0x80000000)); CmpP(scratch1, scratch2); } void MacroAssembler::TestDoubleSign(DoubleRegister input, Register scratch) { lgdr(scratch, input); cgfi(scratch, Operand::Zero()); } void MacroAssembler::TestHeapNumberSign(Register input, Register scratch) { LoadlW(scratch, FieldMemOperand(input, HeapNumber::kValueOffset + Register::kExponentOffset)); Cmp32(scratch, Operand::Zero()); } void MacroAssembler::TryDoubleToInt32Exact(Register result, DoubleRegister double_input, Register scratch, DoubleRegister double_scratch) { Label done; DCHECK(!double_input.is(double_scratch)); ConvertDoubleToInt64(double_input, scratch, result, double_scratch); TestIfInt32(result, r0); bne(&done); lgdr(scratch, double_scratch); cdfbr(double_scratch, scratch); cdbr(double_scratch, double_input); bind(&done); } void MacroAssembler::TryInt32Floor(Register result, DoubleRegister double_input, Register input_high, Register scratch, DoubleRegister double_scratch, Label* done, Label* exact) { DCHECK(!result.is(input_high)); DCHECK(!double_input.is(double_scratch)); Label exception; lay(sp, MemOperand(sp, -kDoubleSize)); StoreDouble(double_input, MemOperand(sp)); LoadlW(input_high, MemOperand(sp, Register::kExponentOffset)); la(sp, MemOperand(sp, kDoubleSize)); ExtractBitMask(result, input_high, HeapNumber::kExponentMask); CmpLogicalP(result, Operand(0x7ff)); beq(&exception); ConvertDoubleToInt64(double_input, scratch, result, double_scratch, kRoundToMinusInf); TestIfInt32(result, r0); bne(&exception); lgdr(scratch, double_scratch); cdfbr(double_scratch, scratch); cdbr(double_scratch, double_input); beq(exact); b(done); bind(&exception); } void MacroAssembler::TryInlineTruncateDoubleToI(Register result, DoubleRegister double_input, Label* done) { DoubleRegister double_scratch = kScratchDoubleReg; Register scratch = ip; ConvertDoubleToInt64(double_input, scratch, result, double_scratch); TestIfInt32(result, r0); beq(done); } void MacroAssembler::TruncateDoubleToI(Register result, DoubleRegister double_input) { Label done; TryInlineTruncateDoubleToI(result, double_input, &done); push(r14); lay(sp, MemOperand(sp, -kDoubleSize)); StoreDouble(double_input, MemOperand(sp)); DoubleToIStub stub(isolate(), sp, result, 0, true, true); CallStub(&stub); la(sp, MemOperand(sp, kDoubleSize)); pop(r14); bind(&done); } void MacroAssembler::TruncateHeapNumberToI(Register result, Register object) { Label done; DoubleRegister double_scratch = kScratchDoubleReg; DCHECK(!result.is(object)); LoadDouble(double_scratch, FieldMemOperand(object, HeapNumber::kValueOffset)); TryInlineTruncateDoubleToI(result, double_scratch, &done); push(r14); DoubleToIStub stub(isolate(), object, result, HeapNumber::kValueOffset - kHeapObjectTag, true, true); CallStub(&stub); pop(r14); bind(&done); } void MacroAssembler::TruncateNumberToI(Register object, Register result, Register heap_number_map, Register scratch1, Label* not_number) { Label done; DCHECK(!result.is(object)); UntagAndJumpIfSmi(result, object, &done); JumpIfNotHeapNumber(object, heap_number_map, scratch1, not_number); TruncateHeapNumberToI(result, object); bind(&done); } void MacroAssembler::GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits) { if (CpuFeatures::IsSupported(GENERAL_INSTR_EXT)) { risbg(dst, src, Operand(64 - num_least_bits), Operand(63), Operand(64 - kSmiShift), true); } else { SmiUntag(dst, src); AndP(dst, Operand((1 << num_least_bits) - 1)); } } void MacroAssembler::GetLeastBitsFromInt32(Register dst, Register src, int num_least_bits) { AndP(dst, src, Operand((1 << num_least_bits) - 1)); } void MacroAssembler::CallRuntime(const Runtime::Function* f, int num_arguments, SaveFPRegsMode save_doubles) { CHECK(f->nargs < 0 || f->nargs == num_arguments); mov(r2, Operand(num_arguments)); mov(r3, Operand(ExternalReference(f, isolate()))); CEntryStub stub(isolate(), f->result_size, save_doubles); CallStub(&stub); } void MacroAssembler::CallExternalReference(const ExternalReference& ext, int num_arguments) { mov(r2, Operand(num_arguments)); mov(r3, Operand(ext)); CEntryStub stub(isolate(), 1); CallStub(&stub); } void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid) { const Runtime::Function* function = Runtime::FunctionForId(fid); DCHECK_EQ(1, function->result_size); if (function->nargs >= 0) argument 3205 void MacroAssembler::mov(Register dst, const Operand& src) { function in class:v8::internal::MacroAssembler [all...] |
/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.cc | 7030 void Assembler::mov(Condition cond, function in class:vixl::aarch32::Assembler 7184 Delegate(kMov, &Assembler::mov, cond, size, rd, operand);
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H A D | assembler-aarch32.h | 2598 void mov(Condition cond, 2602 void mov(Register rd, const Operand& operand) { mov(al, Best, rd, operand); } function in class:vixl::aarch32::Assembler 2603 void mov(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler 2604 mov(cond, Best, rd, operand); 2606 void mov(EncodingSize size, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler 2607 mov(al, size, rd, operand);
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H A D | disasm-aarch32.cc | 1908 void Disassembler::mov(Condition cond, function in class:vixl::aarch32::Disassembler 7179 mov(CurrentCond(), 7210 mov(CurrentCond(), Narrow, Register(rd), imm); 7356 mov(CurrentCond(), 7400 mov(CurrentCond(), 7450 mov(CurrentCond(), 7540 mov(CurrentCond(), 7764 mov(CurrentCond(), Narrow, Register(rd), Register(rm)); 8539 mov(CurrentCond(), Wide, Register(rd), imm); 8542 mov(CurrentCon [all...] |