/external/swiftshader/third_party/subzero/pydir/ |
H A D | gen_arm32_reg_tables.py | 6 self.Aliases = list(Alias.strip() for Alias in AliasesStr.split(',')) 9 return 'REGLIST{AliasCount}(RegARM32, {Aliases})'.format( 10 AliasCount=len(self.Aliases), Aliases=', '.join(self.Aliases)) 20 IsFP32=0, IsFP64=0, IsVec128=0, Aliases=None): 33 # The argument Aliases is a string with the register aliasing information. 35 Aliases = RegAliases(Aliases) 44 def Aliases(sel member in class:RegFeatures [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
H A D | InterferenceCache.cpp | 67 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) 68 Aliases[i].second = Aliases[i].first->getTag(); 80 Aliases.clear(); 83 Aliases.push_back(std::make_pair(LIU, LIU->getTag())); 88 unsigned e = Aliases.size(); 91 Iters[i].setMap(Aliases[i].first->getMap()); 96 unsigned i = 0, e = Aliases.size(); 99 if (i == e || Aliases[i].first != LIU) 101 if (LIU->changedSince(Aliases[ [all...] |
H A D | InterferenceCache.h | 60 SmallVector<std::pair<LiveIntervalUnion*, unsigned>, 8> Aliases; member in class:llvm::InterferenceCache::Entry
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/external/swiftshader/third_party/subzero/src/ |
H A D | IceRegAlloc.cpp | 423 const auto &Aliases = *RegAliases[Var->getRegNumTmp()]; local 424 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 468 const auto &Aliases = *RegAliases[Item->getRegNumTmp()]; local 469 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 492 const auto &Aliases = *RegAliases[Item->getRegNumTmp()]; local 493 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 534 const auto &Aliases = *RegAliases[SrcVar->getRegNumTmp()]; local 535 const int SrcReg = (Iter.RegMask & Aliases).find_first(); 571 const auto &Aliases = *RegAliases[Item->getRegNumTmp()]; local 572 for (RegNumT RegAlias : RegNumBVIter(Aliases)) { 603 const auto &Aliases = local 626 const auto &Aliases = *RegAliases[RegNum]; local 639 const auto &Aliases = *RegAliases[Iter.PreferReg]; local 655 const auto &Aliases = *RegAliases[RegNum]; local 668 const auto &Aliases = *RegAliases[Item->getRegNumTmp()]; local 682 const auto &Aliases = *RegAliases[Item->getRegNumTmp()]; local 737 const auto &Aliases = *RegAliases[MinWeightIndex]; local 744 const auto &Aliases = *RegAliases[RegNum]; local 914 const auto &Aliases = *RegAliases[Iter.PreferReg]; local [all...] |
H A D | IceRegistersARM32.h | 101 uint16_t Aliases[1 << NUM_ALIASES_BITS]; member in struct:Ice::ARM32::RegARM32::RegTableType
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H A D | IceTargetLoweringX8632Traits.h | 484 uint16_t Aliases[1 << NUM_ALIASES_BITS]; member in struct:Ice::X8632::TargetX8632Traits::__anon23521 513 SizeT Alias = Entry.Aliases[J];
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H A D | IceInstARM32.cpp | 1574 // This code assumes the Aliases list goes Q_n, S_2n, S_2n+1. The asserts in 1582 assert(RegARM32::RegTable[SrcEntry.Aliases[1]].Encoding + 1 == 1583 RegARM32::RegTable[SrcEntry.Aliases[2]].Encoding); 1584 return static_cast<Register>(SrcEntry.Aliases[1]); 1591 assert(RegARM32::RegTable[SrcEntry.Aliases[2]].Encoding - 1 == 1592 RegARM32::RegTable[SrcEntry.Aliases[1]].Encoding); 1593 return static_cast<Register>(SrcEntry.Aliases[2]); 1636 return static_cast<Register>(RegARM32::RegTable[SrcReg].Aliases[Index + 3]);
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/external/swiftshader/third_party/LLVM/lib/Analysis/ |
H A D | TypeBasedAliasAnalysis.cpp | 139 bool Aliases(const MDNode *A, const MDNode *B) const; 169 /// Aliases - Test whether the type represented by A may alias the 172 TypeBasedAliasAnalysis::Aliases(const MDNode *A, function in class:TypeBasedAliasAnalysis 226 if (Aliases(AM, BM)) 280 if (!Aliases(L, M)) 296 if (!Aliases(M1, M2))
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/external/llvm/include/llvm/Analysis/ |
H A D | TypeBasedAliasAnalysis.h | 46 bool Aliases(const MDNode *A, const MDNode *B) const;
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/external/icu/android_icu4j/src/main/java/android/icu/impl/locale/ |
H A D | XLikelySubtags.java | 64 public static class Aliases { class in class:XLikelySubtags 75 public Aliases(String key) { method in class:XLikelySubtags.Aliases 111 public static Aliases LANGUAGE_ALIASES = new Aliases("language"); 112 public static Aliases REGION_ALIASES = new Aliases("territory");
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/external/icu/icu4j/main/classes/core/src/com/ibm/icu/impl/locale/ |
H A D | XLikelySubtags.java | 60 public static class Aliases { class in class:XLikelySubtags 71 public Aliases(String key) { method in class:XLikelySubtags.Aliases 107 public static Aliases LANGUAGE_ALIASES = new Aliases("language"); 108 public static Aliases REGION_ALIASES = new Aliases("territory");
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/external/llvm/lib/Analysis/ |
H A D | TypeBasedAliasAnalysis.cpp | 296 if (Aliases(AM, BM)) 351 if (!Aliases(L, M)) 366 if (!Aliases(M1, M2)) 478 /// Aliases - Test whether the type represented by A may alias the 480 bool TypeBasedAAResult::Aliases(const MDNode *A, const MDNode *B) const { function in class:TypeBasedAAResult
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/external/vixl/src/aarch64/ |
H A D | macro-assembler-aarch64.h | 562 // Aliases. 1474 VIXL_ASSERT(!rt.Aliases(rt2)); 1583 VIXL_ASSERT(!rt.Aliases(rt2)); 1882 VIXL_ASSERT(!rs.Aliases(dst.GetBaseRegister())); 1883 VIXL_ASSERT(!rs.Aliases(rt)); 1884 VIXL_ASSERT(!rs.Aliases(rt2)); 1890 VIXL_ASSERT(!rs.Aliases(dst.GetBaseRegister())); 1891 VIXL_ASSERT(!rs.Aliases(rt)); 1897 VIXL_ASSERT(!rs.Aliases(dst.GetBaseRegister())); 1898 VIXL_ASSERT(!rs.Aliases(r [all...] |
H A D | macro-assembler-aarch64.cc | 2460 if (args[i].Aliases(pcs[i])) continue; 2568 VIXL_ASSERT(!sp.Aliases(arg0)); 2569 VIXL_ASSERT(!sp.Aliases(arg1)); 2570 VIXL_ASSERT(!sp.Aliases(arg2)); 2571 VIXL_ASSERT(!sp.Aliases(arg3)); 2595 bool arg0_sp = StackPointer().Aliases(arg0); 2596 bool arg1_sp = StackPointer().Aliases(arg1); 2597 bool arg2_sp = StackPointer().Aliases(arg2); 2598 bool arg3_sp = StackPointer().Aliases(arg3);
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H A D | operands-aarch64.h | 168 bool Aliases(const CPURegister& other) const { 175 return Aliases(other) && (size_ == other.size_);
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/external/clang/lib/Basic/ |
H A D | TargetInfo.cpp | 392 for (const char *A : GRA.Aliases) { 433 for (const char *A : RA.Aliases) {
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/external/llvm/utils/TableGen/ |
H A D | CodeGenSchedule.h | 56 RecVec Aliases; member in struct:llvm::CodeGenSchedRW 87 assert((!IsAlias || Aliases.empty()) && "Alias cannot have aliases");
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H A D | CodeGenSchedule.cpp | 296 // Initialize Aliases vectors. 304 RW.Aliases.push_back(*AI); 426 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); 1007 for (RecIter I = RW.Aliases.begin(), E = RW.Aliases.end(); I != E; ++I) { 1077 for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end(); 1335 // of the ReadWrite list, following Aliases if necessary. 1638 for (RecIter AI = SchedRW.Aliases [all...] |
H A D | AsmWriterEmitter.cpp | 737 // Aliases with larger priorities should be considered first. 769 continue; // Aliases with priority 0 are never emitted. 787 for (auto &Aliases : AliasMap) { 788 for (auto &Alias : Aliases.second) { 937 IAPrinterMap[Aliases.first].push_back(std::move(IAP));
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H A D | AsmMatcherEmitter.cpp | 2533 std::vector<Record*> &Aliases, 2540 for (Record *R : Aliases) { 2610 std::vector<Record*> Aliases = 2612 if (Aliases.empty()) return false; 2623 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2, 2630 emitMnemonicAliasVariant(OS, Info, Aliases);
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
H A D | ARMFrameLowering.cpp | 916 for (const unsigned *Aliases = 917 RegInfo->getAliasSet(Reg); *Aliases; ++Aliases) { 918 if (MF.getRegInfo().isPhysRegUsed(*Aliases)) {
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
H A D | AsmWriterEmitter.cpp | 834 std::vector<CodeGenInstAlias*> &Aliases = I->second; local 837 II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) {
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H A D | AsmMatcherEmitter.cpp | 1904 std::vector<Record*> Aliases = 1906 if (Aliases.empty()) return false; 1915 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { 1916 Record *R = Aliases[i];
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/external/clang/include/clang/Basic/ |
H A D | TargetInfo.h | 759 const char * const Aliases[5]; member in struct:clang::TargetInfo::GCCRegAlias
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/external/v8/src/arm64/ |
H A D | macro-assembler-arm64.cc | 4284 if (args[i].Aliases(pcs[i])) continue; 4386 DCHECK(!csp.Aliases(arg0)); 4387 DCHECK(!csp.Aliases(arg1)); 4388 DCHECK(!csp.Aliases(arg2)); 4389 DCHECK(!csp.Aliases(arg3)); 4417 bool arg0_sp = StackPointer().Aliases(arg0); 4418 bool arg1_sp = StackPointer().Aliases(arg1); 4419 bool arg2_sp = StackPointer().Aliases(arg2); 4420 bool arg3_sp = StackPointer().Aliases(arg3);
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