| /external/vixl/test/aarch32/ |
| H A D | test-disasm-a32.cc | 1596 COMPARE_T32(Asr(r2, r2, Operand(r2, ROR, r2)),
1600 COMPARE_T32(Asr(r2, r2, Operand(r2, ROR, r2)),
3259 COMPARE_T32(Asr(eq, r0, r1, 16),
3263 COMPARE_T32(Asr(eq, r0, r1, 32),
3267 COMPARE_T32(Asr(eq, r0, r1, 0),
3273 COMPARE_T32(Asr(eq, r7, r7, r3),
3277 COMPARE_T32(Asr(eq, r8, r8, r3),
4025 CHECK_T32_16(Asr(DontCare, r0, r1, 32), "asrs r0, r1, #32\n");
4027 CHECK_T32_16_IT_BLOCK(Asr(DontCare, eq, r0, r1, 32),
4031 CHECK_T32_16(Asr(DontCar
[all...] |
| H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 142 M(Asr) \
|
| H A D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 142 M(Asr) \
|
| H A D | test-assembler-aarch32.cc | 785 __ Asr(r5, r1, 16);
813 __ Asr(r5, r1, r9);
|
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| H A D | assembler_arm.h | 1059 void Asr(Register rd, Register rm, const Operand& shift_imm,
1062 void Asr(Register rd, Register rm, Register rs, Condition cond = AL);
1089 Asr(reg, reg, Operand(kSmiTagSize), cond);
1093 Asr(dst, src, Operand(kSmiTagSize), cond);
|
| H A D | assembler_arm.cc | 2632 void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
2636 ASSERT(shift != 0); // Do not use Asr if no shift is wanted.
2648 ASSERT(shift != 0); // Do not use Asr if no shift is wanted.
2657 void Assembler::Asr(Register rd, Register rm, Register rs, Condition cond) {
2681 Asr(rd, rm, Operand(31), cond);
|
| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 329 void MacroAssembler::Asr(const Register& rd, function in class:v8::internal::MacroAssembler
338 void MacroAssembler::Asr(const Register& rd, function in class:v8::internal::MacroAssembler
1314 Asr(dst, src, kSmiShift);
|
| H A D | macro-assembler-arm64.h | 338 inline void Asr(const Register& rd, const Register& rn, unsigned shift);
339 inline void Asr(const Register& rd, const Register& rn, const Register& rm);
|
| H A D | macro-assembler-arm64.cc | 4541 Asr(result.X(), result.X(), 32);
4545 if (mag.shift > 0) Asr(result, result, mag.shift);
|
| /external/v8/src/crankshaft/arm64/ |
| H A D | lithium-codegen-arm64.cc | 3538 __ Asr(result, result, shift);
4100 __ Asr(result, left, kSmiShift / 2);
4489 case Token::SAR: __ Asr(result, left, right); break;
4512 case Token::SAR: __ Asr(result, left, shift_count); break;
4547 __ Asr(result, left, result);
4580 __ Asr(result, left, shift_count);
|
| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 384 Asr, enumerator in enum:Ice::ARM32::InstARM32::InstKindARM32
1006 using InstARM32Asr = InstARM32ThreeAddrGPR<InstARM32::Asr>;
|
| H A D | IceInstARM32.cpp | 3486 template class InstARM32ThreeAddrGPR<InstARM32::Asr>;
|
| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 1133 ASSEMBLE_SHIFT(Asr, 64);
1136 ASSEMBLE_SHIFT(Asr, 32);
|
| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 980 void Asr(const Register& rd, const Register& rn, unsigned shift) { function in class:vixl::aarch64::MacroAssembler
987 void Asr(const Register& rd, const Register& rn, const Register& rm) { function in class:vixl::aarch64::MacroAssembler
|
| /external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 1229 void Asr(Condition cond, Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
1246 void Asr(Register rd, Register rm, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
1247 Asr(al, rd, rm, operand);
1249 void Asr(FlagsUpdate flags, function in class:vixl::aarch32::MacroAssembler
1256 Asr(cond, rd, rm, operand);
1270 Asr(cond, rd, rm, operand);
1275 void Asr(FlagsUpdate flags, function in class:vixl::aarch32::MacroAssembler
1279 Asr(flags, al, rd, rm, operand);
|
| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 9563 __ Asr(x16, x0, x1);
9564 __ Asr(x17, x0, x2);
9565 __ Asr(x18, x0, x3);
9566 __ Asr(x19, x0, x4);
9567 __ Asr(x20, x0, x5);
9568 __ Asr(x21, x0, x6);
9570 __ Asr(w22, w0, w1);
9571 __ Asr(w23, w0, w2);
9572 __ Asr(w24, w0, w3);
9573 __ Asr(w2
[all...] |
| /external/v8/src/full-codegen/arm64/ |
| H A D | full-codegen-arm64.cc | 1536 __ Asr(result, left, right);
|