| /external/vixl/test/aarch32/ |
| H A D | test-disasm-a32.cc | 1491 COMPARE_BOTH(Bic(r0, r1, 0xffffffff), "mov r0, #0\n");
1492 COMPARE_BOTH(Bic(r0, r0, 0), "");
3282 COMPARE_T32(Bic(eq, r7, r7, r6),
3286 COMPARE_T32(Bic(eq, r8, r8, r6),
4037 CHECK_T32_16(Bic(DontCare, r7, r7, r6), "bics r7, r6\n");
4039 CHECK_T32_16_IT_BLOCK(Bic(DontCare, eq, r7, r7, r6),
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| H A D | test-assembler-aarch32.cc | 961 __ Bic(r3, r0, r1);
962 __ Bic(r4, r0, Operand(r1, LSL, 4));
963 __ Bic(r5, r0, Operand(r1, LSR, 1));
964 __ Bic(r6, r0, Operand(r1, ASR, 20));
965 __ Bic(r7, r0, Operand(r1, ROR, 28));
966 __ Bic(r8, r0, 0x1f);
970 __ Bic(r9, r1, Operand(r1, RRX));
974 __ Bic(r10, r1, Operand(r1, RRX));
3265 __ Bic(r0, r0, 0);
3309 __ Bic(r
[all...] |
| H A D | test-simulator-cond-rd-rn-operand-rm-a32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-t32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-const-a32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-const-t32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 122 M(Bic) \
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| H A D | test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 122 M(Bic) \
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| /external/v8/src/arm64/ |
| H A D | macro-assembler-arm64-inl.h | 71 void MacroAssembler::Bic(const Register& rd, function in class:v8::internal::MacroAssembler
1441 Bic(untagged_obj, obj, kHeapObjectTag);
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| H A D | macro-assembler-arm64.h | 180 inline void Bic(const Register& rd,
880 Bic(csp, StackPointer(), sp_alignment - 1);
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| H A D | macro-assembler-arm64.cc | 1852 Bic(csp, old_stack_pointer, sp_alignment - 1);
3544 Bic(key, key, Operand(0xc0000000u));
3974 Bic(bitmap_reg, addr_reg, Page::kPageAlignmentMask);
4342 Bic(csp, StackPointer(), 0xf);
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| H A D | code-stubs-arm64.cc | 1657 __ Bic(x11, current_offset, kSmiShiftMask);
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| /external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 990 __ Bic(x2, x0, Operand(x1));
991 __ Bic(w3, w0, Operand(w1, LSL, 4));
992 __ Bic(x4, x0, Operand(x1, LSL, 4));
993 __ Bic(x5, x0, Operand(x1, LSR, 1));
994 __ Bic(w6, w0, Operand(w1, ASR, 20));
995 __ Bic(x7, x0, Operand(x1, ASR, 20));
996 __ Bic(w8, w0, Operand(w1, ROR, 28));
997 __ Bic(x9, x0, Operand(x1, ROR, 24));
998 __ Bic(x10, x0, Operand(0x1f));
999 __ Bic(x1
[all...] |
| H A D | test-disasm-aarch64.cc | 2990 COMPARE_MACRO(Bic(w6, w7, 0), "mov w6, w7");
2991 COMPARE_MACRO(Bic(x6, x7, 0), "mov x6, x7");
3007 COMPARE_MACRO(Bic(w18, w19, 0xffffffff), "mov w18, #0x0");
3008 COMPARE_MACRO(Bic(x18, x19, 0xffffffff), "and x18, x19, #0xffffffff00000000");
3009 COMPARE_MACRO(Bic(x18, x19, 0xffffffffffffffff), "mov x18, #0x0");
4508 COMPARE_MACRO(Bic(v6.V8B(), v7.V8B(), v8.V8B()), "bic v6.8b, v7.8b, v8.8b");
4509 COMPARE_MACRO(Bic(v6.V16B(), v7.V16B(), v8.V16B()),
5553 COMPARE_MACRO(Bic(v4.V4H(), 0xaa, 0), "bic v4.4h, #0xaa, lsl #0");
5554 COMPARE_MACRO(Bic(v1.V8H(), 0xcc, 8), "bic v1.8h, #0xcc, lsl #8");
5555 COMPARE_MACRO(Bic(v
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 385 Bic, enumerator in enum:Ice::ARM32::InstARM32::InstKindARM32
1007 using InstARM32Bic = InstARM32ThreeAddrGPR<InstARM32::Bic>;
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| H A D | IceInstARM32.cpp | 3487 template class InstARM32ThreeAddrGPR<InstARM32::Bic>;
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| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 981 __ Bic(i.OutputRegister(), i.InputOrZeroRegister64(0),
985 __ Bic(i.OutputRegister32(), i.InputOrZeroRegister32(0),
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| /external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.cc | 752 void MacroAssembler::Bic(const Register& rd, function in class:vixl::aarch64::MacroAssembler
2528 Bic(sp, StackPointer(), 0xf);
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| H A D | macro-assembler-aarch64.h | 650 void Bic(const Register& rd, const Register& rn, const Operand& operand);
2164 V(bic, Bic) \
2486 void Bic(const VRegister& vd, const int imm8, const int left_shift = 0) { function in class:vixl::aarch64::MacroAssembler
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| /external/v8/src/crankshaft/arm64/ |
| H A D | lithium-codegen-arm64.cc | 3366 __ Bic(result_bits, result_bits, kXSignMask);
4548 __ Bic(result, result, kSmiShiftMask);
4555 __ Bic(result, result, kSmiShiftMask);
4581 __ Bic(result, result, kSmiShiftMask);
4588 __ Bic(result, result, kSmiShiftMask);
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| /external/v8/src/full-codegen/arm64/ |
| H A D | full-codegen-arm64.cc | 1537 __ Bic(result, result, kSmiShiftMask);
1549 __ Bic(result, x10, kSmiShiftMask);
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| /external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 1347 void Bic(Condition cond, Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
1371 void Bic(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::MacroAssembler
1372 Bic(al, rd, rn, operand);
1374 void Bic(FlagsUpdate flags, function in class:vixl::aarch32::MacroAssembler
1381 Bic(cond, rd, rn, operand);
1393 Bic(cond, rd, rn, operand);
1398 void Bic(FlagsUpdate flags, function in class:vixl::aarch32::MacroAssembler
1402 Bic(flags, al, rd, rn, operand);
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