/external/vixl/examples/aarch64/ |
H A D | custom-disassembler.cc | 41 AppendToOutput(reg.Is64Bits() ? "ip0" : "wip0"); 44 AppendToOutput(reg.Is64Bits() ? "ip1" : "wip1"); 47 AppendToOutput(reg.Is64Bits() ? "lr" : "w30"); 50 AppendToOutput(reg.Is64Bits() ? "x_stack_pointer" : "w_stack_pointer"); 53 AppendToOutput(reg.Is64Bits() ? "x_zero_reg" : "w_zero_reg");
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/external/vixl/src/aarch64/ |
H A D | operands-aarch64.cc | 306 VIXL_ASSERT(reg.Is64Bits() || (shift_amount < kWRegSize)); 322 VIXL_ASSERT(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); 368 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); 390 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); 405 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); 410 VIXL_ASSERT(regoffset.Is64Bits() || (extend != SXTX)); 425 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); 426 VIXL_ASSERT(regoffset.Is64Bits() && !regoffset.IsSP()); 438 VIXL_ASSERT(base.Is64Bits() && !base.IsZero()); 453 VIXL_ASSERT(regoffset_.Is64Bits() [all...] |
H A D | assembler-aarch64.cc | 181 VIXL_ASSERT(xn.Is64Bits()); 187 VIXL_ASSERT(xn.Is64Bits()); 193 VIXL_ASSERT(xn.Is64Bits()); 352 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); 365 VIXL_ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSize))); 378 VIXL_ASSERT(xd.Is64Bits()); 389 VIXL_ASSERT(xd.Is64Bits()); 606 VIXL_ASSERT(rd.Is64Bits() || rn.Is32Bits()); 763 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && xm.Is64Bits()); 795 VIXL_ASSERT(wd.Is32Bits() && wn.Is32Bits() && xm.Is64Bits()); [all...] |
H A D | operands-aarch64.h | 121 bool Is64Bits() const { 195 bool IsX() const { return IsValidRegister() && Is64Bits(); } 207 bool IsD() const { return IsV() && Is64Bits(); } 370 bool Is8B() const { return (Is64Bits() && (lanes_ == 8)); } 372 bool Is4H() const { return (Is64Bits() && (lanes_ == 4)); } 374 bool Is2S() const { return (Is64Bits() && (lanes_ == 2)); } 376 bool Is1D() const { return (Is64Bits() && (lanes_ == 1)); }
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H A D | macro-assembler-aarch64.cc | 417 VIXL_ASSERT(IsUint32(imm) || IsInt32(imm) || rd.Is64Bits()); 525 masm->movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask)); 829 VIXL_ASSERT(rd.Is64Bits() || IsUint32(immediate)); 849 } else if ((rd.Is64Bits() && (immediate == UINT64_C(0xffffffffffffffff))) || 898 operand.GetRegister().Is64Bits() || 952 movi(vd.Is64Bits() ? vd.V8B() : vd.V16B(), byte1); 987 movi(vd.Is64Bits() ? vd.V1D() : vd.V2D(), ((imm << 32) | imm)); 1034 Movi16bitHelper(vd.Is64Bits() ? vd.V4H() : vd.V8H(), imm & 0xffff); 1067 Movi32bitHelper(vd.Is64Bits() ? vd.V2S() : vd.V4S(), imm & 0xffffffff); 1688 if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() [all...] |
H A D | assembler-aarch64.h | 2692 return rd.Is64Bits() ? SixtyFourBits : ThirtyTwoBits; 2868 static Instr FPType(FPRegister fd) { return fd.Is64Bits() ? FP64 : FP32; } 2893 if (vd.Is64Bits()) { 2926 VIXL_ASSERT(vd.Is32Bits() || vd.Is64Bits()); 2927 return vd.Is64Bits() ? FP64 : FP32; 2932 VIXL_ASSERT(vd.Is64Bits() || vd.Is128Bits()); 2943 if (vd.Is64Bits()) { 3086 return reg.Is64Bits() ? Register(xzr) : Register(wzr);
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H A D | macro-assembler-aarch64.h | 49 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \ 52 V(Ldrsh, Register&, rt, rt.Is64Bits() ? LDRSH_x : LDRSH_w) \ 1350 if (!vd.Is(vn) || !vd.Is64Bits()) { 1549 if (rt.Is64Bits()) {
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H A D | disasm-aarch64.cc | 4025 reg_char = reg.Is64Bits() ? 'x' : 'w'; 4052 AppendToOutput("%s", reg.Is64Bits() ? "sp" : "wsp");
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H A D | debugger-aarch64.cc | 94 return value().Is64Bits();
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/external/v8/src/arm64/ |
H A D | assembler-arm64-inl.h | 67 inline bool CPURegister::Is64Bits() const { function in class:v8::internal::CPURegister 335 DCHECK(reg.Is64Bits() || (shift_amount < kWRegSizeInBits)); 352 DCHECK(reg.Is64Bits() || ((extend != SXTX) && (extend != UXTX))); 383 return Operand(reg_, reg_.Is64Bits() ? UXTX : UXTW, shift_amount_); 426 DCHECK(smi.Is64Bits()); 434 DCHECK(smi.Is64Bits()); 454 DCHECK(base.Is64Bits() && !base.IsZero()); 464 DCHECK(base.Is64Bits() && !base.IsZero()); 469 DCHECK(regoffset.Is64Bits() || (extend != SXTX)); 479 DCHECK(base.Is64Bits() [all...] |
H A D | assembler-arm64.cc | 978 DCHECK(xn.Is64Bits()); 984 DCHECK(xn.Is64Bits()); 993 DCHECK(xn.Is64Bits()); 1055 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); 1070 DCHECK(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits))); 1083 DCHECK(rd.Is64Bits()); 1299 DCHECK(rd.Is64Bits() || rn.Is32Bits()); 1469 DCHECK(rd.Is64Bits() && ra.Is64Bits()); 1479 DCHECK(rd.Is64Bits() [all...] |
H A D | code-stubs-arm64.h | 81 DCHECK(object.Is64Bits()); 82 DCHECK(value.Is64Bits()); 83 DCHECK(address.Is64Bits());
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H A D | macro-assembler-arm64-inl.h | 460 DCHECK(!rd.IsSP() && rd.Is64Bits()); 473 DCHECK(rd.Is64Bits() && rn.Is64Bits()); 726 if (!fd.Is(fn) || !fd.Is64Bits()) { 745 DCHECK(fd.Is64Bits()); 758 if (fd.Is64Bits()) { 896 DCHECK(rt.Is64Bits()); 962 if (!rd.Is(rn) || !rd.Is64Bits()) { 1299 DCHECK(dst.Is64Bits() && src.Is64Bits()); [all...] |
H A D | codegen-arm64.cc | 101 DCHECK(string.Is64Bits() && index.Is32Bits() && result.Is64Bits());
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H A D | macro-assembler-arm64.cc | 84 DCHECK(rd.Is64Bits() || is_uint32(immediate)); 102 } else if ((rd.Is64Bits() && (immediate == -1L)) || 146 DCHECK(operand.reg().Is64Bits() || 163 DCHECK(is_uint32(imm) || is_int32(imm) || rd.Is64Bits()); 427 movn(dst, dst.Is64Bits() ? ~imm : (~imm & kWRegMask)); 480 if (operand.IsZero() && rd.Is(rn) && rd.Is64Bits() && rn.Is64Bits() && 548 DCHECK(operand.reg().Is64Bits() || 643 DCHECK(rt.Is64Bits()); 661 DCHECK(rt.Is64Bits()); [all...] |
H A D | macro-assembler-arm64.h | 58 V(Ldrsb, Register&, rt, rt.Is64Bits() ? LDRSB_x : LDRSB_w) \ 61 V(Ldrsh, Register&, rt, rt.Is64Bits() ? LDRSH_x : LDRSH_w) \ 1089 DCHECK(as_int.Is64Bits());
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/external/llvm/tools/llvm-objdump/ |
H A D | ELFDump.cpp | 54 const char *Fmt = ELFT::Is64Bits ? "0x%016" PRIx64 " " : "0x%08" PRIx64 " ";
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/external/vixl/test/aarch64/ |
H A D | test-utils-aarch64.cc | 151 VIXL_ASSERT(reg.Is64Bits()); 190 VIXL_ASSERT(fpreg.Is64Bits()); 198 VIXL_ASSERT(reg0.Is64Bits() && reg1.Is64Bits()); 208 VIXL_ASSERT(vreg.Is64Bits());
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/external/llvm/include/llvm/Object/ |
H A D | ELFTypes.h | 46 static const bool Is64Bits = Is64; member in struct:llvm::object::ELFType 140 LLVM_ELF_IMPORT_TYPES(ELFT::TargetEndianness, ELFT::Is64Bits) 365 typedef typename std::conditional<ELFT::Is64Bits, 367 typedef typename std::conditional<ELFT::Is64Bits,
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H A D | MachO.h | 197 create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits); 445 MachOObjectFile(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits,
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H A D | ELFObjectFile.h | 346 ELFT::Is64Bits); 754 getELFType(ELFT::TargetEndianness == support::little, ELFT::Is64Bits), 830 return ELFT::Is64Bits ? 8 : 4;
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H A D | ELF.h | 40 typedef typename std::conditional<ELFT::Is64Bits,
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/external/llvm/tools/llvm-readobj/ |
H A D | ELFDumper.cpp | 1771 bool Is64 = ELFT::Is64Bits; 2462 unsigned Width = ELFT::Is64Bits ? 16 : 8; 2463 unsigned Bias = ELFT::Is64Bits ? 8 : 0; 2530 printRelocHeader(OS, ELFT::Is64Bits, (Sec.sh_type == ELF::SHT_RELA)); 2640 if (ELFT::Is64Bits) { 2721 if (ELFT::Is64Bits) 2779 if (ELFT::Is64Bits) { 2894 unsigned Bias = ELFT::Is64Bits ? 8 : 0; 2895 unsigned Width = ELFT::Is64Bits ? 18 : 10; 2896 unsigned SizeWidth = ELFT::Is64Bits [all...] |
/external/llvm/tools/yaml2obj/ |
H A D | yaml2elf.cpp | 166 Header.e_ident[EI_CLASS] = ELFT::Is64Bits ? ELFCLASS64 : ELFCLASS32;
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/external/llvm/lib/Object/ |
H A D | MachOObjectFile.cpp | 253 bool Is64Bits) { 257 Is64Bits, Err)); 252 create(MemoryBufferRef Object, bool IsLittleEndian, bool Is64Bits) argument
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