Searched refs:SWL (Results 1 - 10 of 10) sorted by relevance
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 232 case Mips::SWL:
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| /external/v8/src/mips/ |
| H A D | constants-mips.h | 381 SWL = ((5U << 3) + 2) << kOpcodeShift,
917 OpcodeToBitNumber(SWL) | OpcodeToBitNumber(SW) | OpcodeToBitNumber(SWR) |
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| H A D | assembler-mips.cc | 1937 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_);
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| H A D | simulator-mips.cc | 4493 case SWL: {
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| /external/v8/src/mips64/ |
| H A D | constants-mips64.h | 358 SWL = ((5U << 3) + 2) << kOpcodeShift,
951 OpcodeToBitNumber(SWL) | OpcodeToBitNumber(SW) | OpcodeToBitNumber(SD) |
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| H A D | assembler-mips64.cc | 2107 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_);
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| H A D | simulator-mips64.cc | 4738 case SWL: {
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 204 SWL,
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| H A D | MipsISelLowering.cpp | 149 case MipsISD::SWL: return "MipsISD::SWL";
2356 SDValue SWL = createStoreLR(MipsISD::SWL, DAG, SD, Chain, local
2358 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3);
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| /external/capstone/arch/Mips/ |
| H A D | MipsGenAsmWriter.inc | 1600 12605056U, // SWL
3314 0U, // SWL
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