| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 226 SADDO, UADDO, enumerator in enum:llvm::ISD::NodeType
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| H A D | SelectionDAG.h | 905 case ISD::UADDO:
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 232 SADDO, UADDO, enumerator in enum:llvm::ISD::NodeType
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| H A D | SelectionDAG.h | 1183 case ISD::UADDO:
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 134 case ISD::UADDO:
744 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
1399 case ISD::UADDO:
1762 ISD::UADDO : ISD::USUBO,
1770 Lo = DAG.getNode(ISD::UADDO, dl, VTList, LoOps);
2527 SDValue Sum = DAG.getNode(N->getOpcode() == ISD::UADDO ?
2535 N->getOpcode () == ISD::UADDO ?
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| H A D | SelectionDAGDumper.cpp | 229 case ISD::UADDO: return "uaddo";
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| H A D | LegalizeDAG.cpp | 3357 case ISD::UADDO:
3361 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ?
3369 = Node->getOpcode() == ISD::UADDO ? ISD::SETULT : ISD::SETUGT;
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| H A D | SelectionDAG.cpp | 2125 case ISD::UADDO:
2616 case ISD::UADDO:
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| H A D | SelectionDAGBuilder.cpp | 5507 case Intrinsic::uadd_with_overflow: Op = ISD::UADDO; break;
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| H A D | DAGCombiner.cpp | 2671 return DAG.getNode(ISD::UADDO, SDLoc(N), N->getVTList(),
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 116 case ISD::UADDO:
620 unsigned Opcode = N->getOpcode() == ISD::UADDO ? ISD::ADD : ISD::SUB;
1154 case ISD::UADDO:
2226 SDValue Sum = DAG.getNode(N->getOpcode() == ISD::UADDO ?
2234 N->getOpcode () == ISD::UADDO ?
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| H A D | LegalizeDAG.cpp | 858 case ISD::UADDO:
3585 case ISD::UADDO:
3589 SDValue Sum = DAG.getNode(Node->getOpcode() == ISD::UADDO ?
3594 Node->getOpcode () == ISD::UADDO ?
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| H A D | SelectionDAG.cpp | 1734 case ISD::UADDO:
2169 case ISD::UADDO:
6019 case ISD::UADDO: return "uaddo";
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| H A D | DAGCombiner.cpp | 2180 return DAG.getNode(ISD::UADDO, N->getDebugLoc(), N->getVTList(),
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| H A D | SelectionDAGBuilder.cpp | 5083 return implVisitAluOverflow(I, ISD::UADDO);
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| /external/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 136 setOperationAction(ISD::UADDO, MVT::i32, Custom);
622 case ISD::UADDO: return LowerUADDSUBO(Op, DAG, ISD::ADD, AMDGPUISD::CARRY);
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| /external/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 881 setOperationAction(ISD::UADDO, VT, Expand);
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1853 setOperationAction(ISD::UADDO, VT, Expand);
1938 ISD::SUBC, ISD::SADDO, ISD::UADDO, ISD::SSUBO, ISD::USUBO,
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 241 setOperationAction(ISD::UADDO, MVT::i32, Custom);
242 setOperationAction(ISD::UADDO, MVT::i64, Custom);
1631 case ISD::UADDO:
2343 case ISD::UADDO:
3638 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
4087 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 721 setOperationAction(ISD::UADDO, MVT::i32, Custom);
3534 case ISD::UADDO:
3587 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO ||
7211 case ISD::UADDO:
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1585 setOperationAction(ISD::UADDO, VT, Custom);
15904 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
15913 case ISD::UADDO: X86Opcode = X86ISD::ADD; X86Cond = X86::COND_B; break;
16546 Cond.getOperand(0).getOpcode() == ISD::UADDO ||
16592 // e.g. SADDO, UADDO.
16600 if (CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO ||
16613 case ISD::UADDO: X86Opcode = X86ISD::ADD; X86Cond = X86::COND_B; break;
20488 // set CF, so we can't do this for UADDO.
20497 case ISD::UADDO:
21745 case ISD::UADDO
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 1119 setOperationAction(ISD::UADDO, VT, Custom);
8823 // e.g. SADDO, UADDO.
10057 // set CF, so we can't do this for UADDO.
10067 case ISD::UADDO:
10442 case ISD::UADDO:
|