Searched refs:exec_size (Results 1 - 25 of 40) sorted by relevance

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/external/mesa3d/src/gallium/drivers/vc4/kernel/
H A Dvc4_gem.c43 uint32_t exec_size = uniforms_offset + args->uniforms_size; local
44 uint32_t temp_size = exec_size + (sizeof(struct vc4_shader_state) *
48 exec_size < uniforms_offset ||
51 temp_size < exec_size) {
73 exec->shader_state = temp + exec_size;
100 exec->exec_bo = drm_gem_cma_create(dev, exec_size);
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_vec4_cse.cpp133 a->exec_size == b->exec_size &&
186 const unsigned width = entry->generator->exec_size;
194 copy->exec_size = width;
207 const unsigned width = inst->exec_size;
215 copy->exec_size = inst->exec_size;
H A Dbrw_fs_generator.cpp84 const unsigned phys_width = compressed ? inst->exec_size / 2 :
85 inst->exec_size;
220 } else if (inst->exec_size == 16)
390 assert(inst->exec_size == 8 || devinfo->gen >= 8);
566 struct brw_reg delta_y = offset(src[0], inst->exec_size / 8);
590 switch (inst->exec_size) {
656 switch (inst->exec_size) {
767 if (inst->exec_size == 8) {
786 assert(inst->exec_size == 8);
797 assert(inst->exec_size
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H A Dbrw_ir_fs.h327 fs_inst(enum opcode opcode, uint8_t exec_size);
328 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst);
329 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
331 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
333 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
335 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst,
H A Dbrw_fs_cmod_propagation.cpp95 scan_inst->exec_size != inst->exec_size)
H A Dbrw_vec4_cmod_propagation.cpp80 scan_inst->exec_size != inst->exec_size ||
H A Dbrw_fs.cpp51 fs_inst::init(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, argument
63 this->exec_size = exec_size;
68 assert(this->exec_size != 0);
79 this->size_written = dst.component_size(exec_size);
97 fs_inst::fs_inst(enum opcode opcode, uint8_t exec_size) argument
99 init(opcode, exec_size, reg_undef, NULL, 0);
102 fs_inst::fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst) argument
104 init(opcode, exec_size, dst, NULL, 0);
107 fs_inst::fs_inst(enum opcode opcode, uint8_t exec_size, cons argument
114 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, const fs_reg &src0, const fs_reg &src1) argument
121 fs_inst(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, const fs_reg &src0, const fs_reg &src1, const fs_reg &src2) argument
1565 const unsigned exec_size = local
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H A Dbrw_fs_sel_peephole.cpp165 then_mov[i]->exec_size != else_mov[i]->exec_size ||
H A Dbrw_fs_dead_code_eliminate.cpp119 if (!inst->predicate && inst->exec_size >= 8)
H A Dbrw_fs_builder.h74 _dispatch_width(inst->exec_size),
360 assert(inst->exec_size <= 32);
361 assert(inst->exec_size == dispatch_width() ||
H A Dbrw_fs_cse.cpp178 a->exec_size == b->exec_size &&
204 DIV_ROUND_UP(inst->dst.component_size(inst->exec_size), REG_SIZE);
H A Dbrw_vec4_builder.h71 _dispatch_width(inst->exec_size), _group(inst->group),
314 inst->exec_size = dispatch_width();
317 inst->size_written = inst->exec_size * type_sz(inst->dst.type);
H A Dbrw_disasm.c169 static const char *const exec_size[8] = { variable
1191 int exec_size = 1 << brw_inst_exec_size(devinfo, inst); local
1193 if (exec_size < 8) {
1197 } else if (exec_size == 8) {
1212 } else if (exec_size == 16) {
1292 err |= control(file, "execution size", exec_size,
H A Dbrw_vec4_reg_allocate.cpp420 if (type_sz(inst->src[i].type) == 8 && inst->exec_size != 8)
447 if (type_sz(inst->dst.type) == 8 && inst->exec_size != 8)
H A Dbrw_vec4.cpp238 return exec_size * type_sz(src[arg].type);
1487 inst->exec_size);
1661 if (inst->exec_size != 8)
2077 return inst->exec_size;
2082 unsigned lowered_width = MIN2(16, inst->exec_size);
2157 assert(lowered_width <= inst->exec_size);
2158 if (lowered_width == inst->exec_size)
2174 for (unsigned n = 0; n < inst->exec_size / lowered_width; n++) {
2184 linst->exec_size = lowered_width;
2196 copy->exec_size
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H A Dbrw_fs_register_coalesce.cpp57 inst->exec_size * dst.stride *
H A Dbrw_shader.h141 uint8_t exec_size; member in struct:backend_instruction::backend_instruction
147 * given by [group, group + exec_size) will be used to mask GRF writes and
H A Dbrw_fs_live_variables.cpp138 if (!inst->predicate && inst->exec_size >= 8)
/external/mesa3d/src/gallium/drivers/ilo/shader/
H A Dilo_shader_cs.c135 inst->exec_size = GEN6_EXECSIZE_8;
163 ccc->tc.templ.exec_size = GEN6_EXECSIZE_16;
H A Dtoy_compiler_asm.c748 cg->inst->exec_size << 21 |
774 cg->inst->exec_size << 21 |
938 const int exec_size = exec_size_map[cg->inst->exec_size]; local
944 assert(exec_size <= 16);
955 assert(exec_size >= width);
957 if (exec_size == width) {
968 if (exec_size == 1)
H A Dilo_shader_fs.c277 switch (inst->exec_size) {
365 inst->exec_size = GEN6_EXECSIZE_1;
413 inst->exec_size = GEN6_EXECSIZE_8;
424 inst->exec_size = GEN6_EXECSIZE_8;
728 switch (inst->exec_size) {
1250 tmp->exec_size = GEN6_EXECSIZE_1;
1257 tmp->exec_size = GEN6_EXECSIZE_1;
1272 tmp->exec_size = GEN6_EXECSIZE_1;
1538 inst->exec_size = GEN6_EXECSIZE_1;
1795 fcc->tc.templ.exec_size
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H A Dilo_shader_gs.c117 inst->exec_size = GEN6_EXECSIZE_8;
131 inst->exec_size = GEN6_EXECSIZE_4;
145 inst->exec_size = GEN6_EXECSIZE_1;
410 inst2->exec_size = GEN6_EXECSIZE_1;
446 inst->exec_size = GEN6_EXECSIZE_8;
604 inst->exec_size = GEN6_EXECSIZE_1;
1269 gcc->tc.templ.exec_size = GEN6_EXECSIZE_4;
H A Dtoy_legalize.c549 /* math does not support align16 nor exec_size > 8 */
552 if (inst->exec_size == GEN6_EXECSIZE_16) {
563 inst->exec_size = GEN6_EXECSIZE_8;
H A Dtoy_compiler.c517 templ->exec_size = GEN6_EXECSIZE_1;
H A Dtoy_compiler.h118 unsigned exec_size:3; /* GEN6_EXECSIZE_x */ member in struct:toy_inst

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