/external/llvm/test/MC/AArch64/ |
H A D | neon-simd-ldst-multi-elem.s | 435 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0] 436 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15] 437 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp] 438 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] 439 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0] 440 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15] 441 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp] 442 // CHECK: ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0] // encoding: [0x00,0x00,0x40,0x4c] 443 // CHECK: ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15] // encoding: [0xef,0x05,0x40,0x4c] 444 // CHECK: ld4 { v3 [all...] |
H A D | neon-simd-ldst-one-elem.s | 114 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] 115 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15] 116 ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp] 117 ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0] 118 // CHECK: ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] // encoding: [0x00,0x24,0x60,0x4d] 119 // CHECK: ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15] // encoding: [0xef,0x79,0x60,0x4d] 120 // CHECK: ld4 { v31.s, v0.s, v1.s, v2.s }[3], [sp] // encoding: [0xff,0xb3,0x60,0x4d] 121 // CHECK: ld4 { v0.d, v1.d, v2.d, v3.d }[1], [x0] // encoding: [0x00,0xa4,0x60,0x4d] 275 ld4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 276 ld4 { v1 [all...] |
H A D | neon-simd-post-ldst-multi-elem.s | 176 ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0], x1 177 ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2 178 ld4 { v31.4s, v0.4s, v1.4s, v2.4s }, [sp], #64 179 ld4 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0], #64 180 ld4 { v0.8b, v1.8b, v2.8b, v3.8b }, [x0], x3 181 ld4 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4 182 ld4 { v31.2s, v0.2s, v1.2s, v2.2s }, [sp], #32 183 // CHECK: ld4 { v0.16b, v1.16b, v2.16b, v3.16b }, [x0], x1 185 // CHECK: ld4 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2 187 // CHECK: ld4 { v3 [all...] |
H A D | arm64-simd-ldst.s | 289 ld4.8b {v4, v5, v6, v7}, [x19] 290 ld4.16b {v4, v5, v6, v7}, [x19] 291 ld4.4h {v4, v5, v6, v7}, [x19] 292 ld4.8h {v4, v5, v6, v7}, [x19] 293 ld4.2s {v4, v5, v6, v7}, [x19] 294 ld4.4s {v4, v5, v6, v7}, [x19] 295 ld4.2d {v4, v5, v6, v7}, [x19] 306 ; CHECK: ld4.8b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x0c] 307 ; CHECK: ld4.16b { v4, v5, v6, v7 }, [x19] ; encoding: [0x64,0x02,0x40,0x4c] 308 ; CHECK: ld4 [all...] |
H A D | neon-diagnostics.s | 4003 ld4 {v15.8h, v16.8h, v17.4h, v18.8h}, [x15] 4004 ld4 {v0.8b, v2.8b, v3.8b, v4.8b}, [x0] 4005 ld4 {v15.4h, v16.4h, v17.4h, v18.4h, v19.4h}, [x31] 4006 ld4 {v15.8h-v18.4h}, [x15] 4007 ld4 {v31.2s-v1.2s}, [x31] 4009 // CHECK-ERROR: ld4 {v15.8h, v16.8h, v17.4h, v18.8h}, [x15] 4012 // CHECK-ERROR: ld4 {v0.8b, v2.8b, v3.8b, v4.8b}, [x0] 4015 // CHECK-ERROR: ld4 {v15.4h, v16.4h, v17.4h, v18.4h, v19.4h}, [x31] 4018 // CHECK-ERROR: ld4 {v15.8h-v18.4h}, [x15] 4021 // CHECK-ERROR: ld4 {v3 [all...] |
H A D | arm64-diags.s | 15 ld4.8b {v0, v1, v2, v3}, [x0], #33 17 ; CHECK-ERRORS: ld4.8b {v0, v1, v2, v3}, [x0], #33
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/external/libavc/common/armv8/ |
H A D | ih264_deblk_chroma_av8.s | 198 ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1 199 ld4 {v0.h, v1.h, v2.h, v3.h}[1], [x0], x1 200 ld4 {v0.h, v1.h, v2.h, v3.h}[2], [x0], x1 201 ld4 {v0.h, v1.h, v2.h, v3.h}[3], [x0], x1 203 ld4 {v4.h, v5.h, v6.h, v7.h}[0], [x0], x1 204 ld4 {v4.h, v5.h, v6.h, v7.h}[1], [x0], x1 205 ld4 {v4.h, v5.h, v6.h, v7.h}[2], [x0], x1 206 ld4 {v4.h, v5.h, v6.h, v7.h}[3], [x0], x1 479 ld4 {v0.h, v1.h, v2.h, v3.h}[0], [x0], x1 480 ld4 {v [all...] |
H A D | ih264_iquant_itrans_recon_av8.s | 137 ld4 {v20.4h - v23.4h}, [x5] // load pu2_iscal_mat[i], i =0..15 138 ld4 {v26.4h - v29.4h}, [x6] // pu2_weigh_mat[i], i =0..15 139 ld4 {v16.4h - v19.4h}, [x0] // pi2_src_tmp[i], i =0..15 330 ld4 {v20.4h - v23.4h}, [x5] // load pu2_iscal_mat[i], i =0..15 331 ld4 {v26.4h - v29.4h}, [x6] // pu2_weigh_mat[i], i =0..15 332 ld4 {v16.4h - v19.4h}, [x0] // pi2_src_tmp[i], i =0..15
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H A D | ih264_ihadamard_scaling_av8.s | 103 ld4 {v0.4h-v3.4h}, [x0] //load x4,x5,x6,x7
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H A D | ih264_resi_trans_quant_av8.s | 482 ld4 {v0.4h-v3.4h}, [x0] //load 4x4 block
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/external/capstone/suite/MC/AArch64/ |
H A D | neon-simd-ldst-multi-elem.s.cs | 184 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 185 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 186 0xff,0x0b,0x40,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp] 187 0x00,0x0c,0x40,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0] 188 0x00,0x00,0x40,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0] 189 0xef,0x05,0x40,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15] 190 0xff,0x0b,0x40,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp] 191 0x00,0x00,0x40,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0] 192 0xef,0x05,0x40,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15] 193 0xff,0x0b,0x40,0x4c = ld4 {v3 [all...] |
H A D | neon-simd-post-ldst-multi-elem.s.cs | 48 0x00,0x00,0xc1,0x4c = ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], x1 49 0xef,0x05,0xc2,0x4c = ld4 {v15.8h, v16.8h, v17.8h, v18.8h}, [x15], x2 50 0xff,0x0b,0xdf,0x4c = ld4 {v31.4s, v0.4s, v1.4s, v2.4s}, [sp], #64 51 0x00,0x0c,0xdf,0x4c = ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64 52 0x00,0x00,0xc3,0x0c = ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], x3 53 0xef,0x05,0xc4,0x0c = ld4 {v15.4h, v16.4h, v17.4h, v18.4h}, [x15], x4 54 0xff,0x0b,0xdf,0x0c = ld4 {v31.2s, v0.2s, v1.2s, v2.2s}, [sp], #32
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H A D | neon-simd-ldst-one-elem.s.cs | 46 0x00,0x24,0x60,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0] 47 0xef,0x79,0x60,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15] 48 0xff,0xb3,0x60,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp] 49 0x00,0xa4,0x60,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0] 110 0x00,0x24,0xe5,0x4d = ld4 {v0.b, v1.b, v2.b, v3.b}[9], [x0], x5 111 0xef,0x79,0xe7,0x4d = ld4 {v15.h, v16.h, v17.h, v18.h}[7], [x15], x7 112 0xff,0xb3,0xff,0x4d = ld4 {v31.s, v0.s, v1.s, v2.s}[3], [sp], #16 113 0x00,0xa4,0xff,0x4d = ld4 {v0.d, v1.d, v2.d, v3.d}[1], [x0], #32
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/external/libunwind/tests/ |
H A D | ia64-test-rbs-asm.S | 149 ld4 loc##n = [in1], 4;; \ 152 (p8) ld4.s loc##n = [r0] 155 ld4 r16 = [in1], 4;; \
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/external/vixl/test/aarch64/ |
H A D | test-trace-aarch64.cc | 1077 __ ld4(v3.V16B(), v4.V16B(), v5.V16B(), v6.V16B(), MemOperand(x0)); 1078 __ ld4(v2.V16B(), 1083 __ ld4(v5.V16B(), 1088 __ ld4(v18.V2D(), v19.V2D(), v20.V2D(), v21.V2D(), MemOperand(x0)); 1089 __ ld4(v4.V2D(), v5.V2D(), v6.V2D(), v7.V2D(), MemOperand(x1, x2, PostIndex)); 1090 __ ld4(v29.V2D(), 1095 __ ld4(v27.V2S(), v28.V2S(), v29.V2S(), v30.V2S(), MemOperand(x0)); 1096 __ ld4(v24.V2S(), 1101 __ ld4(v4.V2S(), v5.V2S(), v6.V2S(), v7.V2S(), MemOperand(x1, 32, PostIndex)); 1102 __ ld4(v1 [all...] |
/external/libjpeg-turbo/simd/ |
H A D | jsimd_arm64_neon.S | 1923 ld4 {v10.8b, v11.8b, v12.8b, v13.8b}, [RGB], #32 1926 ld4 {v10.b, v11.b, v12.b, v13.b}[0], [RGB], #4 1927 ld4 {v10.b, v11.b, v12.b, v13.b}[1], [RGB], #4 1928 ld4 {v10.b, v11.b, v12.b, v13.b}[2], [RGB], #4 1929 ld4 {v10.b, v11.b, v12.b, v13.b}[3], [RGB], #4 1931 ld4 {v10.b, v11.b, v12.b, v13.b}[4], [RGB], #4 1932 ld4 {v10.b, v11.b, v12.b, v13.b}[5], [RGB], #4 1934 ld4 {v10.b, v11.b, v12.b, v13.b}[6], [RGB], #4
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/external/valgrind/none/tests/arm64/ |
H A D | memory.stdout.exp | 12247 ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5] with x5 = middle_of_block+17, x6=7 12277 ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], #64 with x5 = middle_of_block+9, x6=9 12307 ld4 {v17.2d, v18.2d, v19.2d, v20.2d}, [x5], x6 with x5 = middle_of_block+-13, x6=-5 12337 ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5] with x5 = middle_of_block+17, x6=7 12367 ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], #64 with x5 = middle_of_block+9, x6=9 12397 ld4 {v17.4s, v18.4s, v19.4s, v20.4s}, [x5], x6 with x5 = middle_of_block+-13, x6=-5 12427 ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5] with x5 = middle_of_block+17, x6=7 12457 ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], #32 with x5 = middle_of_block+9, x6=9 12487 ld4 {v17.2s, v18.2s, v19.2s, v20.2s}, [x5], x6 with x5 = middle_of_block+-13, x6=-5 12517 ld4 {v1 [all...] |
/external/vixl/src/aarch64/ |
H A D | assembler-aarch64.h | 1957 void ld4(const VRegister& vt, 1964 void ld4(const VRegister& vt,
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H A D | macro-assembler-aarch64.h | 2634 ld4(vt, vt2, vt3, vt4, src); 2644 ld4(vt, vt2, vt3, vt4, lane, src);
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H A D | simulator-aarch64.h | 1943 void ld4(VectorFormat vform, 1949 void ld4(VectorFormat vform,
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H A D | simulator-aarch64.cc | 4031 ld4(vf, 4278 ld4(vf,
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H A D | assembler-aarch64.cc | 1652 void Assembler::ld4(const VRegister& vt, function in class:vixl::aarch64::Assembler 1664 void Assembler::ld4(const VRegister& vt, function in class:vixl::aarch64::Assembler
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H A D | logic-aarch64.cc | 528 void Simulator::ld4(VectorFormat vform, function in class:vixl::aarch64::Simulator 555 void Simulator::ld4(VectorFormat vform, function in class:vixl::aarch64::Simulator
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