/external/valgrind/none/tests/arm64/ |
H A D | crc32.stdout.exp | 2 crc32b w21,w20,w19 :: rd 00000000f8957d4c rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000000 3 crc32b w21,w20,w19 :: rd 00000000f810b326 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000000 4 crc32b w21,w20,w19 :: rd 00000000ef405c96 rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 00000000 5 crc32b w21,w20,w19 :: rd 00000000a0db523c rm fbb5c64ed1b044c6, rn 33ca4c4fb3960326, cin 0, nzcv 00000000 6 crc32b w21,w20,w19 :: rd 0000000096de687b rm 2b7c5939d7c0f528, rn b73870a5a6630162, cin 0, nzcv 00000000 7 crc32b w21,w20,w19 :: rd 000000005b546bd0 rm 02fe41918ac5cdba, rn 48e0815289728f05, cin 0, nzcv 00000000 8 crc32b w21,w20,w19 :: rd 000000008f7a8684 rm b60a8f381f187bae, rn 008c208cc413ff72, cin 0, nzcv 00000000 9 crc32h w21,w20,w19 :: rd 00000000862b47a9 rm 4b154113f7d32514, rn cce230caafbf9cc9, cin 0, nzcv 00000000 10 crc32h w21,w20,w19 :: rd 000000009a47a305 rm 33d5d595721d4f13, rn f4509311f443a7ce, cin 0, nzcv 00000000 11 crc32h w21,w20,w19 :: rd 00000000a788663d rm 4a3c6de6954cbc17, rn 111b21e39fbd7254, cin 0, nzcv 0000000 [all...] |
H A D | integer.stdout.exp | 2 add x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 00000000 3 add w3, w4, w5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 00000000 4 adc x3, x4, x5 :: rd 0000000000004abe rm 0000000000003039, rn 0000000000001a85, cin 0, nzcv 00000000 5 adc x3, x4, x5 :: rd 0000000000004abf rm 0000000000003039, rn 0000000000001a85, cin 1, nzcv 20000000 C 6 adc x3, x4, x5 :: rd ffffffffffffffff rm 0000000000000000, rn ffffffffffffffff, cin 0, nzcv 00000000 7 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn ffffffffffffffff, cin 1, nzcv 20000000 C 8 adc x3, x4, x5 :: rd 5859704f00000000 rm 3141592700000000, rn 2718172800000000, cin 0, nzcv 00000000 9 adc x3, x4, x5 :: rd 5859704f00000001 rm 3141592700000000, rn 2718172800000000, cin 1, nzcv 20000000 C 10 adc x3, x4, x5 :: rd 0000000000000000 rm 0000000000000000, rn 0000000000000000, cin 0, nzcv 00000000 11 adc x3, x4, x5 :: rd 0000000000000001 rm 0000000000000000, rn 0000000000000000, cin 1, nzcv 2000000 [all...] |
H A D | memory.stdout.exp | 2 LDR,STR (immediate, uimm12) (STR cases are MISSING)ldr x21, [x22, #24] :: rd 8f8e8d8c8b8a8988 rn (hidden), cin 0, nzcv 00000000 3 ldr w21, [x22, #20] :: rd 0000000087868584 rn (hidden), cin 0, nzcv 00000000 4 ldrh w21, [x22, #44] :: rd 0000000000009d9c rn (hidden), cin 0, nzcv 00000000 5 ldrb w21, [x22, #56] :: rd 00000000000000a8 rn (hidden), cin 0, nzcv 00000000 7 ldr x21, [x22], #-24 :: rd f7f6f5f4f3f2f1f0 rn (hidden), cin 0, nzcv 00000000 8 ldr x21, [x22, #-40]! :: rd cfcecdcccbcac9c8 rn (hidden), cin 0, nzcv 00000000 9 ldr x21, [x22, #-48] :: rd c7c6c5c4c3c2c1c0 rn (hidden), cin 0, nzcv 00000000 11 ldp x21, x28, [x22], #-24 ; add x21,x21,x28 :: rd f7f5f3f1efedebe8 rn (hidden), cin 0, nzcv 00000000 12 ldp x21, x28, [x22], #-24 ; eor x21,x21,x28 :: rd 0808080808080808 rn (hidden), cin 0, nzcv 00000000 13 ldp x21, x28, [x22, #-40]! ; add x21,x21,x28 :: rd a7a5a3a19f9d9b98 rn (hidden), cin 0, nzcv 0000000 [all...] |
/external/v8/src/arm64/ |
H A D | simulator-arm64.cc | 902 nzcv().SetN(CalcNFlag(result)); 903 nzcv().SetZ(CalcZFlag(result)); 907 nzcv().SetC((left > max_uint_2op) || ((max_uint_2op - left) < right)); 915 nzcv().SetV((left_sign == right_sign) && (left_sign != result_sign)); 938 nzcv().C()); 1035 nzcv().SetRawValue(FPUnorderedFlag); 1037 nzcv().SetRawValue(FPLessThanFlag); 1039 nzcv().SetRawValue(FPGreaterThanFlag); 1041 nzcv().SetRawValue(FPEqualFlag); 1184 nzcv() [all...] |
H A D | macro-assembler-arm64-inl.h | 127 StatusFlags nzcv, 131 ConditionalCompareMacro(rn, -operand.ImmediateValue(), nzcv, cond, CCMN); 133 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMP); 140 StatusFlags nzcv, 144 ConditionalCompareMacro(rn, -operand.ImmediateValue(), nzcv, cond, CCMP); 146 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMN); 574 StatusFlags nzcv, 578 fccmp(fn, fm, nzcv, cond); 125 Ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 138 Ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 572 Fccmp(const FPRegister& fn, const FPRegister& fm, StatusFlags nzcv, Condition cond) argument
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H A D | macro-assembler-arm64.h | 279 StatusFlags nzcv, 283 StatusFlags nzcv, 287 StatusFlags nzcv, 400 StatusFlags nzcv,
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H A D | assembler-arm64.cc | 1406 StatusFlags nzcv, 1408 ConditionalCompare(rn, operand, nzcv, cond, CCMN); 1414 StatusFlags nzcv, 1416 ConditionalCompare(rn, operand, nzcv, cond, CCMP); 2021 StatusFlags nzcv, 2024 Emit(FPType(fn) | FCCMP | Rm(fm) | Cond(cond) | Rn(fn) | Nzcv(nzcv)); 2409 StatusFlags nzcv, 2423 Emit(SF(rn) | ccmpop | Cond(cond) | Rn(rn) | Nzcv(nzcv)); 1404 ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 1412 ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 2019 fccmp(const FPRegister& fn, const FPRegister& fm, StatusFlags nzcv, Condition cond) argument 2407 ConditionalCompare(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
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H A D | simulator-arm64.h | 76 // SimSystemRegister nzcv = SimSystemRegister::DefaultValueFor(NZCV); 493 SimSystemRegister& nzcv() { return nzcv_; } 611 SimSystemRegister& flags = nzcv();
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H A D | assembler-arm64.h | 1283 StatusFlags nzcv, 1289 StatusFlags nzcv, 1607 StatusFlags nzcv, 1776 inline static Instr Nzcv(StatusFlags nzcv); 1903 StatusFlags nzcv,
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H A D | assembler-arm64-inl.h | 1104 Instr Assembler::Nzcv(StatusFlags nzcv) { argument 1105 return ((nzcv >> Flags_offset) & 0xf) << Nzcv_offset;
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H A D | macro-assembler-arm64.cc | 350 StatusFlags nzcv, 358 ConditionalCompareMacro(rn, temp, nzcv, cond, op); 365 ConditionalCompare(rn, operand, nzcv, cond, op); 373 ConditionalCompare(rn, temp, nzcv, cond, op); 348 ConditionalCompareMacro(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
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/external/vixl/src/aarch64/ |
H A D | macro-assembler-aarch64.cc | 1157 StatusFlags nzcv, 1161 ConditionalCompareMacro(rn, -operand.GetImmediate(), nzcv, cond, CCMN); 1163 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMP); 1170 StatusFlags nzcv, 1174 ConditionalCompareMacro(rn, -operand.GetImmediate(), nzcv, cond, CCMP); 1176 ConditionalCompareMacro(rn, operand, nzcv, cond, CCMN); 1183 StatusFlags nzcv, 1197 ConditionalCompare(rn, operand, nzcv, cond, op); 1204 ConditionalCompare(rn, temp, nzcv, cond, op); 1155 Ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 1168 Ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 1181 ConditionalCompareMacro(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond, ConditionalCompareOp op) argument
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H A D | assembler-aarch64.h | 865 StatusFlags nzcv, 871 StatusFlags nzcv, 1391 StatusFlags nzcv, 1398 StatusFlags nzcv, 1410 StatusFlags nzcv, 2770 static Instr Nzcv(StatusFlags nzcv) { argument 2771 return ((nzcv >> Flags_offset) & 0xf) << Nzcv_offset; 3135 StatusFlags nzcv,
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H A D | macro-assembler-aarch64.h | 729 StatusFlags nzcv, 733 StatusFlags nzcv, 737 StatusFlags nzcv, 1188 StatusFlags nzcv, 1194 FPCCompareMacro(vn, vm, nzcv, cond, trap); 1198 StatusFlags nzcv, 1200 Fccmp(vn, vm, nzcv, cond, EnableTrap); 1186 Fccmp(const VRegister& vn, const VRegister& vm, StatusFlags nzcv, Condition cond, FPTrapFlags trap = DisableTrap) argument 1196 Fccmpe(const VRegister& vn, const VRegister& vm, StatusFlags nzcv, Condition cond) argument
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H A D | assembler-aarch64.cc | 713 StatusFlags nzcv, 715 ConditionalCompare(rn, operand, nzcv, cond, CCMN); 721 StatusFlags nzcv, 723 ConditionalCompare(rn, operand, nzcv, cond, CCMP); 2231 StatusFlags nzcv, 2237 Emit(FPType(vn) | op | Rm(vm) | Cond(cond) | Rn(vn) | Nzcv(nzcv)); 2242 StatusFlags nzcv, 2244 FPCCompareMacro(vn, vm, nzcv, cond, DisableTrap); 2250 StatusFlags nzcv, 2252 FPCCompareMacro(vn, vm, nzcv, con 711 ccmn(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument 719 ccmp(const Register& rn, const Operand& operand, StatusFlags nzcv, Condition cond) argument [all...] |
H A D | simulator-aarch64.h | 663 // SimSystemRegister nzcv = SimSystemRegister::DefaultValueFor(NZCV); 1433 VIXL_DEPRECATED("ReadNzcv", SimSystemRegister& nzcv()) { return ReadNzcv(); }
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/external/valgrind/VEX/priv/ |
H A D | guest_arm64_helpers.c | 120 /* (nzcv:28x0, unused, unused) */ 238 /* (nzcv:28x0, unused, unused) */ 357 /* (nzcv:28x0, unused, unused) */ 467 /* (nzcv:28x0, unused, unused) */ 1760 ULong nzcv = 0; local 1762 nzcv |= arm64g_calculate_flags_nzcv( 1768 vassert(0 == (nzcv & 0xFFFFFFFF0FFFFFFFULL)); 1792 return nzcv;
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H A D | guest_arm64_toIR.c | 1919 IRTemp cond, IRTemp argL, IRTemp argR, UInt nzcv 1924 CC_DEP1 = ITE(cond, argL64, nzcv << 28) 1956 assign(f_dep1, mkU64(nzcv << 28)); 2205 IRTemp nzcv = newTemp(Ity_I64); local 2211 4 bits of 'nzcv'. */ 2212 /* Map compare result from IR to ARM(nzcv) */ 2214 FP cmp result | IR | ARM(nzcv) 2268 assign(nzcv, binop(Iop_Sub64, mkexpr(termL), mkexpr(termR))); 2269 return nzcv; 3189 sf 1 111010010 imm5 cond 10 Rn 0 nzcv CCM 3203 UInt nzcv = INSN(3,0); local 3242 UInt nzcv = INSN(3,0); local 13466 IRTemp nzcv = mk_convert_IRCmpF64Result_to_NZCV(irRes); local 13500 UInt nzcv = INSN(3,0); local [all...] |
H A D | guest_arm_toIR.c | 2526 IRTemp nzcv = newTemp(Ity_I32); local 2531 4 bits of 'nzcv'. */ 2532 /* Map compare result from IR to ARM(nzcv) */ 2534 FP cmp result | IR | ARM(nzcv) 2586 assign(nzcv, binop(Iop_Sub32, mkexpr(termL), mkexpr(termR))); 2587 return nzcv; 15080 IRTemp nzcv = IRTemp_INVALID; local 15087 bottom 4 bits of 'nzcv'. */ 15088 /* Map compare result from IR to ARM(nzcv) */ 15090 FP cmp result | IR | ARM(nzcv) 15591 IRTemp nzcv = IRTemp_INVALID; local [all...] |
/external/capstone/suite/MC/AArch64/ |
H A D | basic-a64-instructions.s.cs | 1567 0x0c,0x42,0x1b,0xd5 = msr nzcv, x12 1879 0x09,0x42,0x3b,0xd5 = mrs x9, nzcv
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