Searched refs:reg6 (Results 1 - 25 of 28) sorted by relevance

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/external/libvpx/libvpx/vpx_dsp/mips/
H A Didct32x32_msa.c44 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
48 LD_SH8(tmp_buf, 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
59 DOTP_CONST_PAIR(reg2, reg6, cospi_24_64, cospi_8_64, reg2, reg6);
60 BUTTERFLY_4(reg4, reg0, reg2, reg6, vec1, vec3, vec2, vec0);
65 LD_SH8((tmp_buf + 16), 32, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
69 DOTP_CONST_PAIR(reg6, reg1, cospi_6_64, cospi_26_64, reg6, reg1);
73 reg4 = reg6 + reg2;
74 reg6
128 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
354 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
434 v8i16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
[all...]
H A Didct16x16_msa.c15 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; local
19 LD_SH8(input, 16, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7);
23 TRANSPOSE8x8_SH_SH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg0, reg1,
24 reg2, reg3, reg4, reg5, reg6, reg7);
28 DOTP_CONST_PAIR(reg10, reg6, cospi_12_64, cospi_20_64, reg10, reg6);
29 BUTTERFLY_4(reg2, reg14, reg6, reg10, loc0, loc1, reg14, reg2);
33 BUTTERFLY_4(reg8, reg0, reg4, reg12, reg2, reg6, reg10, reg14);
34 SUB4(reg2, loc1, reg14, loc0, reg6, loc3, reg10, loc2, reg0, reg12, reg4,
36 ADD4(reg2, loc1, reg14, loc0, reg6, loc
109 v8i16 reg0, reg2, reg4, reg6, reg8, reg10, reg12, reg14; local
[all...]
/external/libyuv/files/source/
H A Drotate_msa.cc85 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
109 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
111 ILVRL_W(reg2, reg6, reg3, reg7, res4, res5, res6, res7);
131 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
142 res8 = (v16u8)__msa_ilvr_w((v4i32)reg6, (v4i32)reg2);
143 res9 = (v16u8)__msa_ilvl_w((v4i32)reg6, (v4i32)reg2);
166 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
190 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg7);
192 ILVRL_W(reg2, reg6, reg3, reg7, res4, res5, res6, res7);
212 ILVRL_H(vec0, vec2, vec1, vec3, reg4, reg5, reg6, reg
[all...]
H A Drow_msa.cc826 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local
898 reg6 = reg0 * const_0x70;
902 reg6 += const_0x8080;
916 reg6 -= reg8;
920 reg6 = (v8u16)__msa_srai_h((v8i16)reg6, 8);
924 dst0 = (v16u8)__msa_pckev_b((v16i8)reg7, (v16i8)reg6);
1237 v4u32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
1266 reg6 = (v4u32)__msa_ilvr_h(zero, (v8i16)vec7);
1274 reg6 *
1506 v16u8 reg0, reg1, reg2, reg3, reg4, reg5, reg6; local
2666 v4i32 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; local
[all...]
H A Dscale_msa.cc133 v8u16 reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; local
163 reg6 = (v8u16)__msa_pckod_d((v2i64)reg2, (v2i64)reg0);
165 reg4 += reg6;
/external/elfutils/tests/
H A Drun-varlocs.sh64 [40051c,40052b) {reg6}
H A Drun-addrcfi.sh39 integer reg6 (%esi): same_value
86 integer reg6 (%esi): same_value
138 integer reg6 (%rbp): same_value
204 integer reg6 (%rbp): same_value
308 integer reg6 (r6): undefined
1330 integer reg6 (r6): undefined
2358 integer reg6 (r6): undefined
3384 integer reg6 (%r6): same_value
3461 integer reg6 (%r6): same_value
3539 integer reg6 (r
[all...]
/external/vixl/src/aarch64/
H A Doperands-aarch64.h479 const CPURegister& reg6 = NoReg,
493 const CPURegister& reg6 = NoCPUReg,
/external/v8/src/arm/
H A Dmacro-assembler-arm.cc3714 Register reg6) {
3721 if (reg6.is_valid()) regs |= reg6.bit();
3740 Register reg6,
3744 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
3753 if (reg6.is_valid()) regs |= reg6.bit();
3709 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument
3735 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
H A Dmacro-assembler-arm.h69 Register reg6 = no_reg);
78 Register reg6 = no_reg,
/external/v8/src/ppc/
H A Dmacro-assembler-ppc.cc4239 Register reg6) {
4246 if (reg6.is_valid()) regs |= reg6.bit();
4261 Register reg5, Register reg6, Register reg7, Register reg8,
4264 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
4274 if (reg6.is_valid()) regs |= reg6.bit();
4237 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument
4260 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
H A Dmacro-assembler-ppc.h63 Register reg6 = no_reg);
69 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/arm64/
H A Dassembler-arm64.cc229 const CPURegister& reg5, const CPURegister& reg6,
237 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8};
266 const CPURegister& reg5, const CPURegister& reg6,
274 match &= !reg6.IsValid() || reg6.IsSameSizeAndType(reg1);
227 AreAliased(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
264 AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, const CPURegister& reg3, const CPURegister& reg4, const CPURegister& reg5, const CPURegister& reg6, const CPURegister& reg7, const CPURegister& reg8) argument
H A Dassembler-arm64.h360 const CPURegister& reg6 = NoReg,
373 const CPURegister& reg6 = NoCPUReg,
/external/elfutils/libdw/
H A Dknown-dwarf.h526 DWARF_ONE_KNOWN_DW_OP (reg6, DW_OP_reg6) \
/external/v8/src/ia32/
H A Dmacro-assembler-ia32.cc2650 Register reg6,
2654 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
2663 if (reg6.is_valid()) regs |= reg6.bit();
2645 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
H A Dmacro-assembler-ia32.h50 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/x87/
H A Dmacro-assembler-x87.cc2496 Register reg6,
2500 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
2509 if (reg6.is_valid()) regs |= reg6.bit();
2491 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument
H A Dmacro-assembler-x87.h53 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/mips/
H A Dmacro-assembler-mips.cc6379 Register reg6) {
6386 if (reg6.is_valid()) regs |= reg6.bit();
6400 Register reg5, Register reg6, Register reg7, Register reg8,
6403 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
6413 if (reg6.is_valid()) regs |= reg6.bit();
6374 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument
6399 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
H A Dmacro-assembler-mips.h101 Register reg6 = no_reg);
105 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/s390/
H A Dmacro-assembler-s390.cc3185 Register reg6) {
3192 if (reg6.is_valid()) regs |= reg6.bit();
5260 Register reg5, Register reg6, Register reg7, Register reg8,
5263 reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
5273 if (reg6.is_valid()) regs |= reg6.bit();
3183 GetRegisterThatIsNotOneOf(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6) argument
5259 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8, Register reg9, Register reg10) argument
H A Dmacro-assembler-s390.h70 Register reg6 = no_reg);
75 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/mips64/
H A Dmacro-assembler-mips64.h107 Register reg6 = no_reg);
111 Register reg6 = no_reg, Register reg7 = no_reg,
/external/v8/src/x64/
H A Dmacro-assembler-x64.cc5059 Register reg6,
5063 reg3.is_valid() + reg4.is_valid() + reg5.is_valid() + reg6.is_valid() +
5072 if (reg6.is_valid()) regs |= reg6.bit();
5054 AreAliased(Register reg1, Register reg2, Register reg3, Register reg4, Register reg5, Register reg6, Register reg7, Register reg8) argument

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