Searched refs:scvtf (Results 1 - 25 of 25) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-scalar-cvt.s9 scvtf h23, h14
10 scvtf s22, s13
11 scvtf d21, d12
13 // CHECK: scvtf h23, h14 // encoding: [0xd7,0xd9,0x79,0x5e]
14 // CHECK: scvtf s22, s13 // encoding: [0xb6,0xd9,0x21,0x5e]
15 // CHECK: scvtf d21, d12 // encoding: [0x95,0xd9,0x61,0x5e]
33 scvtf h22, h13, #16
34 scvtf s22, s13, #32
35 scvtf d21, d12, #64
37 // CHECK: scvtf h2
[all...]
H A Darm64-fp-encoding.s466 scvtf h1, w2
467 scvtf h1, w2, #1
468 scvtf s1, w2
469 scvtf s1, w2, #1
470 scvtf d1, w2
471 scvtf d1, w2, #1
472 scvtf h1, x2
473 scvtf h1, x2, #1
474 scvtf s1, x2
475 scvtf s
[all...]
H A Dneon-simd-shift.s403 scvtf v0.4h, v1.4h, #3
404 scvtf v0.8h, v1.8h, #3
405 scvtf v0.2s, v1.2s, #3
406 scvtf v0.4s, v1.4s, #3
407 scvtf v0.2d, v1.2d, #3
414 // CHECK: scvtf v0.4h, v1.4h, #3 // encoding: [0x20,0xe4,0x1d,0x0f]
415 // CHECK: scvtf v0.8h, v1.8h, #3 // encoding: [0x20,0xe4,0x1d,0x4f]
416 // CHECK: scvtf v0.2s, v1.2s, #3 // encoding: [0x20,0xe4,0x3d,0x0f]
417 // CHECK: scvtf v0.4s, v1.4s, #3 // encoding: [0x20,0xe4,0x3d,0x4f]
418 // CHECK: scvtf v
[all...]
H A Dneon-simd-misc.s682 scvtf v4.4h, v0.4h
683 scvtf v6.8h, v8.8h
684 scvtf v6.4s, v8.4s
685 scvtf v6.2d, v8.2d
686 scvtf v4.2s, v0.2s
688 // CHECK: scvtf v4.4h, v0.4h // encoding: [0x04,0xd8,0x79,0x0e]
689 // CHECK: scvtf v6.8h, v8.8h // encoding: [0x06,0xd9,0x79,0x4e]
690 // CHECK: scvtf v6.4s, v8.4s // encoding: [0x06,0xd9,0x21,0x4e]
691 // CHECK: scvtf v6.2d, v8.2d // encoding: [0x06,0xd9,0x61,0x4e]
692 // CHECK: scvtf v
[all...]
H A Dbasic-a64-instructions.s2009 scvtf s23, w19, #1
2010 scvtf s31, wzr, #20
2011 scvtf s14, w0, #32
2012 // CHECK: scvtf s23, w19, #1 // encoding: [0x77,0xfe,0x02,0x1e]
2013 // CHECK: scvtf s31, wzr, #20 // encoding: [0xff,0xb3,0x02,0x1e]
2014 // CHECK: scvtf s14, w0, #32 // encoding: [0x0e,0x80,0x02,0x1e]
2016 scvtf s23, x19, #1
2017 scvtf s31, xzr, #20
2018 scvtf s14, x0, #64
2019 // CHECK: scvtf s2
[all...]
H A Dbasic-a64-diagnostics.s1721 scvtf w13, s31, #0
1722 scvtf w19, s20, #33
1723 scvtf wsp, s19, #14
1725 // CHECK-ERROR-NEXT: scvtf w13, s31, #0
1728 // CHECK-ERROR-NEXT: scvtf w19, s20, #33
1731 // CHECK-ERROR-NEXT: scvtf wsp, s19, #14
1734 scvtf x13, s31, #0
1735 scvtf x19, s20, #65
1736 scvtf sp, s19, #14
1738 // CHECK-ERROR-NEXT: scvtf x1
[all...]
H A Dneon-diagnostics.s2039 scvtf v0.2s, v1.2d, #3
2040 scvtf v0.4s, v1.4h, #3
2041 scvtf v0.2d, v1.2s, #3
2047 // CHECK-ERROR: scvtf v0.2s, v1.2d, #3
2050 // CHECK-ERROR: scvtf v0.4s, v1.4h, #3
2053 // CHECK-ERROR: scvtf v0.2d, v1.2s, #3
5203 scvtf s22, s13, #0
5204 scvtf s22, s13, #33
5205 scvtf d21, d12, #65
5206 scvtf d2
[all...]
H A Darm64-advsimd.s594 scvtf.2s v0, v0
644 ; CHECK: scvtf.2s v0, v0 ; encoding: [0x00,0xd8,0x21,0x0e]
1380 scvtf s0, s0, #1
1381 scvtf d0, d0, #2
1429 ; check: scvtf s0, s0, #1 ; encoding: [0x00,0xe4,0x3f,0x5f]
1430 ; check: scvtf d0, d0, #2 ; encoding: [0x00,0xe4,0x7e,0x5f]
1463 scvtf.2s v0, v0, #1
1464 scvtf.4s v0, v0, #2
1465 scvtf.2d v0, v0, #3
1635 ; CHECK: scvtf
[all...]
/external/capstone/suite/MC/AArch64/
H A Dneon-scalar-cvt.s.cs2 0xb6,0xd9,0x21,0x5e = scvtf s22, s13
3 0x95,0xd9,0x61,0x5e = scvtf d21, d12
6 0xb6,0xe5,0x20,0x5f = scvtf s22, s13, #32
7 0x95,0xe5,0x40,0x5f = scvtf d21, d12, #64
H A Dneon-simd-shift.s.cs140 0x20,0xe4,0x3d,0x0f = scvtf v0.2s, v1.2s, #3
141 0x20,0xe4,0x3d,0x4f = scvtf v0.4s, v1.4s, #3
142 0x20,0xe4,0x7d,0x4f = scvtf v0.2d, v1.2d, #3
H A Dneon-simd-misc.s.cs199 0x06,0xd9,0x21,0x4e = scvtf v6.4s, v8.4s
200 0x06,0xd9,0x61,0x4e = scvtf v6.2d, v8.2d
201 0x04,0xd8,0x21,0x0e = scvtf v4.2s, v0.2s
H A Dbasic-a64-instructions.s.cs781 0x77,0xfe,0x02,0x1e = scvtf s23, w19, #1
782 0xff,0xb3,0x02,0x1e = scvtf s31, wzr, #20
783 0x0e,0x80,0x02,0x1e = scvtf s14, w0, #32
784 0x77,0xfe,0x02,0x9e = scvtf s23, x19, #1
785 0xff,0xb3,0x02,0x9e = scvtf s31, xzr, #20
786 0x0e,0x00,0x02,0x9e = scvtf s14, x0, #64
787 0x77,0xfe,0x42,0x1e = scvtf d23, w19, #1
788 0xff,0xb3,0x42,0x1e = scvtf d31, wzr, #20
789 0x0e,0x80,0x42,0x1e = scvtf d14, w0, #32
790 0x77,0xfe,0x42,0x9e = scvtf d2
[all...]
/external/vixl/test/aarch64/
H A Dtest-trace-aarch64.cc581 __ scvtf(d31, d16);
582 __ scvtf(d26, d31, 24);
583 __ scvtf(d6, w16);
584 __ scvtf(d5, w20, 6);
585 __ scvtf(d16, x8);
586 __ scvtf(d15, x8, 10);
587 __ scvtf(s7, s4);
588 __ scvtf(s8, s15, 14);
589 __ scvtf(s29, w10);
590 __ scvtf(s1
[all...]
H A Dtest-disasm-aarch64.cc2739 COMPARE(scvtf(d24, w25), "scvtf d24, w25");
2740 COMPARE(scvtf(s24, w25), "scvtf s24, w25");
2741 COMPARE(scvtf(d26, x0), "scvtf d26, x0");
2742 COMPARE(scvtf(s26, x0), "scvtf s26, x0");
2749 COMPARE(scvtf(d1, x2, 1), "scvtf d
[all...]
H A Dtest-simulator-aarch64.cc4245 DEFINE_TEST_NEON_2OPIMM_SD(scvtf,
4277 DEFINE_TEST_NEON_2OPIMM_SCALAR_SD(scvtf,
/external/valgrind/none/tests/arm64/
H A Dfp_and_simd.stdout.exp26841 scvtf d10, d21 , #1 615cab8952d23af4e089849f34c37ddc d96206c45df9c127fad05f7cc7be7edc 0000000000000000c384be820ce10605 d96206c45df9c127fad05f7cc7be7edc fpsr=00000000
26842 scvtf d10, d21 , #32 45c49a5d259b64d5d57e2e0bfacf5624 aa1e97948ec31cbc98a9e0cdd84c6d31 0000000000000000c1d9d587cc89ece5 aa1e97948ec31cbc98a9e0cdd84c6d31 fpsr=00000000
26843 scvtf d10, d21 , #64 bd7055f3141b5419d27bf95d11160bb4 a516cd5df4bc956cd5845a3b538d8f86 0000000000000000bfc53dd2e2563938 a516cd5df4bc956cd5845a3b538d8f86 fpsr=00000000
26847 scvtf s10, s21 , #1 df52bd5f7ac055938c4ae61f1afee343 c6d98ec723f327c58378749fda0c8e58 000000000000000000000000cd97cdc7 c6d98ec723f327c58378749fda0c8e58 fpsr=00000000
26848 scvtf s10, s21 , #16 d77717df9df2c5eb4d94f30e688b7b5a 3b22999334f6d8217d7767c303eb4bcc 000000000000000000000000447ad2f3 3b22999334f6d8217d7767c303eb4bcc fpsr=00000000
26849 scvtf s10, s21 , #32 a4217c611d1b3be756275f2348932df9 1be88998bb68e7d956b79344d5bd7b80 000000000000000000000000be290a12 1be88998bb68e7d956b79344d5bd7b80 fpsr=00000000
26853 scvtf v10.2d, v21.2d, #1 4d60b36fea0553d0f6c0f6753d013350 4a9207b1b28bf89ce340504b67b1d898 43c2a481ec6ca2fec3acbfafb4984e27 4a9207b1b28bf89ce340504b67b1d898 fpsr=00000000
26854 scvtf v10.2d, v21.2d, #32 6ccb331872e3a2317da9857511bf910f c301e192c653873f6492d3bd70d985da c1ce7f0f369cd63c41d924b4ef5c3661 c301e192c653873f6492d3bd70d985da fpsr=00000000
26855 scvtf v10.2d, v21.2d, #64 6ab0336918da9bd26682e4add5efad76 d7cd1da054bdaa36e0a3635bc9bd70b0 bfc419712fd5a12bbfbf5c9ca436428f d7cd1da054bdaa36e0a3635bc9bd70b0 fpsr=00000000
26859 scvtf v1
[all...]
/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc3180 scvtf(fpf, rd, rn, 0, fpcr_rounding);
4517 scvtf(fpf, rd, rn, 0, fpcr_rounding);
4924 scvtf(vf, rd, rn, right_shift, fpcr_rounding);
5009 scvtf(vf, rd, rn, right_shift, fpcr_rounding);
H A Dassembler-aarch64.h1505 void scvtf(const VRegister& fd, const Register& rn, int fbits = 0);
1511 void scvtf(const VRegister& fd, const VRegister& vn, int fbits = 0);
H A Dmacro-assembler-aarch64.h1812 scvtf(vd, rn, fbits);
2699 scvtf(vd, vn, fbits);
H A Dassembler-aarch64.cc2424 void Assembler::scvtf(const VRegister& vd, const VRegister& vn, int fbits) {
2435 void Assembler::scvtf(const VRegister& vd, const Register& rn, int fbits) {
H A Dsimulator-aarch64.h2536 LogicVRegister scvtf(VectorFormat vform,
H A Dlogic-aarch64.cc4921 LogicVRegister Simulator::scvtf(VectorFormat vform, function in class:vixl::aarch64::Simulator
/external/v8/src/arm64/
H A Dmacro-assembler-arm64-inl.h1085 scvtf(fd, rn, fbits);
H A Dassembler-arm64.h1649 void scvtf(const FPRegister& fd, const Register& rn, unsigned fbits = 0);
H A Dassembler-arm64.cc2099 void Assembler::scvtf(const FPRegister& fd, function in class:v8::internal::Assembler

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