Searched refs:imm (Results 1 - 25 of 34) sorted by relevance

12

/art/compiler/optimizing/
H A Dscheduler_arm64.cc94 int64_t imm = Int64FromConstant(instr->GetRight()->AsConstant()); local
95 if (imm == 0) {
98 } else if (imm == 1 || imm == -1) {
101 } else if (IsPowerOfTwo(AbsOrMin(imm))) {
105 DCHECK(imm <= -2 || imm >= 2);
162 int64_t imm = Int64FromConstant(instruction->GetRight()->AsConstant()); local
163 if (imm == 0) {
166 } else if (imm
[all...]
H A Dscheduler_arm.cc815 void SchedulingLatencyVisitorARM::HandleDivRemConstantIntegralLatencies(int32_t imm) { argument
816 if (imm == 0) {
819 } else if (imm == 1 || imm == -1) {
821 } else if (IsPowerOfTwo(AbsOrMin(imm))) {
836 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); local
837 HandleDivRemConstantIntegralLatencies(imm);
899 int32_t imm = Int32ConstantFrom(rhs->AsConstant()); local
900 HandleDivRemConstantIntegralLatencies(imm);
H A Dscheduler_arm.h126 void HandleDivRemConstantIntegralLatencies(int32_t imm);
H A Dcode_generator_x86_64.cc3183 Immediate imm(second.GetConstant()->AsIntConstant()->GetValue());
3184 __ subl(first.AsRegister<CpuRegister>(), imm);
3286 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue());
3287 __ imull(out.AsRegister<CpuRegister>(), first.AsRegister<CpuRegister>(), imm);
3444 int64_t imm = Int64FromConstant(second.GetConstant()); local
3446 DCHECK(imm == 1 || imm == -1);
3454 if (imm == -1) {
3466 if (imm == -1) {
3485 int64_t imm local
3548 int imm = second.GetConstant()->AsIntConstant()->GetValue(); local
3580 int64_t imm = second.GetConstant()->AsLongConstant()->GetValue(); local
3648 int64_t imm = Int64FromConstant(second.GetConstant()); local
[all...]
H A Dcode_generator_mips.cc1991 int32_t imm = CodeGenerator::GetInt32ValueOf(right->AsConstant()); local
1993 can_use_imm = IsUint<16>(imm);
1997 imm = -imm;
2001 int16_t imm_high = High16Bits(imm);
2002 int16_t imm_low = Low16Bits(imm);
2008 can_use_imm = IsInt<16>(imm);
3706 int64_t imm = Int64FromConstant(second.GetConstant()); local
3707 DCHECK(imm == 1 || imm
3758 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); local
3805 int64_t imm = Int64FromConstant(second.GetConstant()); local
3961 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); local
4011 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); local
4047 int64_t imm = CodeGenerator::GetInt64ValueOf(div->InputAt(1)->AsConstant()); local
4104 int64_t imm = locations->InAt(1).GetConstant()->AsLongConstant()->GetValue(); local
4691 int64_t imm = 0; local
4906 int64_t imm = 0; local
8695 int64_t imm = CodeGenerator::GetInt64ValueOf(rem->InputAt(1)->AsConstant()); local
8752 int64_t imm = locations->InAt(1).GetConstant()->AsLongConstant()->GetValue(); local
[all...]
H A Dcode_generator_x86.cc3218 Immediate imm(mul->InputAt(1)->AsIntConstant()->GetValue());
3219 __ imull(out.AsRegister<Register>(), first.AsRegister<Register>(), imm);
3460 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); local
3462 DCHECK(imm == 1 || imm == -1);
3468 if (imm == -1) {
3480 int32_t imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); local
3481 DCHECK(IsPowerOfTwo(AbsOrMin(imm)));
3482 uint32_t abs_imm = static_cast<uint32_t>(AbsOrMin(imm));
3489 int shift = CTZ(imm);
3503 int imm = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue(); local
3581 int32_t imm = second.GetConstant()->AsIntConstant()->GetValue(); local
5880 __ movl(Address(ESP, destination.GetStackIndex()), imm); local
[all...]
H A Dcode_generator_mips64.cc1835 int64_t imm = CodeGenerator::GetInt64ValueOf(right->AsConstant());
1837 can_use_imm = IsUint<16>(imm);
1842 if (!(type == DataType::Type::kInt32 && imm == INT32_MIN)) {
1843 imm = -imm;
1847 can_use_imm = IsInt<16>(imm) || (Low16Bits(imm) == 0) || single_use;
1849 can_use_imm = IsInt<16>(imm) || (IsInt<32>(imm) && (Low16Bits(imm)
[all...]
H A Dcode_generator_arm64.cc3272 int64_t imm = Int64FromConstant(second.GetConstant()); local
3273 DCHECK(imm == 1 || imm == -1);
3278 if (imm == 1) {
3295 int64_t imm = Int64FromConstant(second.GetConstant()); local
3296 uint64_t abs_imm = static_cast<uint64_t>(AbsOrMin(imm));
3306 if (imm > 0) {
3330 int64_t imm = Int64FromConstant(second.GetConstant()); local
3338 imm, type == DataType::Type::kInt64 /* is_long */, &magic, &shift);
3352 if (imm >
3383 int64_t imm = Int64FromConstant(second.GetConstant()); local
[all...]
/art/compiler/utils/x86_64/
H A Dassembler_x86_64.h369 void pushq(const Immediate& imm);
385 void movq(const Address& dst, const Immediate& imm);
387 void movl(const Address& dst, const Immediate& imm);
399 void movb(const Address& dst, const Immediate& imm);
407 void movw(const Address& dst, const Immediate& imm);
520 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
521 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
587 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
588 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
589 void pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm);
[all...]
H A Dassembler_x86_64.cc106 void X86_64Assembler::pushq(const Immediate& imm) { argument
108 CHECK(imm.is_int32()); // pushq only supports 32b immediate.
109 if (imm.is_int8()) {
111 EmitUint8(imm.value() & 0xFF);
114 EmitImmediate(imm);
134 void X86_64Assembler::movq(CpuRegister dst, const Immediate& imm) { argument
136 if (imm.is_int32()) {
141 EmitInt32(static_cast<int32_t>(imm.value()));
145 EmitInt64(imm.value());
150 void X86_64Assembler::movl(CpuRegister dst, const Immediate& imm) { argument
159 movq(const Address& dst, const Immediate& imm) argument
217 movl(const Address& dst, const Immediate& imm) argument
320 movb(const Address& dst, const Immediate& imm) argument
380 movw(const Address& dst, const Immediate& imm) argument
1279 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1291 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1794 shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1805 shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1815 pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
2187 cmpb(const Address& address, const Immediate& imm) argument
2197 cmpw(const Address& address, const Immediate& imm) argument
2206 cmpl(CpuRegister reg, const Immediate& imm) argument
2238 cmpl(const Address& address, const Immediate& imm) argument
2254 cmpq(CpuRegister reg, const Immediate& imm) argument
2270 cmpq(const Address& address, const Immediate& imm) argument
2352 testb(const Address& dst, const Immediate& imm) argument
2362 testl(const Address& dst, const Immediate& imm) argument
2387 andl(CpuRegister dst, const Immediate& imm) argument
2394 andq(CpuRegister reg, const Immediate& imm) argument
2434 orl(CpuRegister dst, const Immediate& imm) argument
2441 orq(CpuRegister dst, const Immediate& imm) argument
2481 xorl(CpuRegister dst, const Immediate& imm) argument
2496 xorq(CpuRegister dst, const Immediate& imm) argument
2564 addl(CpuRegister reg, const Immediate& imm) argument
2571 addq(CpuRegister reg, const Immediate& imm) argument
2604 addl(const Address& address, const Immediate& imm) argument
2611 addw(const Address& address, const Immediate& imm) argument
2628 subl(CpuRegister reg, const Immediate& imm) argument
2635 subq(CpuRegister reg, const Immediate& imm) argument
2704 imull(CpuRegister dst, CpuRegister src, const Immediate& imm) argument
2726 imull(CpuRegister reg, const Immediate& imm) argument
2749 imulq(CpuRegister reg, const Immediate& imm) argument
2753 imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm) argument
2823 shll(CpuRegister reg, const Immediate& imm) argument
2828 shlq(CpuRegister reg, const Immediate& imm) argument
2843 shrl(CpuRegister reg, const Immediate& imm) argument
2848 shrq(CpuRegister reg, const Immediate& imm) argument
2863 sarl(CpuRegister reg, const Immediate& imm) argument
2873 sarq(CpuRegister reg, const Immediate& imm) argument
2883 roll(CpuRegister reg, const Immediate& imm) argument
2893 rorl(CpuRegister reg, const Immediate& imm) argument
2903 rolq(CpuRegister reg, const Immediate& imm) argument
2913 rorq(CpuRegister reg, const Immediate& imm) argument
2955 enter(const Immediate& imm) argument
2977 ret(const Immediate& imm) argument
3160 AddImmediate(CpuRegister reg, const Immediate& imm) argument
3399 EmitImmediate(const Immediate& imm, bool is_16_op) argument
3468 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister reg, const Immediate& imm) argument
[all...]
H A Djni_macro_assembler_x86_64.h64 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
H A Djni_macro_assembler_x86_64.cc201 uint32_t imm,
203 __ movl(Address(CpuRegister(RSP), dest), Immediate(imm)); // TODO(64) movq?
200 StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister) argument
/art/test/442-checker-constant-folding/src/
H A DMain.java1336 long imm = 33L;
1337 return (int) imm;
1353 float imm = 1.0e34f;
1354 return (int) imm;
1370 double imm = Double.NaN;
1371 return (int) imm;
1387 int imm = 33;
1388 return (long) imm;
1404 float imm = 34.0f;
1405 return (long) imm;
[all...]
/art/compiler/utils/x86/
H A Dassembler_x86.h325 void pushl(const Immediate& imm);
335 void movl(const Address& dst, const Immediate& imm);
350 void rorl(Register reg, const Immediate& imm);
352 void roll(Register reg, const Immediate& imm);
361 void movb(const Address& dst, const Immediate& imm);
369 void movw(const Address& dst, const Immediate& imm);
476 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
477 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
544 void shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm);
545 void shufps(XmmRegister dst, XmmRegister src, const Immediate& imm);
[all...]
H A Dassembler_x86.cc108 void X86Assembler::pushl(const Immediate& imm) { argument
110 if (imm.is_int8()) {
112 EmitUint8(imm.value() & 0xFF);
115 EmitImmediate(imm);
133 void X86Assembler::movl(Register dst, const Immediate& imm) { argument
136 EmitImmediate(imm);
161 void X86Assembler::movl(const Address& dst, const Immediate& imm) { argument
165 EmitImmediate(imm);
276 void X86Assembler::movb(const Address& dst, const Immediate& imm) { argument
280 CHECK(imm
330 movw(const Address& dst, const Immediate& imm) argument
1073 roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1084 roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1571 shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1581 shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1590 pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) argument
1906 cmpb(const Address& address, const Immediate& imm) argument
1914 cmpw(const Address& address, const Immediate& imm) argument
1921 cmpl(Register reg, const Immediate& imm) argument
1962 cmpl(const Address& address, const Immediate& imm) argument
2007 testb(const Address& dst, const Immediate& imm) argument
2016 testl(const Address& dst, const Immediate& imm) argument
2038 andl(Register dst, const Immediate& imm) argument
2058 orl(Register dst, const Immediate& imm) argument
2078 xorl(Register dst, const Immediate& imm) argument
2084 addl(Register reg, const Immediate& imm) argument
2097 addl(const Address& address, const Immediate& imm) argument
2103 addw(const Address& address, const Immediate& imm) argument
2111 adcl(Register reg, const Immediate& imm) argument
2138 subl(Register reg, const Immediate& imm) argument
2179 imull(Register dst, Register src, const Immediate& imm) argument
2197 imull(Register reg, const Immediate& imm) argument
2245 sbbl(Register reg, const Immediate& imm) argument
2291 shll(Register reg, const Immediate& imm) argument
2301 shll(const Address& address, const Immediate& imm) argument
2311 shrl(Register reg, const Immediate& imm) argument
2321 shrl(const Address& address, const Immediate& imm) argument
2331 sarl(Register reg, const Immediate& imm) argument
2341 sarl(const Address& address, const Immediate& imm) argument
2360 shld(Register dst, Register src, const Immediate& imm) argument
2378 shrd(Register dst, Register src, const Immediate& imm) argument
2387 roll(Register reg, const Immediate& imm) argument
2397 rorl(Register reg, const Immediate& imm) argument
2421 enter(const Immediate& imm) argument
2443 ret(const Immediate& imm) argument
2671 AddImmediate(Register reg, const Immediate& imm) argument
2762 EmitImmediate(const Immediate& imm, bool is_16_op) argument
2829 EmitGenericShift(int reg_or_opcode, const Operand& operand, const Immediate& imm) argument
[all...]
H A Djni_macro_assembler_x86.h63 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
H A Djni_macro_assembler_x86.cc163 void X86JNIMacroAssembler::StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister) { argument
164 __ movl(Address(ESP, dest), Immediate(imm));
/art/compiler/utils/arm/
H A Dassembler_arm_vixl.h142 void Vmov(vixl32::DRegister rd, double imm) { argument
143 if (vixl::VFP::IsImmFP64(imm)) {
144 MacroAssembler::Vmov(rd, imm);
146 MacroAssembler::Vldr(rd, imm);
H A Djni_macro_assembler_arm_vixl.h70 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
H A Djni_macro_assembler_arm_vixl.cc296 uint32_t imm,
302 asm_.LoadImmediate(mscratch.AsVIXLRegister(), imm);
295 StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) argument
/art/compiler/utils/
H A Dassembler_test.h195 for (int64_t imm : imms) {
196 ImmType new_imm = CreateImmediate(imm);
217 sreg << imm * multiplier + bias;
251 for (int64_t imm : imms) {
252 ImmType new_imm = CreateImmediate(imm);
279 sreg << imm + bias;
312 for (int64_t imm : imms) {
313 ImmType new_imm = CreateImmediate(imm);
334 sreg << imm; local
362 for (int64_t imm
576 sreg << imm; local
1182 sreg << imm; local
1473 sreg << imm; local
1577 sreg << imm; local
[all...]
H A Djni_macro_assembler.h86 virtual void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) = 0;
/art/compiler/linker/arm/
H A Drelative_patcher_thumb2.cc96 uint32_t imm = (diff16 >> 11) & 0x1u; local
99 insn = (insn & 0xfbf08f00u) | (imm << 26) | (imm4 << 16) | (imm3 << 12) | imm8;
/art/compiler/utils/arm64/
H A Djni_macro_assembler_arm64.h72 void StoreImmediateToFrame(FrameOffset dest, uint32_t imm, ManagedRegister scratch) OVERRIDE;
/art/runtime/interpreter/mterp/mips/
H A Dheader.S675 #define LOAD_IMM(dest, imm) li dest, imm

Completed in 374 milliseconds

12