| c8af34b4dbc211f1e08a7ea513dc399046825866 |
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19-Feb-2014 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Use atomic access for shared registers
Replace the driver-specific thread-safe shared register API
by the recently introduced atomic_io_clear_set().
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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| 08cb8e460956489fcfbfab5a7d33e62acd190b9a |
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02-Dec-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Enable timer divider only when needed
The current code sets the timer divider bits always. However, when
the 25 MHz timer is enabled, this is not needed and has no effect.
As this causes some confusion, rework the code so the divider is
set only when needed, i.e. when the 25 MHz timer is not in use.
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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| c813eff078588733a3d1a46c033c2d59d66a263b |
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26-Nov-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Register sched_clock after the counter reset
This commit registers the sched_clock _after_ the counter reset
(instead of before). This removes the timestamp 'jump' in kernel
log messages.
Before this change:
[ 0.000000] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 171798691800ns
[ 0.000000] Initializing Coherency fabric
[ 0.000000] Aurora cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x00000100, AUX_CTRL 0x1a696b12, Cache size: 1024 kB
[ 163.507447] Calibrating delay loop... 1325.05 BogoMIPS (lpj=662528)
[ 163.521419] pid_max: default: 32768 minimum: 301
[ 163.526185] Mount-cache hash table entries: 512
[ 163.531095] CPU: Testing write buffer coherency: ok
After this change:
[ 0.000000] sched_clock: 32 bits at 25MHz, resolution 40ns, wraps every 171798691800ns
[ 0.000000] Initializing Coherency fabric
[ 0.000000] Aurora cache controller enabled
[ 0.000000] l2x0: 16 ways, CACHE_ID 0x00000100, AUX_CTRL 0x1a696b12, Cache size: 1024 kB
[ 0.016849] Calibrating delay loop... 1325.05 BogoMIPS (lpj=662528)
[ 0.030820] pid_max: default: 32768 minimum: 301
[ 0.035588] Mount-cache hash table entries: 512
[ 0.040500] CPU: Testing write buffer coherency: ok
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
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| 5e9fe6cb1ba5ad321473e7b9c39fbe164129520d |
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20-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Get reference fixed-clock by name
The Armada XP timer has two mandatory clock inputs: nbclk and refclk,
as specified by the device-tree binding.
This commit fixes the clock selection. Instead of hard-coding the clock
rate for the 25 MHz reference fixed-clock, obtain the clock by its name.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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| ec8e51120a5b167e22ee29f4f427a0cb66eb445b |
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20-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Replace WARN_ON with BUG_ON
If the clock fails to be obtained and the timer fails to be properly
registered, the kernel will freeze real soon. Instead, let's BUG()
where the actual problem is located.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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| 7cd6392c9bf5da6986103fcf5ca1b6fd0489d9b4 |
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13-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Introduce new compatibles
The Armada XP SoC clocksource driver cannot work without the 25 MHz
fixed timer. Therefore it's appropriate to introduce a new compatible
string and use it to set the 25 MHz fixed timer.
The 'marvell,timer-25MHz' property will be marked as deprecated.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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| 573145f08c2b92c45498468afbbba909f6ce6135 |
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13-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE
This is almost cosmetic: we achieve a bit of consistency with
other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE
macro for the boilerplate code.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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| 3579698e85ef9984e698ac3d8e2257a1adeeb722 |
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13-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Simplify TIMER_CTRL register access
This commit creates two functions to access the TIMER_CTRL register:
one for global one for the per-cpu. This makes the code much more
readable. In addition, since the TIMER_CTRL register is also used for
watchdog, this is preparation work for future thread-safe improvements.
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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| ad48bd618f3761922c53f08e05fe00f3c85ca275 |
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13-Aug-2013 |
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> |
clocksource: armada-370-xp: Use BIT()
This is a purely cosmetic commit: we replace hardcoded values that
representing bits by BIT(), which is slightly more readable.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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| d9dbcbe0ea29dac15a9ca70c274fec4ef100e187 |
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19-Jul-2013 |
Stephen Boyd <sboyd@codeaurora.org> |
clocksource: time-armada-370-xp: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface.
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
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| 8c37bb3ac95b8ff953bd3c8bc8dd0a393d5ae989 |
|
19-Jun-2013 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
clocksource+irqchip: delete __cpuinit usage from all related files
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
This removes all the drivers/clocksource and drivers/irqchip uses of
the __cpuinit macros from all C files.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
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| 5ddb6d21c30d10ae4a740a788bb9101bd384fea5 |
|
16-Feb-2013 |
Stephen Boyd <sboyd@codeaurora.org> |
clocksource: time-armada-370-xp: Divorce from local timer API
Separate the armada 370xp local timers from the local timer API.
This will allow us to remove ARM local timer support in the near
future and makes this driver multi-architecture friendly.
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| faef31b482549640e2d0095afdf3dedb992cfa80 |
|
22-Feb-2013 |
Stephen Boyd <sboyd@codeaurora.org> |
clocksource: time-armada-370-xp: Fix sparse warning
drivers/clocksource/time-armada-370-xp.c:217:13: warning: symbol
'armada_370_xp_timer_init' was not declared. Should it be static?
Also remove the __init marking in the prototype as it's
unnecessary and drop the init.h file.
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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| 38ff87f77af0b5a93fc8581cff1d6e5692ab8970 |
|
02-Jun-2013 |
Stephen Boyd <sboyd@codeaurora.org> |
sched_clock: Make ARM's sched_clock generic for all architectures
Nothing about the sched_clock implementation in the ARM port is
specific to the architecture. Generalize the code so that other
architectures can use it by selecting GENERIC_SCHED_CLOCK.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
[jstultz: Merge minor collisions with other patches in my tree]
Signed-off-by: John Stultz <john.stultz@linaro.org>
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| ddd3f69f9f01063edabeb8ca5b1551936f98dfb1 |
|
25-Jan-2013 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
clocksource: time-armada-370-xp: add local timer support
On the SOCs Armada 370 and Armada XP, each CPU comes with two private
timers. This patch use the timer 0 of each CPU as local timer for the
clockevent if CONFIG_LOCAL_TIMER is selected. In the other case, use
only the private Timer 0 of CPU 0.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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| 307c2bf467e3682c6df1b8186365224fd2d581d3 |
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17-Nov-2012 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
clocksource: convert time-armada-370-xp to clk framework
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
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| 6fe9cbd1119b3cd2595dabaf25a400eed95b170c |
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13-Jun-2012 |
Gregory CLEMENT <gregory.clement@free-electrons.com> |
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
Timer 0 is used as free-running clocksource, while timer 1 is used as
clock_event_device.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Yehuda Yitschak <yehuday@marvell.com>
Tested-by: Lior Amsalem <alior@marvell.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
CC: Thomas Gleixner <tglx@linutronix.de>
CC: John Stultz <johnstul@us.ibm.com>
|