/drivers/clk/mxs/ |
H A D | clk.h | 52 u8 shift, u8 width, const char **parent_names, int num_parents) 54 return clk_register_mux(NULL, name, parent_names, num_parents, 51 mxs_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parent_names, int num_parents) argument
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/drivers/clk/pxa/ |
H A D | clk-pxa.h | 75 const char **parent_names; member in struct:pxa_clk_cken 86 .dev_id = _dev_id, .con_id = _con_id, .parent_names = parents,\
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/drivers/clk/ |
H A D | clk-mux.c | 117 const char **parent_names, u8 num_parents, unsigned long flags, 147 init.parent_names = parent_names; 169 const char **parent_names, u8 num_parents, unsigned long flags, 175 return clk_register_mux_table(dev, name, parent_names, num_parents, 116 clk_register_mux_table(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, spinlock_t *lock) argument 168 clk_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock) argument
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H A D | clk-composite.c | 185 const char **parent_names, int num_parents, 204 init.parent_names = parent_names; 184 clk_register_composite(struct device *dev, const char *name, const char **parent_names, int num_parents, struct clk_hw *mux_hw, const struct clk_ops *mux_ops, struct clk_hw *rate_hw, const struct clk_ops *rate_ops, struct clk_hw *gate_hw, const struct clk_ops *gate_ops, unsigned long flags) argument
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H A D | clk-ppc-corenet.c | 74 const char **parent_names; local 88 parent_names = kzalloc((sizeof(char *) * count), GFP_KERNEL); 89 if (!parent_names) { 90 pr_err("%s: could not allocate parent_names\n", __func__); 95 parent_names[i] = of_clk_get_parent_name(np, i); 121 init.parent_names = parent_names; 144 kfree(parent_names);
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/drivers/clk/hisilicon/ |
H A D | clk.h | 58 const char **parent_names; member in struct:hisi_mux_clock
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/drivers/clk/ti/ |
H A D | mux.c | 108 const char **parent_names, u8 num_parents, 127 init.parent_names = parent_names; 158 const char **parent_names; local 170 parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); 171 if (!parent_names) 175 parent_names[i] = of_clk_get_parent_name(node, i); 197 clk = _register_mux(NULL, node->name, parent_names, num_parents, flags, 204 kfree(parent_names); 107 _register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, spinlock_t *lock) argument
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H A D | apll.c | 155 kfree(clk_hw->hw.init->parent_names); 162 kfree(clk_hw->hw.init->parent_names); 172 const char **parent_names = NULL; local 194 parent_names = kzalloc(sizeof(char *) * init->num_parents, GFP_KERNEL); 195 if (!parent_names) 199 parent_names[i] = of_clk_get_parent_name(node, i); 201 init->parent_names = parent_names; 216 kfree(parent_names); 359 init->parent_names [all...] |
H A D | composite.c | 63 const char **parent_names; member in struct:component_clk 126 const char **parent_names = NULL; local 163 parent_names = comp->parent_names; 174 parent_names, num_parents, 237 const char **parent_names; local 248 parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); 249 if (!parent_names) 253 parent_names[i] = of_clk_get_parent_name(node, i); 257 kfree(parent_names); [all...] |
/drivers/clk/at91/ |
H A D | clk-smd.c | 118 const char **parent_names, u8 num_parents) 130 init.parent_names = parent_names; 150 const char *parent_names[SMD_SOURCE_MAX]; local 158 parent_names[i] = of_clk_get_parent_name(np, i); 159 if (!parent_names[i]) 165 clk = at91sam9x5_clk_register_smd(pmc, name, parent_names, 117 at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents) argument
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H A D | clk-master.c | 137 const char **parent_names, 146 if (!pmc || !irq || !name || !num_parents || !parent_names) 155 init.parent_names = parent_names; 223 const char *parent_names[MASTER_SOURCE_MAX]; local 232 parent_names[i] = of_clk_get_parent_name(np, i); 233 if (!parent_names[i]) 248 parent_names, layout, 135 at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, const char *name, int num_parents, const char **parent_names, const struct clk_master_layout *layout, const struct clk_master_characteristics *characteristics) argument
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H A D | clk-programmable.c | 174 const char *name, const char **parent_names, 191 init.parent_names = parent_names; 234 const char *parent_names[PROG_SOURCE_MAX]; local 243 parent_names[i] = of_clk_get_parent_name(np, i); 244 if (!parent_names[i]) 260 parent_names, num_parents, 173 at91_clk_register_programmable(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents, u8 id, const struct clk_programmable_layout *layout) argument
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H A D | clk-slow.c | 140 init.parent_names = &parent_name; 252 init.parent_names = NULL; 333 const char **parent_names, 340 if (!sckcr || !name || !parent_names || !num_parents) 349 init.parent_names = parent_names; 368 const char *parent_names[2]; local 378 parent_names[i] = of_clk_get_parent_name(np, i); 379 if (!parent_names[i]) 385 clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names, 331 at91_clk_register_sam9x5_slow(void __iomem *sckcr, const char *name, const char **parent_names, int num_parents) argument 405 at91_clk_register_sam9260_slow(struct at91_pmc *pmc, const char *name, const char **parent_names, int num_parents) argument 444 const char *parent_names[2]; local [all...] |
H A D | clk-usb.c | 168 const char **parent_names, u8 num_parents) 180 init.parent_names = parent_names; 208 init.parent_names = &parent_name; 323 init.parent_names = &parent_name; 344 const char *parent_names[USB_SOURCE_MAX]; local 352 parent_names[i] = of_clk_get_parent_name(np, i); 353 if (!parent_names[i]) 359 clk = at91sam9x5_clk_register_usb(pmc, name, parent_names, num_parents); 167 at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents) argument
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/drivers/clk/berlin/ |
H A D | berlin2-div.c | 240 const char **parent_names, int num_parents, 262 return clk_register_composite(NULL, name, parent_names, num_parents, 238 berlin2_div_register(const struct berlin2_div_map *map, void __iomem *base, const char *name, u8 div_flags, const char **parent_names, int num_parents, unsigned long flags, spinlock_t *lock) argument
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H A D | bg2q.c | 294 const char *parent_names[9]; local 343 parent_names[k] = clk_names[dd->parent_ids[k]]; 346 dd->name, dd->div_flags, parent_names,
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/drivers/clk/samsung/ |
H A D | clk-exynos-clkout.c | 59 const char *parent_names[EXYNOS_CLKOUT_PARENTS]; local 78 parent_names[i] = "none"; 82 parent_names[i] = __clk_get_name(parents[i]); 104 parent_names, parent_count, &clkout->mux.hw,
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H A D | clk.h | 115 * @parent_names: array of pointer to parent clock names. 116 * @num_parents: number of parents listed in @parent_names. 128 const char **parent_names; member in struct:samsung_mux_clock 143 .parent_names = pnames, \
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/drivers/clk/tegra/ |
H A D | clk-periph.c | 142 const char **parent_names, int num_parents, 162 init.parent_names = parent_names; 190 const char **parent_names, int num_parents, 194 return _tegra_clk_register_periph(name, parent_names, num_parents, 199 const char **parent_names, int num_parents, 204 return _tegra_clk_register_periph(name, parent_names, num_parents, 141 _tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) argument 189 tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) argument 198 tegra_clk_register_periph_nodiv(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset) argument
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H A D | clk-super.c | 131 const char **parent_names, u8 num_parents, 148 init.parent_names = parent_names; 130 tegra_clk_register_super_mux(const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 clk_super_flags, u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock) argument
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/drivers/clk/ux500/ |
H A D | clk-sysctrl.c | 119 const char **parent_names, 168 clk_sysctrl_init.parent_names = parent_names; 188 const char **parent_names = (parent_name ? &parent_name : NULL); local 191 return clk_reg_sysctrl(dev, name, parent_names, num_parents, 206 const char **parent_names = (parent_name ? &parent_name : NULL); local 209 return clk_reg_sysctrl(dev, name, parent_names, num_parents, 217 const char **parent_names, 224 return clk_reg_sysctrl(dev, name, parent_names, num_parents, 117 clk_reg_sysctrl(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long rate, unsigned long enable_delay_us, unsigned long flags, struct clk_ops *clk_sysctrl_ops) argument 215 clk_reg_sysctrl_set_parent(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u16 *reg_sel, u8 *reg_mask, u8 *reg_bits, unsigned long flags) argument
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/drivers/clk/versatile/ |
H A D | clk-sp810.c | 141 const char *parent_names[2]; local 153 parent_names[0] = of_clk_get_parent_name(node, sp810->refclk_index); 157 parent_names[1] = of_clk_get_parent_name(node, sp810->timclk_index); 159 if (parent_names[0] <= 0 || parent_names[1] <= 0) { 171 init.parent_names = parent_names; 172 init.num_parents = ARRAY_SIZE(parent_names);
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/drivers/clk/rockchip/ |
H A D | clk-cpu.c | 232 const char **parent_names, u8 num_parents, 252 init.parent_names = &parent_names[0]; 270 cpuclk->alt_parent = __clk_lookup(parent_names[1]); 285 clk = __clk_lookup(parent_names[0]); 288 __func__, parent_names[0]); 231 rockchip_clk_register_cpuclk(const char *name, const char **parent_names, u8 num_parents, const struct rockchip_cpuclk_reg_data *reg_data, const struct rockchip_cpuclk_rate_table *rates, int nrates, void __iomem *reg_base, spinlock_t *lock) argument
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H A D | clk.c | 42 const char **parent_names, u8 num_parents, void __iomem *base, 96 clk = clk_register_composite(NULL, name, parent_names, num_parents, 106 const char **parent_names, u8 num_parents, void __iomem *base, 144 clk = clk_register_composite(NULL, name, parent_names, num_parents, 197 list->parent_names, list->num_parents, 226 list->parent_names, list->num_parents, 234 list->name, list->parent_names[0], 241 list->parent_names[0], flags, 251 list->parent_names, list->num_parents, 263 list->parent_names[ 41 rockchip_clk_register_branch(const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, struct clk_div_table *div_table, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) argument 105 rockchip_clk_register_frac_branch(const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 div_flags, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) argument 299 rockchip_clk_register_armclk(unsigned int lookup_id, const char *name, const char **parent_names, u8 num_parents, const struct rockchip_cpuclk_reg_data *reg_data, const struct rockchip_cpuclk_rate_table *rates, int nrates) argument [all...] |
/drivers/clk/st/ |
H A D | clk-flexgen.c | 167 const char **parent_names, u8 num_parents, 183 init.parent_names = parent_names; 166 clk_register_flexgen(const char *name, const char **parent_names, u8 num_parents, void __iomem *reg, spinlock_t *lock, u32 idx, unsigned long flexgen_flags) argument
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