Searched defs:pl (Results 26 - 38 of 38) sorted by relevance

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/drivers/gpu/drm/radeon/
H A Dtrinity_dpm.c713 struct trinity_pl *pl, u32 index)
720 trinity_set_divider_value(rdev, index, pl->sclk);
721 trinity_set_vid(rdev, index, pl->vddc_index);
722 trinity_set_ss_dividers(rdev, index, pl->ss_divider_index);
723 trinity_set_ds_dividers(rdev, index, pl->ds_divider_index);
724 trinity_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow);
725 trinity_set_force_nbp_state(rdev, index, pl->force_nbp_state);
726 trinity_set_display_wm(rdev, index, pl->display_wm);
727 trinity_set_vce_wm(rdev, index, pl->vce_wm);
1645 struct trinity_pl *pl local
712 trinity_program_power_level(struct radeon_device *rdev, struct trinity_pl *pl, u32 index) argument
1935 struct trinity_pl *pl = &ps->levels[i]; local
1949 struct trinity_pl *pl; local
[all...]
H A Dni_dpm.c1614 struct rv7xx_pl *pl,
1621 (u8)rv770_calculate_memory_refresh_rate(rdev, pl->sclk);
1625 pl->sclk,
1626 pl->mclk);
2310 struct rv7xx_pl *pl,
2322 ((pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0) : 0;
2324 ret = ni_populate_sclk_value(rdev, pl->sclk, &level->sclk);
2330 (pl->mclk <= pi->mclk_stutter_mode_threshold) &&
2337 if (pl->mclk > pi->mclk_edc_enable_threshold)
2339 if (pl
1613 ni_populate_memory_timing_parameters(struct radeon_device *rdev, struct rv7xx_pl *pl, SMC_NIslands_MCArbDramTimingRegisterSet *arb_regs) argument
2309 ni_convert_power_level_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, NISLANDS_SMC_HW_PERFORMANCE_LEVEL *level) argument
2957 ni_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, SMC_NIslands_MCRegisterSet *mc_reg_table_data) argument
3925 struct rv7xx_pl *pl = &ps->performance_levels[index]; local
4281 struct rv7xx_pl *pl; local
4305 struct rv7xx_pl *pl; local
[all...]
H A Drv770_dpm.c228 struct rv7xx_pl *pl)
230 return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ?
613 struct rv7xx_pl *pl,
621 ((pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0) : 0;
622 level->gen2XSP = (pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0;
623 level->backbias = (pl->flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? 1 : 0;
627 ret = rv740_populate_sclk_value(rdev, pl->sclk,
630 ret = rv730_populate_sclk_value(rdev, pl->sclk,
633 ret = rv770_populate_sclk_value(rdev, pl->sclk,
640 if (pl
227 rv770_get_seq_value(struct radeon_device *rdev, struct rv7xx_pl *pl) argument
612 rv770_convert_power_level_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, RV770_SMC_HW_PERFORMANCE_LEVEL *level, u8 watermark_level) argument
2178 struct rv7xx_pl *pl; local
2432 struct rv7xx_pl *pl; local
2466 struct rv7xx_pl *pl; local
[all...]
H A Dci_dpm.c4874 struct ci_pl *pl = &ps->performance_levels[index]; local
4878 pl->sclk = le16_to_cpu(clock_info->ci.usEngineClockLow);
4879 pl->sclk |= clock_info->ci.ucEngineClockHigh << 16;
4880 pl->mclk = le16_to_cpu(clock_info->ci.usMemoryClockLow);
4881 pl->mclk |= clock_info->ci.ucMemoryClockHigh << 16;
4883 pl->pcie_gen = r600_get_pcie_gen_support(rdev,
4887 pl->pcie_lane = r600_get_pcie_lane_support(rdev,
4892 pi->acpi_pcie_gen = pl->pcie_gen;
4897 pi->ulv.pl = *pl;
5286 struct ci_pl *pl; local
[all...]
H A Dsi_dpm.c1753 struct rv7xx_pl *pl,
4173 struct rv7xx_pl *pl,
4181 (u8)si_calculate_memory_refresh_rate(rdev, pl->sclk);
4184 pl->sclk,
4185 pl->mclk);
4518 ret = si_convert_power_level_to_smc(rdev, &ulv->pl,
4547 ret = si_populate_memory_timing_parameters(rdev, &ulv->pl,
4638 if (ulv->supported && ulv->pl.vddc) {
4857 struct rv7xx_pl *pl,
4872 level->gen2PCIE = (u8)pl
4172 si_populate_memory_timing_parameters(struct radeon_device *rdev, struct rv7xx_pl *pl, SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs) argument
4856 si_convert_power_level_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, SISLANDS_SMC_HW_PERFORMANCE_LEVEL *level) argument
5496 si_convert_mc_reg_table_entry_to_smc(struct radeon_device *rdev, struct rv7xx_pl *pl, SMC_SIslands_MCRegisterSet *mc_reg_table_data) argument
6226 struct rv7xx_pl *pl = &ps->performance_levels[index]; local
6551 struct rv7xx_pl *pl; local
[all...]
/drivers/media/platform/exynos4-is/
H A Dfimc-capture.c590 const struct fimc_pix_limit *pl = var->pix_limit; local
618 pl->scaler_dis_w : pl->scaler_en_w;
635 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
667 const struct fimc_pix_limit *pl = var->pix_limit; local
703 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
/drivers/scsi/
H A Du14-34f.c1585 unsigned long sl[n_ready], pl[n_ready], ll[n_ready]; local
1642 ll[n] = blk_rq_sectors(SCpnt->request); pl[n] = SCpnt->serial_number;
1650 if (overlap) sort(pl, il, n_ready, FALSE);
H A Deata.c2108 unsigned long sl[n_ready], pl[n_ready], ll[n_ready]; local
2182 pl[n] = SCpnt->serial_number;
2194 sort(pl, il, n_ready, 0);
/drivers/staging/lustre/lustre/ldlm/
H A Dldlm_request.c1453 struct ldlm_pool *pl = &ns->ns_pool; local
1462 slv = ldlm_pool_get_slv(pl);
1463 lvf = ldlm_pool_get_lvf(pl);
1469 ldlm_pool_set_clv(pl, lv);
/drivers/net/ethernet/brocade/bna/
H A Dbfi.h97 u32 pl[BFI_MBMSG_SZ]; member in struct:bfi_mbmsg
/drivers/scsi/csiostor/
H A Dcsio_hw.c2237 uint32_t pl = csio_rd_reg32(hw, PL_INT_ENABLE); local
2260 pl &= (~SF);
2261 csio_wr_reg32(hw, pl, PL_INT_ENABLE);
/drivers/video/fbdev/
H A Damifb.c2055 u_long pl, ps, pt; local
2060 ps = pl = ZTWO_PADDR(dummysprite);
2070 pl = ZTWO_PADDR(lofsprite);
2081 pt = pl; pl = ps; ps = pt;
2091 copl[cop_spr0ptrh].w[1] = highw(pl);
2092 copl[cop_spr0ptrl].w[1] = loww(pl);
/drivers/scsi/bfa/
H A Dbfi.h169 u32 pl[BFI_LMSG_PL_WSZ]; member in struct:bfi_msg_s
178 u32 pl[BFI_MBMSG_SZ]; member in struct:bfi_mbmsg_s

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