/drivers/net/wireless/ath/wil6210/ |
H A D | fw.h | 73 __le32 mask; member in struct:wil_fw_data_dwrite 77 * preserve original bits accordingly to the @mask 84 /* verify condition: [@addr] & @mask == @value 90 __le32 mask; /* mask for verification */ member in struct:wil_fw_record_verify
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/drivers/pci/pcie/aer/ |
H A D | aerdrv_errprint.c | 152 status = (info->status & ~info->mask); 192 dev_err(&dev->dev, " device [%04x:%04x] error status/mask=%08x/%08x\n", 194 info->status, info->mask); 205 trace_aer_event(dev_name(&dev->dev), (info->status & ~info->mask), 234 u32 status, mask; local 241 mask = aer->cor_mask; 246 mask = aer->uncor_mask; 255 dev_err(&dev->dev, "aer_status: 0x%08x, aer_mask: 0x%08x\n", status, mask); 267 trace_aer_event(dev_name(&dev->dev), (status & ~mask),
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/drivers/s390/cio/ |
H A D | chp.h | 35 int mask = 128 >> (num & 7); local 37 return (bitmap[byte] & mask) ? 1 : 0;
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/drivers/usb/phy/ |
H A D | phy-ulpi-viewport.c | 30 static int ulpi_viewport_wait(void __iomem *view, u32 mask) argument 35 if (!(readl(view) & mask))
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/drivers/video/fbdev/nvidia/ |
H A D | nv_type.h | 17 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask) 18 #define SetBF(mask,value) ((value) << (0?mask)) 19 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) )
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/drivers/extcon/ |
H A D | extcon-sm5502.c | 178 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_ATTACH_MASK, }, 179 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_DETACH_MASK, }, 180 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_KP_MASK, }, 181 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_LKP_MASK, }, 182 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_LKR_MASK, }, 183 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_OVP_EVENT_MASK, }, 184 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_OCP_EVENT_MASK, }, 185 { .reg_offset = 0, .mask = SM5502_IRQ_INT1_OVP_OCP_DIS_MASK, }, 188 { .reg_offset = 1, .mask = SM5502_IRQ_INT2_VBUS_DET_MASK,}, 189 { .reg_offset = 1, .mask [all...] |
H A D | extcon-rt8973a.c | 37 u8 mask; member in struct:reg_data 78 .mask = RT8973A_REG_CONTROL1_ADC_EN_MASK 188 { .reg_offset = 0, .mask = RT8973A_INT1_ATTACH_MASK, }, 189 { .reg_offset = 0, .mask = RT8973A_INT1_DETACH_MASK, }, 190 { .reg_offset = 0, .mask = RT8973A_INT1_CHGDET_MASK, }, 191 { .reg_offset = 0, .mask = RT8973A_INT1_DCD_T_MASK, }, 192 { .reg_offset = 0, .mask = RT8973A_INT1_OVP_MASK, }, 193 { .reg_offset = 0, .mask = RT8973A_INT1_CONNECT_MASK, }, 194 { .reg_offset = 0, .mask = RT8973A_INT1_ADC_CHG_MASK, }, 195 { .reg_offset = 0, .mask 547 u8 mask = info->reg_data[i].mask; local [all...] |
/drivers/gpu/drm/gma500/ |
H A D | mdfld_dsi_pkg_sender.c | 94 u32 mask) 101 if ((mask & REG_READ(gen_fifo_stat_reg)) == mask) 125 static int handle_dsi_error(struct mdfld_dsi_pkg_sender *sender, u32 mask) argument 130 dev_dbg(sender->dev->dev, "Handling error 0x%08x\n", mask); 132 switch (mask) { 184 REG_WRITE(intr_stat_reg, mask); 189 REG_WRITE(intr_stat_reg, mask); 199 if (mask & REG_READ(intr_stat_reg)) 201 "Cannot clean interrupt 0x%08x\n", mask); 93 wait_for_gen_fifo_empty(struct mdfld_dsi_pkg_sender *sender, u32 mask) argument 209 u32 mask; local [all...] |
/drivers/irqchip/ |
H A D | irq-metag-ext.c | 100 * Returns: Address of a HWMASKEXT register containing the mask bit for the 226 * meta_intc_mask_irq_simple() - minimal mask used by wrapper IRQ drivers 229 * This should be called by any wrapper IRQ driver mask functions. it doesn't do 231 * mask has taken place. It is the callers responsibility to ensure that the IRQ 255 * meta_intc_mask_irq() - mask an external irq using HWMASKEXT 256 * @data: data for the external irq to mask 258 * This is a default implementation of a mask function which makes use of the 274 /* update the interrupt mask */ 297 /* update the interrupt mask */ 304 * meta_intc_mask_irq_nomask() - mask a 628 u32 mask, bit; local 695 u32 mask, bit, tmp; local [all...] |
/drivers/rtc/ |
H A D | rtc-mrst.c | 189 static void mrst_irq_enable(struct mrst_rtc *mrst, unsigned char mask) argument 200 rtc_control |= mask; 206 static void mrst_irq_disable(struct mrst_rtc *mrst, unsigned char mask) argument 211 rtc_control &= ~mask; 426 unsigned char mask; local 429 mask = RTC_IRQMASK & ~RTC_AIE; 431 mask = RTC_IRQMASK; 432 tmp &= ~mask; 466 unsigned char mask; local 477 mask [all...] |
/drivers/gpio/ |
H A D | gpio-max732x.c | 36 * a dedicated interrupt mask. 75 #define INT_NO_MASK 0x1 /* Has interrupts, no mask */ 76 #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */ 77 #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */ 199 uint8_t reg_out, mask = 1u << (off & 0x7); local 207 reg_out = (val) ? reg_out | mask : reg_out & ~mask; 225 unsigned int mask = 1u << off; local 229 if ((mask & chip->dir_input) == 0) { 239 if ((mask 249 unsigned int mask = 1u << off; local 364 uint16_t mask = 1 << off; local 538 unsigned int mask = 1 << port; local [all...] |
H A D | gpio-tb10x.c | 75 u32 mask, u32 val) 83 r = (r & ~mask) | (val & mask); 98 int mask = BIT(offset); local 101 tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DDR, mask, val); 122 int mask = BIT(offset); local 125 tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DATA, mask, val); 132 int mask = BIT(offset); local 136 tb10x_set_bits(tb10x_gpio, OFFSET_TO_REG_DDR, mask, val); 277 gc->chip_types[0].regs.mask 74 tb10x_set_bits(struct tb10x_gpio *gpio, unsigned int offs, u32 mask, u32 val) argument [all...] |
/drivers/gpu/drm/mgag200/ |
H A D | mgag200_i2c.c | 41 static void mga_i2c_set_gpio(struct mga_device *mdev, int mask, int val) argument 46 tmp = (RREG8(DAC_DATA) & mask) | val; 51 static inline void mga_i2c_set(struct mga_device *mdev, int mask, int state) argument 56 state = mask; 57 mga_i2c_set_gpio(mdev, ~mask, state);
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/drivers/gpu/drm/nouveau/core/engine/disp/ |
H A D | conn.c | 43 DBG("HPD: %d\n", line->mask); 46 rep.mask = NVIF_NOTIFY_CONN_V0_UNPLUG; 48 rep.mask = NVIF_NOTIFY_CONN_V0_PLUG; 51 nvkm_event_send(&disp->hpd, rep.mask, index, &rep, sizeof(rep)); 131 .mask = NVKM_GPIO_TOGGLED,
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/drivers/media/pci/cx18/ |
H A D | cx18-io.h | 83 u32 eval, u32 mask) 87 eval &= mask; 93 if (eval == (r & mask)) 162 u32 eval, u32 mask) 164 cx18_writel_expect(cx, val, cx->reg_mem + reg, eval, mask); 82 cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr, u32 eval, u32 mask) argument 161 cx18_write_reg_expect(struct cx18 *cx, u32 val, u32 reg, u32 eval, u32 mask) argument
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/drivers/pcmcia/ |
H A D | rsrc_iodyn.c | 25 unsigned long mask; member in struct:pcmcia_align_data 36 start = (res->start & ~data->mask) + data->offset; 38 start += data->mask + 1; 68 data.mask = align - 1; 69 data.offset = base & data.mask;
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/drivers/phy/ |
H A D | phy-s5pv210-usb2.c | 95 u32 mask; local 99 mask = S5PV210_USB_ISOL_DEVICE; 102 mask = S5PV210_USB_ISOL_HOST; 109 mask, on ? 0 : mask);
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/drivers/pinctrl/samsung/ |
H A D | pinctrl-s3c64xx.c | 279 u32 mask; local 292 mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; 297 val &= ~(mask << shift); 308 static inline void s3c64xx_gpio_irq_set_mask(struct irq_data *irqd, bool mask) argument 317 if (mask) 474 unsigned int mask; local 479 mask = bank->eint_mask; 480 nr_eints = fls(mask); 519 static inline void s3c64xx_eint0_irq_set_mask(struct irq_data *irqd, bool mask) argument 527 if (mask) 609 unsigned int pend, mask; local 742 unsigned int mask; local [all...] |
/drivers/regulator/ |
H A D | qcom_rpm-regulator.c | 30 unsigned int mask; member in struct:request_member 53 (((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3) 194 if (WARN_ON((value << req->shift) & ~req->mask)) 197 vreg->val[req->word] &= ~req->mask; 215 if (req->mask == 0) 240 if (req->mask == 0) 270 if (req->mask == 0) 289 if (req->mask == 0) 308 if (req->mask == 0) 327 if (req->mask [all...] |
/drivers/scsi/be2iscsi/ |
H A D | be.h | 164 /* Returns the bit mask of the field that is NOT shifted into location. */ 170 static inline void amap_set(void *ptr, u32 dw_offset, u32 mask, argument 174 *dw &= ~(mask << offset); 175 *dw |= (mask & value) << offset; 185 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset) argument 188 return mask & (*(dw + dw_offset) >> offset);
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/drivers/iio/magnetometer/ |
H A D | st_magn_core.c | 162 .mask = ST_MAGN_1_ODR_MASK, 176 .mask = ST_MAGN_1_PW_MASK, 182 .mask = ST_MAGN_1_FS_MASK, 239 .mask = ST_MAGN_2_ODR_MASK, 253 .mask = ST_MAGN_2_PW_MASK, 259 .mask = ST_MAGN_2_FS_MASK, 290 int *val2, long mask) 295 switch (mask) { 322 struct iio_chan_spec const *chan, int val, int val2, long mask) 326 switch (mask) { 288 st_magn_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *ch, int *val, int *val2, long mask) argument 321 st_magn_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument [all...] |
/drivers/net/ethernet/ibm/ehea/ |
H A D | ehea.h | 133 #define EHEA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff) 135 #define EHEA_BMASK_MASK(mask) \ 136 (0xffffffffffffffffULL >> ((64 - (mask)) & 0xffff)) 138 #define EHEA_BMASK_SET(mask, value) \ 139 ((EHEA_BMASK_MASK(mask) & ((u64)(value))) << EHEA_BMASK_SHIFTPOS(mask)) 141 #define EHEA_BMASK_GET(mask, value) \ 142 (EHEA_BMASK_MASK(mask) & (((u64)(value)) >> EHEA_BMASK_SHIFTPOS(mask))) [all...] |
/drivers/net/wireless/brcm80211/brcmsmac/ |
H A D | types.h | 134 #define CONF_MSK(config, mask) ((config) & (mask)) 147 #define NCONF_MSK(mask) CONF_MSK(NCONF, mask) 155 #define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) 163 #define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) 273 #define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (va [all...] |
/drivers/iio/dac/ |
H A D | ad5421.c | 222 * it is not possible to mask fault conditions. For certain fault 355 struct iio_chan_spec const *chan, int val, int val2, long mask) 359 switch (mask) { 388 unsigned int mask; local 393 mask = AD5421_FAULT_OVER_CURRENT; 395 mask = AD5421_FAULT_UNDER_CURRENT; 398 mask = AD5421_FAULT_TEMP_OVER_140; 406 st->fault_mask |= mask; 408 st->fault_mask &= ~mask; 419 unsigned int mask; local 354 ad5421_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) argument [all...] |
/drivers/mfd/ |
H A D | twl4030-irq.c | 49 * and mask registers in the PIH and SIH modules. 86 } mask[2]; member in struct:sih 101 .mask = { { \ 133 .mask = { { 157 .mask = { { 193 .mask = { { 216 .mask = { { 248 .mask = { { 265 .mask = { { 289 * thread. All we do here is acknowledge and mask th [all...] |