Searched refs:FW_BLC_SELF_EN (Results 1 - 5 of 5) sorted by relevance

/drivers/gpu/drm/gma500/
H A Dcdv_intel_display.c479 if (REG_READ(FW_BLC_SELF) & FW_BLC_SELF_EN) {
482 REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN));
542 REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
H A Dpsb_intel_reg.h611 #define FW_BLC_SELF_EN (1<<15) macro
/drivers/gpu/drm/i915/
H A Dintel_pm.c840 I915_WRITE(FW_BLC_SELF, enable ? FW_BLC_SELF_EN : 0);
846 val = enable ? _MASKED_BIT_ENABLE(FW_BLC_SELF_EN) :
847 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN);
H A Di915_debugfs.c1549 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
H A Di915_reg.h1303 #define FW_BLC_SELF_EN (1<<15) /* 945 only */ macro

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