Searched refs:MUX (Results 1 - 22 of 22) sorted by relevance

/drivers/clk/samsung/
H A Dclk-exynos5420.c507 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
508 MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
509 MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
510 MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2),
512 MUX(0, "mout_aclk333_432_gscl", mout_group6_5800_p, SRC_TOP1, 0, 2),
513 MUX(0, "mout_aclk333_432_isp", mout_group6_5800_p, SRC_TOP1, 4, 2),
514 MUX(0, "mout_aclk333_432_isp0", mout_group6_5800_p, SRC_TOP1, 12, 2),
515 MUX(0, "mout_aclk266", mout_group5_5800_p, SRC_TOP1, 20, 2),
516 MUX(0, "mout_aclk333", mout_group1_5800_p, SRC_TOP1, 28, 2),
518 MUX(
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H A Dclk-s5pv210.c418 MUX(MOUT_FLASH, "mout_flash", mout_flash_p, CLK_SRC0, 28, 1),
419 MUX(MOUT_PSYS, "mout_psys", mout_group4_p, CLK_SRC0, 24, 1),
420 MUX(MOUT_DSYS, "mout_dsys", mout_group4_p, CLK_SRC0, 20, 1),
421 MUX(MOUT_MSYS, "mout_msys", mout_group3_p, CLK_SRC0, 16, 1),
422 MUX(MOUT_EPLL, "mout_epll", mout_epll_p, CLK_SRC0, 8, 1),
423 MUX(MOUT_MPLL, "mout_mpll", mout_mpll_p, CLK_SRC0, 4, 1),
424 MUX(MOUT_APLL, "mout_apll", mout_apll_p, CLK_SRC0, 0, 1),
426 MUX(MOUT_CLKOUT, "mout_clkout", mout_clkout_p, MISC, 8, 2),
431 MUX(MOUT_VPLL, "mout_vpll", mout_vpll_p, CLK_SRC0, 12, 1),
433 MUX(MOUT_VPLLSR
[all...]
H A Dclk-exynos4.c538 MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1),
539 MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1),
540 MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1),
545 MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIL1, 8, 2),
546 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
547 MUX(CLK_SCLK_EPLL, "sclk_epll", mout_epll_p, SRC_TOP0, 4, 1),
548 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
550 MUX(0, "mout_dmc_bus", sclk_ampll_p4210, SRC_DMC, 4, 1),
551 MUX(0, "mout_dphy", sclk_ampll_p4210, SRC_DMC, 8, 1),
556 MUX(
[all...]
H A Dclk-exynos5250.c279 MUX(0, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),
305 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
306 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
307 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
308 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
310 MUX(0, "mout_aclk400_isp", mout_aclk200_p, SRC_TOP1, 24, 1),
311 MUX(0, "mout_aclk400_g3d", mout_aclk400_p, SRC_TOP1, 28, 1),
313 MUX(0, "mout_cpll", mout_cpll_p, SRC_TOP2, 8, 1),
314 MUX(0, "mout_epll", mout_epll_p, SRC_TOP2, 12, 1),
315 MUX(
[all...]
H A Dclk-exynos5410.c82 MUX(0, "mout_apll", apll_p, SRC_CPU, 0, 1),
83 MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
85 MUX(0, "mout_kpll", kpll_p, SRC_KFC, 0, 1),
86 MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
88 MUX(0, "sclk_mpll", mpll_p, SRC_CPERI1, 8, 1),
89 MUX(0, "sclk_mpll_muxed", mpll_user_p, SRC_TOP2, 20, 1),
91 MUX(0, "sclk_bpll", bpll_p, SRC_CDREX, 0, 1),
92 MUX(0, "sclk_bpll_muxed", bpll_user_p, SRC_TOP2, 24, 1),
94 MUX(0, "sclk_cpll", cpll_p, SRC_TOP2, 8, 1),
96 MUX(
[all...]
H A Dclk-exynos5260.c231 MUX(AUD_MOUT_AUD_PLL_USER, "mout_aud_pll_user", mout_aud_pll_user_p,
233 MUX(AUD_MOUT_SCLK_AUD_I2S, "mout_sclk_aud_i2s", mout_sclk_aud_i2s_p,
235 MUX(AUD_MOUT_SCLK_AUD_PCM, "mout_sclk_aud_pcm", mout_sclk_aud_pcm_p,
340 MUX(DISP_MOUT_ACLK_DISP_333_USER, "mout_aclk_disp_333_user",
343 MUX(DISP_MOUT_SCLK_DISP_PIXEL_USER, "mout_sclk_disp_pixel_user",
346 MUX(DISP_MOUT_ACLK_DISP_222_USER, "mout_aclk_disp_222_user",
349 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER,
353 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER,
357 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER,
361 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USE
[all...]
H A Dclk-exynos3250.c309 MUX(CLK_MOUT_MPLL_USER_L, "mout_mpll_user_l", mout_mpll_user_p,
311 MUX(CLK_MOUT_GDL, "mout_gdl", mout_gdl_p, SRC_LEFTBUS, 0, 1),
314 MUX(CLK_MOUT_MPLL_USER_R, "mout_mpll_user_r", mout_mpll_user_p,
316 MUX(CLK_MOUT_GDR, "mout_gdr", mout_gdr_p, SRC_RIGHTBUS, 0, 1),
319 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
320 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24, 1),
321 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
322 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
323 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
324 MUX(CLK_MOUT_ACLK_266_
[all...]
H A Dclk-s3c2412.c136 MUX(0, "erefclk", erefclk_p, CLKSRC, 14, 2),
137 MUX(0, "urefclk", urefclk_p, CLKSRC, 12, 2),
138 MUX(0, "mux_cam", camclk_p, CLKSRC, 11, 1),
139 MUX(0, "mux_usb", usbclk_p, CLKSRC, 10, 1),
140 MUX(0, "mux_i2s", i2sclk_p, CLKSRC, 9, 1),
141 MUX(0, "mux_uart", uartclk_p, CLKSRC, 8, 1),
142 MUX(USYSCLK, "usysclk", usysclk_p, CLKSRC, 5, 1),
143 MUX(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1),
144 MUX(MDIVCLK, "mdivclk", mdivclk_p, CLKSRC, 3, 1),
145 MUX(ARMCL
[all...]
H A Dclk-s3c64xx.c193 MUX(MOUT_APLL, "mout_apll", apll_p, CLK_SRC, 0, 1),
194 MUX(MOUT_MPLL, "mout_mpll", mpll_p, CLK_SRC, 1, 1),
195 MUX(MOUT_EPLL, "mout_epll", epll_p, CLK_SRC, 2, 1),
196 MUX(MOUT_MFC, "mout_mfc", mfc_p, CLK_SRC, 4, 1),
197 MUX(MOUT_AUDIO0, "mout_audio0", audio0_p, CLK_SRC, 7, 3),
198 MUX(MOUT_AUDIO1, "mout_audio1", audio1_p, CLK_SRC, 10, 3),
199 MUX(MOUT_UART, "mout_uart", uart_p, CLK_SRC, 13, 1),
200 MUX(MOUT_SPI0, "mout_spi0", spi_mmc_p, CLK_SRC, 14, 2),
201 MUX(MOUT_SPI1, "mout_spi1", spi_mmc_p, CLK_SRC, 16, 2),
202 MUX(MOUT_MMC
[all...]
H A Dclk-s3c2443.c119 MUX(0, "epllref", epllref_p, CLKSRC, 7, 2),
120 MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1),
121 MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1),
124 MUX(0, "mux_i2s0", i2s0_p, CLKSRC, 14, 2),
253 MUX(MUX_HSMMC0, "mux_hsmmc0", s3c2416_hsmmc0_p, CLKSRC, 16, 1),
254 MUX(MUX_HSMMC1, "mux_hsmmc1", s3c2416_hsmmc1_p, CLKSRC, 17, 1),
255 MUX(MUX_HSSPI0, "mux_hsspi0", s3c2416_hsspi0_p, CLKSRC, 18, 1),
336 MUX(0, "mux_cam", s3c2450_cam_p, CLKSRC, 20, 1),
337 MUX(MUX_HSSPI1, "mux_hsspi1", s3c2450_hsspi1_p, CLKSRC, 19, 1),
338 MUX(
[all...]
H A Dclk-s3c2410.c101 MUX(FCLK, "fclk", fclk_p, CLKSLOW, 4, 1),
275 MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2),
276 MUX(ARMCLK, "armclk", armclk_p, CAMDIVN, 12, 1),
324 MUX(CAMIF, "camif", s3c2440_camif_p, CAMDIVN, 4, 1),
340 MUX(CAMIF, "camif", s3c2442_camif_p, CAMDIVN, 4, 2),
H A Dclk-exynos5440.c53 MUX(0, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1),
H A Dclk.h153 #define MUX(_id, cname, pnames, o, s, w) \ macro
/drivers/clk/tegra/
H A Dclk-tegra-periph.c131 #define MUX(_name, _parents, _offset, \ macro
424 MUX("i2s0", mux_pllaout0_audio0_2x_pllp_clkm, CLK_SOURCE_I2S0, 30, TEGRA_PERIPH_ON_APB, tegra_clk_i2s0),
425 MUX("i2s1", mux_pllaout0_audio1_2x_pllp_clkm, CLK_SOURCE_I2S1, 11, TEGRA_PERIPH_ON_APB, tegra_clk_i2s1),
426 MUX("i2s2", mux_pllaout0_audio2_2x_pllp_clkm, CLK_SOURCE_I2S2, 18, TEGRA_PERIPH_ON_APB, tegra_clk_i2s2),
427 MUX("i2s3", mux_pllaout0_audio3_2x_pllp_clkm, CLK_SOURCE_I2S3, 101, TEGRA_PERIPH_ON_APB, tegra_clk_i2s3),
428 MUX("i2s4", mux_pllaout0_audio4_2x_pllp_clkm, CLK_SOURCE_I2S4, 102, TEGRA_PERIPH_ON_APB, tegra_clk_i2s4),
429 MUX("spdif_out", mux_pllaout0_audio_2x_pllp_clkm, CLK_SOURCE_SPDIF_OUT, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_out),
430 MUX("spdif_in", mux_pllp_pllc_pllm, CLK_SOURCE_SPDIF_IN, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_in),
431 MUX("pwm", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_PWM, 17, TEGRA_PERIPH_ON_APB, tegra_clk_pwm),
432 MUX("ad
[all...]
/drivers/clk/rockchip/
H A Dclk-rk3188.c292 MUX(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
297 MUX(SCLK_CIF0, "sclk_cif0", mux_sclk_cif0_p, 0,
315 MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
326 MUX(SCLK_HSADC, "sclk_hsadc", mux_sclk_hsadc_p, 0,
357 MUX(0, "uart_src", mux_pll_src_gpll_cpll_p, 0,
365 MUX(SCLK_UART0, "sclk_uart0", mux_sclk_uart0_p, 0,
373 MUX(SCLK_UART1, "sclk_uart1", mux_sclk_uart1_p, 0,
381 MUX(SCLK_UART2, "sclk_uart2", mux_sclk_uart2_p, 0,
389 MUX(SCLK_UART3, "sclk_uart3", mux_sclk_uart3_p, 0,
524 MUX(DCLK_LCDC
[all...]
H A Dclk-rk3288.c306 MUX(0, "i2s_pre", mux_i2s_pre_p, CLK_SET_RATE_PARENT,
314 MUX(0, "spdif_src", mux_pll_src_cpll_gpll_p, 0,
526 MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, 0,
528 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
536 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, 0,
544 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, 0,
552 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, 0,
560 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, 0,
566 MUX(0, "macref", mux_macref_p, 0,
580 MUX(SCLK_HSAD
[all...]
H A Dclk.h297 #define MUX(_id, cname, pnames, f, o, s, w, mf) \ macro
/drivers/i2c/muxes/
H A DKconfig26 I2C busses connected through a MUX, which is controlled
/drivers/pinctrl/
H A Dpinctrl-tz1090.c729 * MUX() - Initialise a mux description.
739 #define MUX(f0, f1, f2, f3, f4, mux_r, mux_b, mux_w) \ macro
777 MUX(f0, f1, f2, f3, f4, mux_r, mux_b, mux_w)
808 .mux = MUX(f0, f1, f2, f3, f4, \
/drivers/scsi/
H A Dncr53c8xx.h734 #define MUX 0x80 /* 720 host bus multiplex mode */ macro
H A Dncr53c8xx.c3877 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */
5192 OUTB (nc_ctest4, MUX);
/drivers/net/wireless/brcm80211/brcmsmac/phy/
H A Dphy_cmn.c42 #define MUX(pred, true, false) ((pred) ? (true) : (false)) macro
45 #define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1)

Completed in 221 milliseconds