| /drivers/clk/samsung/ |
| H A D | clk-pll.h | 42 .pdiv = (_p), \
50 .pdiv = (_p), \
59 .pdiv = (_p), \
68 .pdiv = (_p), \
78 .pdiv = (_p), \
90 unsigned int pdiv; member in struct:samsung_pll_rate_table
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| H A D | clk-pll.c | 77 u32 pll_con, mdiv, pdiv, sdiv; local
82 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK;
86 do_div(fvco, (pdiv + 2) << sdiv);
110 u32 pll_con, mdiv, pdiv, sdiv; local
115 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK;
119 do_div(fvco, pdiv << sdiv);
147 u32 mdiv, pdiv, sdiv, pll_con; local
152 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
156 do_div(fvco, (pdiv << sdiv));
169 return (rate->mdiv != old_mdiv || rate->pdiv !
250 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; local
364 u32 mdiv, pdiv, sdiv, pll_con; local
509 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift; local
643 u32 mdiv, pdiv, sdiv, pll_con; local
683 u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1; local
721 u32 pll_con, mdiv, pdiv, sdiv; local
739 u32 pll_con, mdiv, pdiv, sdiv; local
970 u32 mdiv, pdiv, sdiv, pll_con; local
984 samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con) argument
1075 u32 mdiv, pdiv, sdiv, pll_con0, pll_con2; local
[all...] |
| H A D | clk-exynos3250.c | 1005 exynos3250_dmc_plls[bpll].rate_table[0].pdiv,
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| /drivers/cpufreq/ |
| H A D | s3c2410-cpufreq.c | 49 unsigned int hdiv, pdiv; local
68 pdiv = (hclk > cfg->max.pclk) ? 2 : 1;
69 pclk = hclk / pdiv;
76 pdiv *= hdiv;
79 cfg->divs.p_divisor = pdiv;
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| H A D | s3c2412-cpufreq.c | 43 unsigned int hdiv, pdiv, armdiv, dvs; local
91 pdiv = (hclk > cfg->max.pclk) ? 2 : 1;
93 if ((hclk / pdiv) > cfg->max.pclk)
94 pdiv++;
96 cfg->freq.pclk = hclk / pdiv;
98 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv);
100 if (pdiv > 2)
103 pdiv *= hdiv;
108 cfg->divs.p_divisor = pdiv * armdi
[all...] |
| H A D | s3c2440-cpufreq.c | 57 unsigned int hdiv, pdiv; local
91 pdiv = (hclk > cfg->max.pclk) ? 2 : 1;
93 if ((hclk / pdiv) > cfg->max.pclk)
94 pdiv++;
96 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv);
98 if (pdiv > 2)
101 pdiv *= hdiv;
122 cfg->divs.p_divisor = pdiv;
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| /drivers/clk/tegra/ |
| H A D | clk-tegra124.c | 167 { .pdiv = 1, .hw_val = 0 },
168 { .pdiv = 2, .hw_val = 1 },
169 { .pdiv = 3, .hw_val = 2 },
170 { .pdiv = 4, .hw_val = 3 },
171 { .pdiv = 5, .hw_val = 4 },
172 { .pdiv = 6, .hw_val = 5 },
173 { .pdiv = 8, .hw_val = 6 },
174 { .pdiv = 10, .hw_val = 7 },
175 { .pdiv = 12, .hw_val = 8 },
176 { .pdiv
[all...] |
| H A D | clk-tegra114.c | 187 { .pdiv = 1, .hw_val = 0 },
188 { .pdiv = 2, .hw_val = 1 },
189 { .pdiv = 3, .hw_val = 2 },
190 { .pdiv = 4, .hw_val = 3 },
191 { .pdiv = 5, .hw_val = 4 },
192 { .pdiv = 6, .hw_val = 5 },
193 { .pdiv = 8, .hw_val = 6 },
194 { .pdiv = 10, .hw_val = 7 },
195 { .pdiv = 12, .hw_val = 8 },
196 { .pdiv
[all...] |
| H A D | clk-pll.c | 365 while (p_tohw->pdiv) {
366 if (p_div <= p_tohw->pdiv)
381 while (p_tohw->pdiv) {
383 return p_tohw->pdiv;
653 int pdiv; local
674 pdiv = _hw_to_p_div(hw, cfg.p);
675 if (pdiv < 0) {
677 pdiv = 1;
680 cfg.m *= pdiv;
1734 while (p_tohw->pdiv) {
[all...] |
| H A D | clk-tegra20.c | 373 { .pdiv = 1, .hw_val = 1 },
374 { .pdiv = 2, .hw_val = 0 },
375 { .pdiv = 0, .hw_val = 0 },
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| H A D | clk-tegra30.c | 330 { .pdiv = 1, .hw_val = 1 },
331 { .pdiv = 2, .hw_val = 0 },
332 { .pdiv = 0, .hw_val = 0 },
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| H A D | clk.h | 124 * @pdiv: post divider
128 u8 pdiv; member in struct:pdiv_map
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| /drivers/clk/st/ |
| H A D | clk-flexgen.c | 25 struct clk_divider pdiv; member in struct:flexgen
123 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw;
139 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw;
204 fgxbar->pdiv.lock = lock;
205 fgxbar->pdiv.reg = reg + 0x58 + idx * 4;
206 fgxbar->pdiv.width = 10;
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| H A D | clkgen-pll.c | 48 struct clkgen_field pdiv; member in struct:clkgen_pll_data
75 .pdiv = CLKGEN_FIELD(0x0, C65_PDIV_MASK, 16),
277 unsigned long mdiv, ndiv, pdiv; local
284 pdiv = CLKGEN_READ(pll, pdiv);
292 rate = (unsigned long)div64_u64(res, mdiv * (1 << pdiv));
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| H A D | clkgen-fsyn.c | 526 VCO frequency = (fin x ndiv) / pdiv
527 ndiv = VCOfreq * pdiv / fin
529 unsigned long pdiv = 1, n; local
543 n = output * pdiv / input;
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| /drivers/gpu/drm/sti/ |
| H A D | sti_hdmi_tx3g0c55phy.c | 139 u32 mdiv, ndiv, pdiv, val; local
166 pdiv = 4;
170 pdiv = 2;
182 val |= (pdiv << REJECTION_PLL_HDMI_PDIV_SHIFT) |
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| /drivers/net/wireless/b43/ |
| H A D | phy_lp.c | 562 lpphy->pdiv = 1;
565 lpphy->pdiv = 2;
569 tmp = (((800000000 * lpphy->pdiv + crystalfreq) /
573 tmp = (((100 * crystalfreq + 16000000 * lpphy->pdiv) /
574 (32000000 * lpphy->pdiv)) - 1) & 0xFF;
577 tmp = (((2 * crystalfreq + 1000000 * lpphy->pdiv) /
578 (2000000 * lpphy->pdiv)) - 1) & 0xFF;
581 ref = (1000 * lpphy->pdiv + 2 * crystalfreq) / (2000 * lpphy->pdiv);
2441 tmp2 = lpphy->pdiv * 100
[all...] |
| H A D | phy_lp.h | 891 unsigned int pdiv; member in struct:b43_phy_lp
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| /drivers/net/wireless/brcm80211/brcmsmac/phy/ |
| H A D | phy_int.h | 657 u8 pdiv; member in struct:brcms_phy
|