Searched refs:BIT_3 (Results 1 - 12 of 12) sorted by relevance

/drivers/scsi/qla2xxx/
H A Dqla_fw.h403 #define CF_DIF_SEG_DESCR_ENABLE BIT_3
811 #define TCF_ABORT_TASK_SET BIT_3
934 #define ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */
937 #define ISRX_RISC_INT BIT_3 /* RISC interrupt. */
992 #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)
997 #define GPDX_LED_GREEN_ON BIT_3
1116 #define MDBS_NON_PARTIC BIT_3
1376 #define FSTATE_LOGGED_IN BIT_3
1392 #define VCO_DIAG_FW BIT_3
H A Dqla_def.h62 #define BIT_3 0x8 macro
309 #define CSR_FLASH_64K_BANK BIT_3 /* Flash upper 64K bank select */
315 #define ICR_EN_RISC BIT_3 /* ISP enable RISC interrupts. */
318 #define ISR_RISC_INT BIT_3 /* RISC interrupt */
326 #define NVR_DATA_IN BIT_3
603 #define FO1_CTIO_RETRY BIT_3
760 #define MBX_3 BIT_3
962 #define GLSO_USE_DID BIT_3
1273 #define CF_SIMPLE_TAG BIT_3
1365 #define PO_ENABLE_INCR_GUARD_SEED BIT_3
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H A Dqla_init.c1578 (BIT_4 | BIT_3)) >> 3;
1580 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1598 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2215 nv->firmware_options[0] = BIT_3 | BIT_1;
2272 nv->firmware_options[0] &= ~BIT_3;
2350 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
2426 icb->firmware_options[0] &= ~BIT_3;
2428 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
2438 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
2443 ~(BIT_3 | BIT_
[all...]
H A Dqla_mbx.c2041 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2882 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3017 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
H A Dqla_isr.c2083 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
H A Dqla_os.c476 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
/drivers/scsi/
H A Dqla1280.h29 #define BIT_3 0x8 macro
132 #define ISP_CFG0_1040A BIT_3 /* ISP1040A */
158 #define NV_DATA_IN BIT_3
166 #define CDMA_CONF_SENAB BIT_3 /* SXP to DMA Data enable */
183 #define DDMA_CONF_SENAB BIT_3 /* SXP to DMA Data enable */
577 #define RF_BAD_PAYLOAD BIT_3 /* Bad payload. */
H A Dqla1280.c1159 mr = BIT_3 | BIT_2 | BIT_1 | BIT_0;
1807 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 |
1824 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 |
1947 BIT_3 | BIT_2 | BIT_1 | BIT_0,
1961 BIT_3 | BIT_2 | BIT_1 | BIT_0,
2255 BIT_7 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
2890 pkt->control_flags |= cpu_to_le16(BIT_3);
3159 pkt->control_flags |= cpu_to_le16(BIT_3);
3785 if (pkt->entry_status & BIT_3)
3805 if (pkt->entry_status & (BIT_3
[all...]
/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_ctx.c1051 arg1 &= ~(BIT_2 | BIT_3);
1057 arg2 |= (BIT_2 | BIT_3);
1067 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
1071 arg2 &= ~BIT_3;
1078 arg1 |= (BIT_3 | BIT_5);
H A Dqlcnic_hdr.h197 #define BIT_3 0x8 macro
500 #define TA_CTL_BUSY BIT_3
H A Dqlcnic.h1120 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1341 #define QLCNIC_DUMP_ORCRB BIT_3
/drivers/scsi/qla4xxx/
H A Dql4_def.h74 #define BIT_3 0x8 macro
194 #define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */

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