Searched refs:BIT_5 (Results 1 - 14 of 14) sorted by relevance

/drivers/scsi/
H A Dqla1280.h31 #define BIT_5 0x20 macro
134 #define ISP_CFG0_1040C BIT_5 /* ISP1040C */
137 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */
138 #define ISP_CFG1_F32 BIT_5 /* 128-byte FIFO threshold */
319 #define TP_PPR BIT_5 /* PPR */
H A Dqla1280.c480 return BIT_5;
484 return BIT_5 | BIT_6;
1960 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 |
2229 cfg1 = RD_REG_WORD(&reg->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6);
2309 mb[1] |= BIT_5;
2314 mb[2] |= BIT_5;
3996 if ((mb[2] & BIT_5) && ((mb[6] >> 8) & 0xff) >= 2)
/drivers/scsi/qla2xxx/
H A Dqla_fw.h19 #define FO2_ENABLE_SEL_CLASS2 BIT_5
36 #define PDF_FCP2_CONF BIT_5
749 #define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */
750 #define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */
923 #define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)
964 #define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */
H A Dqla_init.c1582 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1589 ha->fw_options[10] |= BIT_5 |
1595 (BIT_7 | BIT_6 | BIT_5)) >> 5;
1600 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
1607 ha->fw_options[11] |= BIT_5 |
2203 nv->firmware_options[1] = BIT_7 | BIT_5;
2204 nv->add_firmware_options[0] = BIT_5;
2205 nv->add_firmware_options[1] = BIT_5 | BIT_4;
2210 nv->firmware_options[1] = BIT_7 | BIT_5;
2211 nv->add_firmware_options[0] = BIT_5;
[all...]
H A Dqla_def.h64 #define BIT_5 0x20 macro
219 #define SRB_CRC_CTX_DSD_VALID BIT_5 /* DIF: dsd_list valid */
410 #define HCCR_RISC_PAUSE BIT_5 /* Pause mode bit */
605 #define FO1_DISABLE_100MS_LOS_WAIT BIT_5
626 #define ADD_FO2_ENABLE_SEL_CLS2 BIT_5
758 #define MBX_5 BIT_5
1272 #define CF_READ BIT_5
1366 #define PO_DISABLE_INCR_REF_TAG BIT_5
1445 #define RF_INV_E_ORDER BIT_5 /* Invalid entry order. */
2547 #define DT_ISP6312 BIT_5
[all...]
H A Dqla_mid.c673 options |= BIT_5;
789 options |= BIT_5;
H A Dqla_isr.c1172 } else if (iop[0] & BIT_5)
H A Dqla_sup.c2023 if ((flash_data & BIT_5) && cnt > 2)
H A Dqla_mbx.c2882 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3017 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
H A Dqla_os.c478 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_ctx.c1074 arg1 |= (BIT_2 | BIT_5);
1078 arg1 |= (BIT_3 | BIT_5);
1119 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
H A Dqlcnic_hdr.h199 #define BIT_5 0x20 macro
H A Dqlcnic.h1343 #define QLCNIC_DUMP_RD_SAVE BIT_5
/drivers/scsi/qla4xxx/
H A Dql4_def.h76 #define BIT_5 0x20 macro

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