Searched refs:phy_reg (Results 1 - 18 of 18) sorted by relevance

/drivers/net/ethernet/dec/tulip/
H A Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); local
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */
27 if (phy_reg & 0x20000000) dev->if_port = 5;
28 else if (phy_reg & 0x40000000) dev->if_port = 3;
29 else if (phy_reg & 0x10000000) dev->if_port = 4;
30 else if (phy_reg & 0x08000000) dev->if_port = 0;
36 if (phy_reg & 0x30000000) {
42 phy_reg, medianame[dev->if_port]);
56 int phy_reg = ioread32(ioaddr + 0xB8); local
60 phy_reg, csr
111 int phy_reg = ioread32(ioaddr + 0xB8); local
[all...]
H A Ddmfe.c1668 u16 phy_reg; local
1676 phy_reg = phy_read(db->ioaddr,
1680 db->phy_addr, 18, phy_reg, db->chip_id);
1684 phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0;
1688 phy_reg |= db->PHY_reg4;
1692 case DMFE_10MHF: phy_reg |= 0x20; break;
1693 case DMFE_10MFD: phy_reg |= 0x40; break;
1694 case DMFE_100MHF: phy_reg |= 0x80; break;
1695 case DMFE_100MFD: phy_reg |= 0x100; break;
1697 if (db->chip_id == PCI_DM9009_ID) phy_reg
1724 u16 phy_reg; local
2044 uint phy_reg; local
2061 uint phy_reg; local
[all...]
H A Duli526x.c1552 u16 phy_reg; local
1555 phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0;
1559 phy_reg |= db->PHY_reg4;
1563 case ULI526X_10MHF: phy_reg |= 0x20; break;
1564 case ULI526X_10MFD: phy_reg |= 0x40; break;
1565 case ULI526X_100MHF: phy_reg |= 0x80; break;
1566 case ULI526X_100MFD: phy_reg |= 0x100; break;
1572 if ( !(phy_reg & 0x01e0)) {
1573 phy_reg|=db->PHY_reg4;
1576 phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, d
1593 u16 phy_reg; local
[all...]
/drivers/net/
H A Dsungem_phy.c599 u32 phy_reg; local
604 phy_reg = phy_read(phy, MII_NCONFIG);
606 mode = (phy_reg & BCM5421_MODE_MASK) >> 5;
613 phy_reg = phy_read(phy, MII_NCONFIG);
615 if (phy_reg & 0x0020)
623 u32 phy_reg; local
628 phy_reg = phy_read(phy, MII_NCONFIG);
630 mode = (phy_reg & BCM5421_MODE_MASK ) >> 5;
639 phy_reg = phy_read(phy, MII_NCONFIG);
641 if ( (phy_reg
672 u32 phy_reg; local
698 u32 phy_reg; local
[all...]
/drivers/net/ethernet/intel/e1000/
H A De1000_ethtool.c1100 u16 phy_reg; local
1106 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1107 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1109 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1115 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1116 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1118 M88E1000_PHY_SPEC_CTRL, phy_reg);
1125 u16 phy_reg; local
1139 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1144 phy_reg
1246 u16 phy_reg = 0; local
1319 u16 phy_reg; local
[all...]
/drivers/net/ethernet/ti/
H A Ddavinci_mdio.c207 static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg) argument
213 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
223 reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) |
252 int phy_reg, u16 phy_data)
258 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK)
268 reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) |
251 davinci_mdio_write(struct mii_bus *bus, int phy_id, int phy_reg, u16 phy_data) argument
/drivers/net/ethernet/intel/e1000e/
H A Dethtool.c1229 u16 phy_reg = 0; local
1268 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg);
1269 phy_reg &= ~0x0007;
1270 phy_reg |= 0x006;
1271 e1e_wphy(hw, PHY_REG(2, 21), phy_reg);
1276 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1277 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C);
1279 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg);
1280 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040);
1282 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg);
1465 u16 phy_reg; local
[all...]
H A Dich8lan.c634 u16 phy_reg; local
639 ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg);
644 phy_reg &= ~I82579_LPI_CTRL_ENABLE_MASK;
646 phy_reg |= I82579_LPI_CTRL_ENABLE_MASK;
648 return e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);
664 u16 phy_reg; local
714 e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);
715 phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK;
718 phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT);
720 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);
1442 u16 i, phy_reg = 0; local
1483 u16 phy_reg, data; local
1691 u16 phy_reg; local
[all...]
H A Dphy.c2595 * @phy_reg: pointer to store original contents of BM_WUC_ENABLE_REG
2597 * Assumes semaphore already acquired and phy_reg points to a valid memory
2600 s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg) argument
2615 ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2626 temp = *phy_reg;
2647 * @phy_reg: pointer to original contents of BM_WUC_ENABLE_REG
2651 * Assumes semaphore already acquired and *phy_reg is the contents of the
2655 s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg) argument
2667 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, *phy_reg);
2706 u16 phy_reg local
[all...]
H A De1000.h622 u16 *phy_reg);
624 u16 *phy_reg);
H A Dnetdev.c5373 u16 phy_reg, wuc_enable; local
5400 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5403 phy_reg |= BM_RCTL_UPE;
5405 phy_reg |= BM_RCTL_MPE;
5406 phy_reg &= ~(BM_RCTL_MO_MASK);
5408 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5411 phy_reg |= BM_RCTL_BAM;
5413 phy_reg |= BM_RCTL_PMCF;
5416 phy_reg |= BM_RCTL_RFCE;
5417 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
[all...]
/drivers/net/phy/
H A Dphy_device.c212 int phy_reg; local
216 phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
218 if (phy_reg < 0)
221 *phy_id = (phy_reg & 0xffff) << 16;
224 phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
226 if (phy_reg < 0)
229 *phy_id |= (phy_reg & 0xffff);
/drivers/infiniband/hw/nes/
H A Dnes_utils.c413 void nes_write_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 data) argument
419 0x50020000 | data | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
440 void nes_read_1G_phy_reg(struct nes_device *nesdev, u8 phy_reg, u8 phy_addr, u16 *data) argument
449 0x60020000 | ((u32)phy_reg << 18) | ((u32)phy_addr << 23));
472 void nes_write_10G_phy_reg(struct nes_device *nesdev, u16 phy_addr, u8 dev_addr, u16 phy_reg, argument
483 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
518 void nes_read_10G_phy_reg(struct nes_device *nesdev, u8 phy_addr, u8 dev_addr, u16 phy_reg) argument
528 0x00020000 | (u32)phy_reg | (((u32)dev_addr) << 18) | (((u32)port_addr) << 23));
/drivers/net/usb/
H A Dasix.c606 int phy_reg; local
612 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
613 if (phy_reg != 0 && phy_reg != 0xFFFF)
618 if (phy_reg <= 0 || phy_reg == 0xFFFF)
621 phy_id = (phy_reg & 0xffff) << 16;
623 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
624 if (phy_reg < 0)
627 phy_id |= (phy_reg
[all...]
/drivers/net/ethernet/
H A Dlantiq_etop.c343 ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data) argument
347 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) |
357 ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg) argument
361 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET);
/drivers/net/ethernet/realtek/
H A Dr8169.c1971 struct phy_reg { struct
1977 const struct phy_reg *regs, int len)
2245 static const struct phy_reg phy_reg_init[] = {
2312 static const struct phy_reg phy_reg_init[] = {
2336 static const struct phy_reg phy_reg_init[] = {
2383 static const struct phy_reg phy_reg_init[] = {
2436 static const struct phy_reg phy_reg_init[] = {
2449 static const struct phy_reg phy_reg_init[] = {
2460 static const struct phy_reg phy_reg_init[] = {
2473 static const struct phy_reg phy_reg_ini
[all...]
/drivers/net/ethernet/icplus/
H A Dipg.c217 static int mdio_read(struct net_device *dev, int phy_id, int phy_reg) argument
243 { phy_reg, 5 }, /* REGAD */
308 static void mdio_write(struct net_device *dev, int phy_id, int phy_reg, int val) argument
334 { phy_reg, 5 }, /* REGAD */
/drivers/net/ethernet/intel/igb/
H A Digb_ethtool.c1519 u16 phy_reg; local
1543 igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg);
1544 if (phy_reg & MII_CR_LOOPBACK) {
1545 phy_reg &= ~MII_CR_LOOPBACK;
1546 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg);

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