Searched refs:plane (Results 1 - 25 of 39) sorted by relevance

12

/drivers/staging/omapdrm/
H A Domap_plane.c31 * plane funcs
81 struct drm_plane *plane = arg; local
82 struct omap_plane *omap_plane = to_omap_plane(plane);
83 struct omap_drm_private *priv = plane->dev->dev_private;
85 omap_dispc_unregister_isr(dispc_isr, plane,
116 static void install_irq(struct drm_plane *plane) argument
118 struct omap_plane *omap_plane = to_omap_plane(plane);
122 ret = omap_dispc_register_isr(dispc_isr, plane, id2irq[ovl->id]);
133 static int commit(struct drm_plane *plane) argument
135 struct drm_device *dev = plane
199 update_manager(struct drm_plane *plane) argument
242 struct drm_plane *plane = arg; local
257 update_pin(struct drm_plane *plane, struct drm_framebuffer *fb) argument
288 update_scanout(struct drm_plane *plane) argument
311 omap_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
348 omap_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
360 omap_plane_disable(struct drm_plane *plane) argument
365 omap_plane_destroy(struct drm_plane *plane) argument
376 omap_plane_dpms(struct drm_plane *plane, int mode) argument
399 omap_plane_on_endwin(struct drm_plane *plane, void (*fxn)(void *), void *arg) argument
423 struct drm_plane *plane = NULL; local
[all...]
H A Domap_crtc.c30 struct drm_plane *plane; member in struct:omap_crtc
48 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
59 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
62 struct drm_plane *plane = priv->planes[i]; local
63 if (plane->crtc == crtc)
64 WARN_ON(omap_plane_dpms(plane, mode));
82 struct drm_plane *plane = omap_crtc->plane; local
84 return omap_plane_mode_set(plane, crt
108 struct drm_plane *plane = omap_crtc->plane; local
[all...]
H A Domap_fb.c76 /* per-plane info for the fb: */
77 struct plane { struct
89 struct plane planes[4];
111 struct plane *plane = &omap_fb->planes[i]; local
112 if (plane->bo)
113 drm_gem_object_unreference_unlocked(plane->bo);
147 struct plane *plane = &omap_fb->planes[0]; local
150 offset = plane
290 struct plane *plane = &omap_fb->planes[i]; local
365 struct plane *plane = &omap_fb->planes[i]; local
[all...]
H A Domap_drv.h81 int omap_plane_dpms(struct drm_plane *plane, int mode);
82 int omap_plane_mode_set(struct drm_plane *plane,
88 void omap_plane_on_endwin(struct drm_plane *plane,
/drivers/video/omap2/dss/
H A Ddispc.h296 static inline u16 DISPC_OVL_BASE(enum omap_plane plane) argument
298 switch (plane) {
313 static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) argument
315 switch (plane) {
327 static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) argument
329 switch (plane) {
341 static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) argument
343 switch (plane) {
357 static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) argument
359 switch (plane) {
373 DISPC_POS_OFFSET(enum omap_plane plane) argument
387 DISPC_SIZE_OFFSET(enum omap_plane plane) argument
401 DISPC_ATTR_OFFSET(enum omap_plane plane) argument
416 DISPC_ATTR2_OFFSET(enum omap_plane plane) argument
432 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) argument
447 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) argument
462 DISPC_ROW_INC_OFFSET(enum omap_plane plane) argument
477 DISPC_PIX_INC_OFFSET(enum omap_plane plane) argument
492 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) argument
506 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) argument
520 DISPC_FIR_OFFSET(enum omap_plane plane) argument
535 DISPC_FIR2_OFFSET(enum omap_plane plane) argument
551 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) argument
567 DISPC_ACCU0_OFFSET(enum omap_plane plane) argument
582 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) argument
598 DISPC_ACCU1_OFFSET(enum omap_plane plane) argument
613 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) argument
630 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) argument
646 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) argument
663 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) argument
679 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) argument
696 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) argument
711 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) argument
728 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) argument
744 DISPC_PRELOAD_OFFSET(enum omap_plane plane) argument
[all...]
H A Ddss_features.h102 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
103 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane);
104 bool dss_feat_color_mode_supported(enum omap_plane plane,
H A Ddispc.c510 static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value) argument
512 dispc_write_reg(DISPC_OVL_FIR_COEF_H(plane, reg), value);
515 static void dispc_ovl_write_firhv_reg(enum omap_plane plane, int reg, u32 value) argument
517 dispc_write_reg(DISPC_OVL_FIR_COEF_HV(plane, reg), value);
520 static void dispc_ovl_write_firv_reg(enum omap_plane plane, int reg, u32 value) argument
522 dispc_write_reg(DISPC_OVL_FIR_COEF_V(plane, reg), value);
525 static void dispc_ovl_write_firh2_reg(enum omap_plane plane, int reg, u32 value) argument
527 BUG_ON(plane == OMAP_DSS_GFX);
529 dispc_write_reg(DISPC_OVL_FIR_COEF_H2(plane, reg), value);
532 static void dispc_ovl_write_firhv2_reg(enum omap_plane plane, in argument
540 dispc_ovl_write_firv2_reg(enum omap_plane plane, int reg, u32 value) argument
547 dispc_ovl_set_scale_coef(enum omap_plane plane, int fir_hinc, int fir_vinc, int five_taps, enum omap_color_component color_comp) argument
628 dispc_ovl_set_ba0(enum omap_plane plane, u32 paddr) argument
633 dispc_ovl_set_ba1(enum omap_plane plane, u32 paddr) argument
638 dispc_ovl_set_ba0_uv(enum omap_plane plane, u32 paddr) argument
643 dispc_ovl_set_ba1_uv(enum omap_plane plane, u32 paddr) argument
648 dispc_ovl_set_pos(enum omap_plane plane, int x, int y) argument
655 dispc_ovl_set_pic_size(enum omap_plane plane, int width, int height) argument
665 dispc_ovl_set_vid_size(enum omap_plane plane, int width, int height) argument
676 dispc_ovl_set_zorder(enum omap_plane plane, u8 zorder) argument
697 dispc_ovl_set_pre_mult_alpha(enum omap_plane plane, bool enable) argument
707 dispc_ovl_setup_global_alpha(enum omap_plane plane, u8 global_alpha) argument
720 dispc_ovl_set_pix_inc(enum omap_plane plane, s32 inc) argument
725 dispc_ovl_set_row_inc(enum omap_plane plane, s32 inc) argument
730 dispc_ovl_set_color_mode(enum omap_plane plane, enum omap_color_mode color_mode) argument
811 dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) argument
858 dispc_ovl_get_channel_out(enum omap_plane plane) argument
891 dispc_ovl_set_burst_size(enum omap_plane plane, enum omap_burst_size burst_size) argument
911 dispc_ovl_get_burst_size(enum omap_plane plane) argument
966 dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable) argument
977 dispc_ovl_enable_replication(enum omap_plane plane, bool enable) argument
1005 int plane; local
1020 dispc_ovl_get_fifo_size(enum omap_plane plane) argument
1025 dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) argument
1065 dispc_ovl_compute_fifo_thresholds(enum omap_plane plane, u32 *fifo_low, u32 *fifo_high, bool use_fifomerge, bool manual_update) argument
1104 dispc_ovl_set_fir(enum omap_plane plane, int hinc, int vinc, enum omap_color_component color_comp) argument
1127 dispc_ovl_set_vid_accu0(enum omap_plane plane, int haccu, int vaccu) argument
1141 dispc_ovl_set_vid_accu1(enum omap_plane plane, int haccu, int vaccu) argument
1155 dispc_ovl_set_vid_accu2_0(enum omap_plane plane, int haccu, int vaccu) argument
1164 dispc_ovl_set_vid_accu2_1(enum omap_plane plane, int haccu, int vaccu) argument
1173 dispc_ovl_set_scale_param(enum omap_plane plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool five_taps, u8 rotation, enum omap_color_component color_comp) argument
1189 dispc_ovl_set_scaling_common(enum omap_plane plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, enum omap_color_mode color_mode, u8 rotation) argument
1243 dispc_ovl_set_scaling_uv(enum omap_plane plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, enum omap_color_mode color_mode, u8 rotation) argument
1306 dispc_ovl_set_scaling(enum omap_plane plane, u16 orig_width, u16 orig_height, u16 out_width, u16 out_height, bool ilace, bool five_taps, bool fieldmode, enum omap_color_mode color_mode, u8 rotation) argument
1330 dispc_ovl_set_rotation_attrs(enum omap_plane plane, u8 rotation, bool mirroring, enum omap_color_mode color_mode) argument
1733 dispc_ovl_calc_scaling(enum omap_plane plane, enum omap_channel channel, u16 width, u16 height, u16 out_width, u16 out_height, enum omap_color_mode color_mode, bool *five_taps) argument
1806 dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, bool ilace, bool replication) argument
1938 dispc_ovl_enable(enum omap_plane plane, bool enable) argument
[all...]
H A Ddss_features.c609 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) argument
611 return omap_current_dss_features->supported_color_modes[plane];
614 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane) argument
616 return omap_current_dss_features->overlay_caps[plane];
619 bool dss_feat_color_mode_supported(enum omap_plane plane, argument
622 return omap_current_dss_features->supported_color_modes[plane] &
H A Ddss.h425 void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
426 void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
429 int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
431 int dispc_ovl_enable(enum omap_plane plane, bool enable);
432 void dispc_ovl_set_channel_out(enum omap_plane plane,
/drivers/media/video/
H A Dvideobuf2-core.c51 int plane; local
54 for (plane = 0; plane < vb->num_planes; ++plane) {
55 mem_priv = call_memop(q, alloc, q->alloc_ctx[plane],
56 q->plane_sizes[plane]);
60 /* Associate allocator private data with this plane */
61 vb->planes[plane].mem_priv = mem_priv;
62 vb->v4l2_planes[plane].length = q->plane_sizes[plane];
82 unsigned int plane; local
99 unsigned int plane; local
114 unsigned int buffer, plane; local
298 unsigned int plane; local
808 unsigned int plane; local
874 unsigned int plane; local
1508 unsigned int buffer, plane; local
1553 unsigned int buffer, plane; local
1607 unsigned int buffer, plane; local
[all...]
/drivers/gpu/drm/exynos/
H A Dexynos_drm_plane.c34 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, argument
41 container_of(plane, struct exynos_plane, base);
74 static int exynos_disable_plane(struct drm_plane *plane) argument
77 container_of(plane, struct exynos_plane, base);
85 exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
94 static void exynos_plane_destroy(struct drm_plane *plane) argument
97 container_of(plane, struct exynos_plane, base);
101 exynos_disable_plane(plane);
102 drm_plane_cleanup(plane);
136 struct drm_plane *plane; local
[all...]
/drivers/gpu/drm/i915/
H A Dintel_sprite.c26 * New plane/sprite handling.
28 * The older chips had a separate interface for programming plane related
29 * registers; newer ones are much simpler and we can use the new DRM plane
40 ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, argument
46 struct drm_device *dev = plane->dev;
48 struct intel_plane *intel_plane = to_intel_plane(plane);
141 ivb_disable_plane(struct drm_plane *plane) argument
143 struct drm_device *dev = plane->dev;
145 struct intel_plane *intel_plane = to_intel_plane(plane);
157 ivb_update_colorkey(struct drm_plane *plane, argument
186 ivb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key) argument
211 snb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, struct drm_i915_gem_object *obj, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t x, uint32_t y, uint32_t src_w, uint32_t src_h) argument
298 snb_disable_plane(struct drm_plane *plane) argument
336 snb_update_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key) argument
365 snb_get_colorkey(struct drm_plane *plane, struct drm_intel_sprite_colorkey *key) argument
390 intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, struct drm_framebuffer *fb, int crtc_x, int crtc_y, unsigned int crtc_w, unsigned int crtc_h, uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) argument
516 intel_disable_plane(struct drm_plane *plane) argument
541 intel_destroy_plane(struct drm_plane *plane) argument
555 struct drm_plane *plane; local
589 struct drm_plane *plane; local
[all...]
H A Di915_trace.h352 TP_PROTO(int plane, struct drm_i915_gem_object *obj),
354 TP_ARGS(plane, obj),
357 __field(int, plane)
362 __entry->plane = plane;
366 TP_printk("plane=%d, obj=%p", __entry->plane, __entry->obj)
370 TP_PROTO(int plane, struct drm_i915_gem_object *obj),
372 TP_ARGS(plane, obj),
375 __field(int, plane)
[all...]
H A Dintel_drv.h156 enum plane plane; member in struct:intel_crtc
185 void (*update_plane)(struct drm_plane *plane,
192 void (*disable_plane)(struct drm_plane *plane);
193 int (*update_colorkey)(struct drm_plane *plane,
195 void (*get_colorkey)(struct drm_plane *plane,
268 intel_get_crtc_for_plane(struct drm_device *dev, int plane) argument
271 return dev_priv->plane_to_crtc_mapping[plane];
390 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
392 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
[all...]
H A Dintel_fb.c280 struct drm_plane *plane; local
289 list_for_each_entry(plane, &config->plane_list, head)
290 plane->funcs->disable_plane(plane);
H A Dintel_display.c952 enum plane plane, bool state)
958 reg = DSPCNTR(plane);
962 "plane %c assertion failure (expected %s, current %s)\n",
963 plane_name(plane), state_string(state), state_string(cur_state));
981 "plane %c assertion failure, should be disabled but not\n",
993 "plane %c assertion failure, should be off on pipe %c but is still active\n",
1139 * Enable @pipe's PLL so we can start pumping pixels from a plane. Check to
1354 * a plane. On ILK+ the pipe PLLs are integrated, so we don't
1383 * are met, if applicable, e.g. plane disable
951 assert_plane(struct drm_i915_private *dev_priv, enum plane plane, bool state) argument
1418 intel_flush_display_plane(struct drm_i915_private *dev_priv, enum plane plane) argument
1433 intel_enable_plane(struct drm_i915_private *dev_priv, enum plane plane, enum pipe pipe) argument
1460 intel_disable_plane(struct drm_i915_private *dev_priv, enum plane plane, enum pipe pipe) argument
1560 int plane, i; local
1609 int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB; local
1678 int plane = intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : DPFC_CTL_PLANEB; local
2085 int plane = intel_crtc->plane; local
2158 int plane = intel_crtc->plane; local
2446 int plane = intel_crtc->plane; local
3068 int plane = intel_crtc->plane; local
3128 int plane = intel_crtc->plane; local
3225 int plane = intel_crtc->plane; local
3269 int plane = intel_crtc->plane; local
3295 int plane = intel_crtc->plane; local
3881 i9xx_get_fifo_size(struct drm_device *dev, int plane) argument
3897 i85x_get_fifo_size(struct drm_device *dev, int plane) argument
3914 i845_get_fifo_size(struct drm_device *dev, int plane) argument
3930 i830_get_fifo_size(struct drm_device *dev, int plane) argument
4029 g4x_compute_wm0(struct drm_device *dev, int plane, const struct intel_watermark_params *display, int display_latency_ns, const struct intel_watermark_params *cursor, int cursor_latency_ns, int *plane_wm, int *cursor_wm) argument
4115 g4x_compute_srwm(struct drm_device *dev, int plane, int latency_ns, const struct intel_watermark_params *display, const struct intel_watermark_params *cursor, int *display_wm, int *cursor_wm) argument
4466 ironlake_compute_srwm(struct drm_device *dev, int level, int plane, int latency_ns, const struct intel_watermark_params *display, const struct intel_watermark_params *cursor, int *fbc_wm, int *display_wm, int *cursor_wm) argument
4719 sandybridge_compute_sprite_wm(struct drm_device *dev, int plane, uint32_t sprite_width, int pixel_size, const struct intel_watermark_params *display, int display_latency_ns, int *sprite_wm) argument
4751 sandybridge_compute_sprite_srwm(struct drm_device *dev, int plane, uint32_t sprite_width, int pixel_size, const struct intel_watermark_params *display, int latency_ns, int *sprite_wm) argument
5156 int plane = intel_crtc->plane; local
5665 int plane = intel_crtc->plane; local
7305 intel_finish_page_flip_plane(struct drm_device *dev, int plane) argument
7313 intel_prepare_page_flip(struct drm_device *dev, int plane) argument
7615 intel_sanitize_modesetting(struct drm_device *dev, int pipe, int plane) argument
9381 } plane[2]; member in struct:intel_display_error_state
[all...]
/drivers/video/
H A Dau1200fb.c149 int plane; member in struct:au1200fb_device
710 static int au1200_setlocation (struct au1200fb_device *fbdev, int plane, argument
718 winctrl0 = lcd->window[plane].winctrl0;
719 winctrl1 = lcd->window[plane].winctrl1;
724 xsz = win->w[plane].xres;
725 ysz = win->w[plane].yres;
726 if ((xpos + win->w[plane].xres) > panel->Xres) {
732 if ((ypos + win->w[plane].yres) > panel->Yres) {
740 xsz = win->w[plane].xres + xpos;
741 fb_offset += (((0 - xpos) * winbpp(lcd->window[plane]
942 int plane = fbdev->plane; local
1044 int screen_size, plane; local
1319 set_window(unsigned int plane, struct au1200_lcd_window_regs_t *pdata) argument
1418 get_window(unsigned int plane, struct au1200_lcd_window_regs_t *pdata) argument
1449 int plane; local
1682 int bpp, plane, ret, irq; local
1806 int plane; local
[all...]
H A Dsh_mobile_meram.c200 /* Allocate ICBs and MERAM for a plane. */
202 struct sh_mobile_meram_fb_plane *plane,
211 plane->cache = &priv->icbs[idx];
216 plane->marker = &priv->icbs[idx];
222 __set_bit(plane->marker->index, &priv->used_icb);
223 __set_bit(plane->cache->index, &priv->used_icb);
225 plane->marker->offset = mem - priv->meram;
226 plane->marker->size = size;
231 /* Free ICBs and MERAM for a plane. */
233 struct sh_mobile_meram_fb_plane *plane)
201 __meram_alloc(struct sh_mobile_meram_priv *priv, struct sh_mobile_meram_fb_plane *plane, size_t size) argument
232 __meram_free(struct sh_mobile_meram_priv *priv, struct sh_mobile_meram_fb_plane *plane) argument
358 meram_init(struct sh_mobile_meram_priv *priv, struct sh_mobile_meram_fb_plane *plane, unsigned int xres, unsigned int yres, unsigned int *out_pitch) argument
430 meram_deinit(struct sh_mobile_meram_priv *priv, struct sh_mobile_meram_fb_plane *plane) argument
[all...]
/drivers/video/omap/
H A Domapfb_main.c66 { OMAPFB_CAPS_PLANE_RELOCATE_MEM, "relocate plane memory" },
67 { OMAPFB_CAPS_PLANE_SCALE, "scale plane" },
203 struct omapfb_plane_struct *plane = fbi->par; local
204 struct omapfb_device *fbdev = plane->fbdev;
212 r = fbdev->ctrl->setup_plane(plane->idx, plane->info.channel_out,
214 plane->info.pos_x, plane->info.pos_y,
215 var->xres, var->yres, plane->color_mode);
226 r = fbdev->ctrl->set_scale(plane
262 struct omapfb_plane_struct *plane = info->par; local
341 struct omapfb_plane_struct *plane = fbi->par; local
380 struct omapfb_plane_struct *plane = fbi->par; local
397 struct omapfb_plane_struct *plane = fbi->par; local
436 set_color_mode(struct omapfb_plane_struct *plane, struct fb_var_screeninfo *var) argument
496 struct omapfb_plane_struct *plane = fbi->par; local
612 struct omapfb_plane_struct *plane = fbi->par; local
637 struct omapfb_plane_struct *plane = fbi->par; local
664 struct omapfb_plane_struct *plane = fbi->par; local
687 struct omapfb_plane_struct *plane = fbi->par; local
706 struct omapfb_plane_struct *plane = fbi->par; local
724 struct omapfb_plane_struct *plane = fbi->par; local
769 struct omapfb_plane_struct *plane = fbi->par; local
781 struct omapfb_plane_struct *plane = fbi->par; local
809 struct omapfb_plane_struct *plane = fbi->par; local
849 struct omapfb_plane_struct *plane = fbi->par; local
857 struct omapfb_plane_struct *plane = fbi->par; local
933 struct omapfb_plane_struct *plane = fbi->par; local
1061 omapfb_get_caps(struct omapfb_device *fbdev, int plane, struct omapfb_caps *caps) argument
1095 struct omapfb_plane_struct *plane = fbi->par; local
1243 struct omapfb_plane_struct *plane = info->par; local
1285 int plane; local
1307 int plane; local
1545 struct omapfb_plane_struct *plane; local
[all...]
H A Domapfb.h163 void (*get_caps) (int plane, struct omapfb_caps *caps);
166 int (*setup_plane) (int plane, int channel_out,
172 int (*setup_mem) (int plane, size_t size,
176 int (*set_scale) (int plane,
179 int (*enable_plane) (int plane, int enable);
H A Dlcdc.c185 struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par; local
194 if (plane->info.mirror || (src & 3) ||
237 omap_set_lcd_dma_b1_mirror(plane->info.mirror);
292 static int omap_lcdc_setup_plane(int plane, int channel_out, argument
308 if (plane != 0 || channel_out != 0 || pos_x != 0 || pos_y != 0 ||
312 "invalid plane params plane %d pos_x %d pos_y %d "
313 "w %d h %d\n", plane, pos_x, pos_y, width, height);
379 static int omap_lcdc_enable_plane(int plane, int enable) argument
382 "plane
583 omap_lcdc_get_caps(int plane, struct omapfb_caps *caps) argument
[all...]
/drivers/media/video/s5p-tv/
H A Dmixer_vp_layer.c26 .plane = {
39 .plane = {
52 .plane = {
66 .plane = {
107 &layer->fmt->plane[0], layer->geo.src.full_width,
H A Dmixer_grp_layer.c25 .plane = {
37 .plane = {
49 .plane = {
61 .plane = {
/drivers/gpu/drm/
H A Ddrm_crtc.c322 struct drm_plane *plane; local
339 list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
340 if (plane->fb == fb) {
342 ret = plane->funcs->disable_plane(plane);
344 DRM_ERROR("failed to disable plane with busy fb\n");
345 /* disconnect the plane from the fb and crtc: */
346 plane->fb = NULL;
347 plane->crtc = NULL;
592 int drm_plane_init(struct drm_device *dev, struct drm_plane *plane, argument
639 drm_plane_cleanup(struct drm_plane *plane) argument
1010 struct drm_plane *plane, *plt; local
1572 struct drm_plane *plane; local
1622 struct drm_plane *plane; local
1690 struct drm_plane *plane; local
[all...]
/drivers/gpu/drm/nouveau/
H A Dnouveau_hw.c548 bool save, unsigned plane)
553 NVWriteVgaSeq(dev, 0, NV_VIO_SR_PLANE_MASK_INDEX, 1 << plane);
554 NVWriteVgaGr(dev, 0, NV_VIO_GX_READ_MAP_INDEX, plane);
557 dev_priv->saved_vga_font[plane][i] =
560 iowrite32_native(dev_priv->saved_vga_font[plane][i],
571 unsigned plane; local
612 for (plane = 0; plane < 4; plane++)
613 nouveau_vga_font_io(dev, iovram, save, plane);
546 nouveau_vga_font_io(struct drm_device *dev, void __iomem *iovram, bool save, unsigned plane) argument
[all...]

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