Searched refs:Amount (Results 1 - 12 of 12) sorted by relevance
/external/llvm/lib/Target/MBlaze/ |
H A D | MBlazeRegisterInfo.cpp | 97 int Amount = Old->getOperand(0).getImm() + 4; local 98 if (Amount != 0) { 103 Amount = (Amount+Align-1)/Align*Align; 108 .addReg(MBlaze::R1).addImm(-Amount); 112 .addReg(MBlaze::R1).addImm(Amount);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSERegisterInfo.cpp | 54 int64_t Amount = I->getOperand(0).getImm(); local 57 Amount = -Amount; 62 II->adjustStackPtr(SP, Amount, MBB, I);
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H A D | MipsSEInstrInfo.h | 68 /// Adjust SP by Amount bytes. 69 void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB,
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H A D | MipsSEInstrInfo.cpp | 251 /// Adjust SP by Amount bytes. 252 void MipsSEInstrInfo::adjustStackPtr(unsigned SP, int64_t Amount, argument 260 if (isInt<16>(Amount))// addi sp, sp, amount 261 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); 264 unsigned Reg = loadImmediate(Amount, MBB, I, DL, 0);
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 115 uint64_t Amount = Old->getOperand(0).getImm(); local 116 if (Amount != 0) { 121 Amount = (Amount+Align-1)/Align*Align; 123 assert(Amount%4 == 0); 124 Amount /= 4; 126 bool isU6 = isImmU6(Amount); 127 if (!isU6 && !isImmU16(Amount)) { 131 << Amount << "\n"; 140 .addImm(Amount); [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 115 uint64_t Amount = Old->getOperand(0).getImm(); local 116 if (Amount != 0) { 120 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign; 126 .addReg(MSP430::SPW).addImm(Amount); 131 Amount -= CalleeAmt; 132 if (Amount) 135 .addReg(MSP430::SPW).addImm(Amount);
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 454 uint64_t Amount = !reseveCallFrame ? I->getOperand(0).getImm() : 0; local 463 if (Amount == 0) 470 Amount = (Amount + StackAlign - 1) / StackAlign * StackAlign; 474 New = BuildMI(MF, DL, TII.get(getSUBriOpcode(Is64Bit, Amount)), 477 .addImm(Amount); 482 Amount -= CalleeAmt; 484 if (Amount) { 485 unsigned Opc = getADDriOpcode(Is64Bit, Amount); 487 .addReg(StackPtr).addImm(Amount); [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | Thumb1RegisterInfo.cpp | 319 unsigned Amount = Old->getOperand(0).getImm(); local 320 if (Amount != 0) { 325 Amount = (Amount+Align-1)/Align*Align; 330 emitSPUpdate(MBB, I, TII, dl, *this, -Amount); 333 emitSPUpdate(MBB, I, TII, dl, *this, Amount);
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H A D | ARMBaseRegisterInfo.cpp | 769 unsigned Amount = Old->getOperand(0).getImm(); local 770 if (Amount != 0) { 775 Amount = (Amount+Align-1)/Align*Align; 790 emitSPUpdate(isARM, MBB, I, dl, TII, -Amount, Pred, PredReg); 795 emitSPUpdate(isARM, MBB, I, dl, TII, Amount, Pred, PredReg);
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4396 unsigned &Amount) { 4418 Amount = 0; 4442 Amount = Imm; 6838 unsigned Amount = ARM_AM::getSORegOffset(Inst.getOperand(2).getImm()); local 6839 if (Amount == 32) Amount = 0; 6847 TmpInst.addOperand(MCOperand::CreateImm(Amount)); 4395 parseMemRegOffsetShift(ARM_AM::ShiftOpc &St, unsigned &Amount) argument
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/external/e2fsprogs/lib/et/ |
H A D | texinfo.tex | 1412 % Amount to narrow the margins by for @lisp.
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/external/grub/docs/ |
H A D | texinfo.tex | 4779 % Amount to narrow the margins by for @lisp.
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