/external/llvm/include/llvm/CodeGen/ |
H A D | FunctionLoweringInfo.h | 103 APInt KnownOne, KnownZero; member in struct:llvm::FunctionLoweringInfo::LiveOutInfo 104 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), 168 const APInt &KnownZero, const APInt &KnownOne) { 170 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) 176 LOI.KnownOne = KnownOne; 167 AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, const APInt &KnownZero, const APInt &KnownOne) argument
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombine.h | 301 APInt &KnownOne, unsigned Depth = 0) const { 302 return llvm::ComputeMaskedBits(V, KnownZero, KnownOne, TD, Depth); 329 APInt& KnownZero, APInt& KnownOne, 332 APInt& KnownZero, APInt& KnownOne, 338 APInt &KnownOne); 300 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, unsigned Depth = 0) const argument
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H A D | InstCombineSimplifyDemanded.cpp | 55 APInt KnownZero(BitWidth, 0), KnownOne(BitWidth, 0); 59 KnownZero, KnownOne, 0); 70 APInt &KnownZero, APInt &KnownOne, 73 KnownZero, KnownOne, Depth); 86 /// returns false after analyzing the expression and setting KnownOne and known 90 /// the expression. KnownOne and KnownZero always follow the invariant that 91 /// KnownOne & KnownZero == 0. That is, a bit can't be both 1 and 0. Note that 92 /// the bits in KnownOne and KnownZero may only be accurate for those bits set 94 /// and KnownOne must all be the same. 102 APInt &KnownZero, APInt &KnownOne, 69 SimplifyDemandedBits(Use &U, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument 101 SimplifyDemandedUseBits(Value *V, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne, unsigned Depth) argument 845 SimplifyShrShlDemandedBits(Instruction *Shr, Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) argument [all...] |
H A D | InstCombineCompares.cpp | 153 const APInt& KnownOne, 155 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 158 "KnownZero, KnownOne and Min, Max must have equal bitwidth."); 159 APInt UnknownBits = ~(KnownZero|KnownOne); 163 Min = KnownOne; 164 Max = KnownOne|UnknownBits; 177 const APInt &KnownOne, 179 assert(KnownZero.getBitWidth() == KnownOne.getBitWidth() && 182 "Ty, KnownZero, KnownOne and Min, Max must have equal bitwidth."); 183 APInt UnknownBits = ~(KnownZero|KnownOne); 152 ComputeSignedMinMaxValuesFromKnownBits(const APInt& KnownZero, const APInt& KnownOne, APInt& Min, APInt& Max) argument 176 ComputeUnsignedMinMaxValuesFromKnownBits(const APInt &KnownZero, const APInt &KnownOne, APInt &Min, APInt &Max) argument [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDILISelLowering.cpp | 260 APInt &KnownOne, 265 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); // Don't know anything 272 KnownOne, 280 assert((KnownZero & KnownOne) == 0 285 KnownOne &= KnownOne2; 257 computeMaskedBitsForTargetNode( const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 568 APInt KnownOne = KnownOne0 & KnownOne1; local 569 if ((KnownZero | KnownOne).isAllOnesValue()) { 570 return ConstantInt::get(Op0->getType(), KnownOne);
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H A D | ValueTracking.cpp | 47 APInt &KnownZero, APInt &KnownOne, 96 KnownOne |= KnownOne2 & Mask; 107 KnownOne |= LHSKnownOne & Mask; 111 if (!KnownZero.isNegative() && !KnownOne.isNegative()) { 119 KnownOne |= APInt::getSignBit(BitWidth); 126 KnownOne |= APInt::getSignBit(BitWidth); 133 APInt &KnownZero, APInt &KnownOne, 137 ComputeMaskedBits(Op1, KnownZero, KnownOne, TD, Depth+1); 139 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 152 bool isKnownNegativeOp1 = KnownOne 46 ComputeMaskedBitsAddSub(bool Add, Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const DataLayout *TD, unsigned Depth) argument 132 ComputeMaskedBitsMul(Value *Op0, Value *Op1, bool NSW, APInt &KnownZero, APInt &KnownOne, APInt &KnownZero2, APInt &KnownOne2, const DataLayout *TD, unsigned Depth) argument 228 ComputeMaskedBits(Value *V, APInt &KnownZero, APInt &KnownOne, const DataLayout *TD, unsigned Depth) argument 792 ComputeSignBit(Value *V, bool &KnownZero, bool &KnownOne, const DataLayout *TD, unsigned Depth) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 840 APInt &KnownOne, 844 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 850 DAG.ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 852 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 856 KnownOne &= KnownOne2; 838 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGISel.cpp | 531 APInt KnownOne; local 560 CurDAG->ComputeMaskedBits(Src, KnownZero, KnownOne); 561 FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne); 1475 APInt KnownZero, KnownOne; local 1476 CurDAG->ComputeMaskedBits(LHS, KnownZero, KnownOne); 1479 if ((NeededMask & KnownOne) == NeededMask)
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H A D | TargetLowering.cpp | 346 /// analyze the expression and return a mask of KnownOne and KnownZero bits for 352 APInt &KnownOne, 362 KnownZero = KnownOne = APInt(BitWidth, 0); 367 // If not at the root, Just compute the KnownZero/KnownOne bits to 369 TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 388 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 389 KnownZero = ~KnownOne; 410 KnownOne, TLO, Depth+1)) 412 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 420 if ((NewMask & ~KnownZero2 & KnownOne) 349 SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask, APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth) const argument 1003 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument 1058 APInt KnownZero, KnownOne; local [all...] |
H A D | LegalizeIntegerTypes.cpp | 1370 APInt KnownZero, KnownOne; local 1371 DAG.ComputeMaskedBits(N->getOperand(1), KnownZero, KnownOne); 1374 if (((KnownZero|KnownOne) & HighBitMask) == 0) 1383 if (KnownOne.intersects(HighBitMask)) {
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H A D | SelectionDAG.cpp | 1671 APInt KnownZero, KnownOne; local 1672 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth); 1673 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); 1678 /// known to be either zero or one and return them in the KnownZero/KnownOne 1682 APInt &KnownOne, unsigned Depth) const { 1685 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 1694 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue(); 1695 KnownZero = ~KnownOne; 1699 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1); 1701 assert((KnownZero & KnownOne) 1681 ComputeMaskedBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth) const argument 2239 APInt KnownZero, KnownOne; local 2264 APInt KnownZero, KnownOne; local 2315 APInt KnownZero, KnownOne; local 6217 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne, local [all...] |
H A D | DAGCombiner.cpp | 689 APInt KnownZero, KnownOne; local 690 if (!TLI.SimplifyDemandedBits(Op, Demanded, KnownZero, KnownOne, TLO)) 3932 APInt KnownZero, KnownOne; local 3933 DAG.ComputeMaskedBits(N0.getOperand(0), KnownZero, KnownOne); 3935 // If any of the input bits are KnownOne, then the input couldn't be all 3937 if (KnownOne.getBoolValue()) return DAG.getConstant(0, VT); 4523 APInt KnownOne; local 4526 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne); 4547 DAG.ComputeMaskedBits(Op, KnownZero, KnownOne);
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1383 APInt KnownZero, KnownOne; local 1386 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1406 APInt KnownZero, KnownOne; local 1409 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1422 APInt KnownZero, KnownOne; local 1425 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1549 APInt &KnownOne, 1552 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 1547 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 923 APInt KnownZero, KnownOne; local 924 DAG.ComputeMaskedBits(X, KnownZero, KnownOne);
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H A D | X86ISelLowering.cpp | 14656 APInt &KnownOne, 14668 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything. 15531 APInt KnownZero, KnownOne; local 15535 TLI.SimplifyDemandedBits(Cond, DemandedMask, KnownZero, KnownOne, TLO)) 17163 APInt KnownZero, KnownOne; local 17168 TLI.SimplifyDemandedBits(Op1, DemandedMask, KnownZero, KnownOne, TLO)) 14654 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 6521 APInt &KnownOne, 6524 KnownZero = KnownOne = APInt(KnownZero.getBitWidth(), 0); 6519 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 9378 APInt KnownZero, KnownOne; local 9379 DAG.ComputeMaskedBits(SDValue(N,0), KnownZero, KnownOne); local 9950 APInt &KnownOne, 9953 KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0); 9958 DAG.ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1); 9959 if (KnownZero == 0 && KnownOne == 0) return; 9964 KnownOne &= KnownOneRHS; 9948 computeMaskedBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth) const argument
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